1 /*
2  * max8998.h - Voltage regulator driver for the Maxim 8998
3  *
4  *  Copyright (C) 2009-2010 Samsung Electrnoics
5  *  Kyungmin Park <[email protected]>
6  *  Marek Szyprowski <[email protected]>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21  */
22 
23 #ifndef __LINUX_MFD_MAX8998_PRIV_H
24 #define __LINUX_MFD_MAX8998_PRIV_H
25 
26 #define MAX8998_NUM_IRQ_REGS	4
27 
28 /* MAX 8998 registers */
29 enum {
30 	MAX8998_REG_IRQ1,
31 	MAX8998_REG_IRQ2,
32 	MAX8998_REG_IRQ3,
33 	MAX8998_REG_IRQ4,
34 	MAX8998_REG_IRQM1,
35 	MAX8998_REG_IRQM2,
36 	MAX8998_REG_IRQM3,
37 	MAX8998_REG_IRQM4,
38 	MAX8998_REG_STATUS1,
39 	MAX8998_REG_STATUS2,
40 	MAX8998_REG_STATUSM1,
41 	MAX8998_REG_STATUSM2,
42 	MAX8998_REG_CHGR1,
43 	MAX8998_REG_CHGR2,
44 	MAX8998_REG_LDO_ACTIVE_DISCHARGE1,
45 	MAX8998_REG_LDO_ACTIVE_DISCHARGE2,
46 	MAX8998_REG_BUCK_ACTIVE_DISCHARGE3,
47 	MAX8998_REG_ONOFF1,
48 	MAX8998_REG_ONOFF2,
49 	MAX8998_REG_ONOFF3,
50 	MAX8998_REG_ONOFF4,
51 	MAX8998_REG_BUCK1_DVSARM1,
52 	MAX8998_REG_BUCK1_DVSARM2,
53 	MAX8998_REG_BUCK1_DVSARM3,
54 	MAX8998_REG_BUCK1_DVSARM4,
55 	MAX8998_REG_BUCK2_DVSINT1,
56 	MAX8998_REG_BUCK2_DVSINT2,
57 	MAX8998_REG_BUCK3,
58 	MAX8998_REG_BUCK4,
59 	MAX8998_REG_LDO2_LDO3,
60 	MAX8998_REG_LDO4,
61 	MAX8998_REG_LDO5,
62 	MAX8998_REG_LDO6,
63 	MAX8998_REG_LDO7,
64 	MAX8998_REG_LDO8_LDO9,
65 	MAX8998_REG_LDO10_LDO11,
66 	MAX8998_REG_LDO12,
67 	MAX8998_REG_LDO13,
68 	MAX8998_REG_LDO14,
69 	MAX8998_REG_LDO15,
70 	MAX8998_REG_LDO16,
71 	MAX8998_REG_LDO17,
72 	MAX8998_REG_BKCHR,
73 	MAX8998_REG_LBCNFG1,
74 	MAX8998_REG_LBCNFG2,
75 };
76 
77 /* IRQ definitions */
78 enum {
79 	MAX8998_IRQ_DCINF,
80 	MAX8998_IRQ_DCINR,
81 	MAX8998_IRQ_JIGF,
82 	MAX8998_IRQ_JIGR,
83 	MAX8998_IRQ_PWRONF,
84 	MAX8998_IRQ_PWRONR,
85 
86 	MAX8998_IRQ_WTSREVNT,
87 	MAX8998_IRQ_SMPLEVNT,
88 	MAX8998_IRQ_ALARM1,
89 	MAX8998_IRQ_ALARM0,
90 
91 	MAX8998_IRQ_ONKEY1S,
92 	MAX8998_IRQ_TOPOFFR,
93 	MAX8998_IRQ_DCINOVPR,
94 	MAX8998_IRQ_CHGRSTF,
95 	MAX8998_IRQ_DONER,
96 	MAX8998_IRQ_CHGFAULT,
97 
98 	MAX8998_IRQ_LOBAT1,
99 	MAX8998_IRQ_LOBAT2,
100 
101 	MAX8998_IRQ_NR,
102 };
103 
104 #define MAX8998_IRQ_DCINF_MASK		(1 << 2)
105 #define MAX8998_IRQ_DCINR_MASK		(1 << 3)
106 #define MAX8998_IRQ_JIGF_MASK		(1 << 4)
107 #define MAX8998_IRQ_JIGR_MASK		(1 << 5)
108 #define MAX8998_IRQ_PWRONF_MASK		(1 << 6)
109 #define MAX8998_IRQ_PWRONR_MASK		(1 << 7)
110 
111 #define MAX8998_IRQ_WTSREVNT_MASK	(1 << 0)
112 #define MAX8998_IRQ_SMPLEVNT_MASK	(1 << 1)
113 #define MAX8998_IRQ_ALARM1_MASK		(1 << 2)
114 #define MAX8998_IRQ_ALARM0_MASK		(1 << 3)
115 
116 #define MAX8998_IRQ_ONKEY1S_MASK	(1 << 0)
117 #define MAX8998_IRQ_TOPOFFR_MASK	(1 << 2)
118 #define MAX8998_IRQ_DCINOVPR_MASK	(1 << 3)
119 #define MAX8998_IRQ_CHGRSTF_MASK	(1 << 4)
120 #define MAX8998_IRQ_DONER_MASK		(1 << 5)
121 #define MAX8998_IRQ_CHGFAULT_MASK	(1 << 7)
122 
123 #define MAX8998_IRQ_LOBAT1_MASK		(1 << 0)
124 #define MAX8998_IRQ_LOBAT2_MASK		(1 << 1)
125 
126 /**
127  * struct max8998_dev - max8998 master device for sub-drivers
128  * @dev: master device of the chip (can be used to access platform data)
129  * @i2c: i2c client private data for regulator
130  * @rtc: i2c client private data for rtc
131  * @iolock: mutex for serializing io access
132  * @irqlock: mutex for buslock
133  * @irq_base: base IRQ number for max8998, required for IRQs
134  * @irq: generic IRQ number for max8998
135  * @ono: power onoff IRQ number for max8998
136  * @irq_masks_cur: currently active value
137  * @irq_masks_cache: cached hardware value
138  */
139 struct max8998_dev {
140 	struct device *dev;
141 	struct i2c_client *i2c;
142 	struct i2c_client *rtc;
143 	struct mutex iolock;
144 	struct mutex irqlock;
145 
146 	int irq_base;
147 	int irq;
148 	int ono;
149 	u8 irq_masks_cur[MAX8998_NUM_IRQ_REGS];
150 	u8 irq_masks_cache[MAX8998_NUM_IRQ_REGS];
151 };
152 
153 int max8998_irq_init(struct max8998_dev *max8998);
154 void max8998_irq_exit(struct max8998_dev *max8998);
155 
156 extern int max8998_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest);
157 extern int max8998_bulk_read(struct i2c_client *i2c, u8 reg, int count,
158 		u8 *buf);
159 extern int max8998_write_reg(struct i2c_client *i2c, u8 reg, u8 value);
160 extern int max8998_bulk_write(struct i2c_client *i2c, u8 reg, int count,
161 		u8 *buf);
162 extern int max8998_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask);
163 
164 #endif /*  __LINUX_MFD_MAX8998_PRIV_H */
165