1 /*
2  * max77693-private.h - Voltage regulator driver for the Maxim 77693
3  *
4  *  Copyright (C) 2012 Samsung Electrnoics
5  *  SangYoung Son <[email protected]>
6  *
7  * This program is not provided / owned by Maxim Integrated Products.
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, write to the Free Software
21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
22  */
23 
24 #ifndef __LINUX_MFD_MAX77693_PRIV_H
25 #define __LINUX_MFD_MAX77693_PRIV_H
26 
27 #include <linux/i2c.h>
28 
29 #define MAX77693_NUM_IRQ_MUIC_REGS	3
30 #define MAX77693_REG_INVALID		(0xff)
31 
32 /* Slave addr = 0xCC: PMIC, Charger, Flash LED */
33 enum max77693_pmic_reg {
34 	MAX77693_LED_REG_IFLASH1			= 0x00,
35 	MAX77693_LED_REG_IFLASH2			= 0x01,
36 	MAX77693_LED_REG_ITORCH				= 0x02,
37 	MAX77693_LED_REG_ITORCHTIMER			= 0x03,
38 	MAX77693_LED_REG_FLASH_TIMER			= 0x04,
39 	MAX77693_LED_REG_FLASH_EN			= 0x05,
40 	MAX77693_LED_REG_MAX_FLASH1			= 0x06,
41 	MAX77693_LED_REG_MAX_FLASH2			= 0x07,
42 	MAX77693_LED_REG_MAX_FLASH3			= 0x08,
43 	MAX77693_LED_REG_MAX_FLASH4			= 0x09,
44 	MAX77693_LED_REG_VOUT_CNTL			= 0x0A,
45 	MAX77693_LED_REG_VOUT_FLASH1			= 0x0B,
46 	MAX77693_LED_REG_VOUT_FLASH2			= 0x0C,
47 	MAX77693_LED_REG_FLASH_INT			= 0x0E,
48 	MAX77693_LED_REG_FLASH_INT_MASK			= 0x0F,
49 	MAX77693_LED_REG_FLASH_INT_STATUS		= 0x10,
50 
51 	MAX77693_PMIC_REG_PMIC_ID1			= 0x20,
52 	MAX77693_PMIC_REG_PMIC_ID2			= 0x21,
53 	MAX77693_PMIC_REG_INTSRC			= 0x22,
54 	MAX77693_PMIC_REG_INTSRC_MASK			= 0x23,
55 	MAX77693_PMIC_REG_TOPSYS_INT			= 0x24,
56 	MAX77693_PMIC_REG_TOPSYS_INT_MASK		= 0x26,
57 	MAX77693_PMIC_REG_TOPSYS_STAT			= 0x28,
58 	MAX77693_PMIC_REG_MAINCTRL1			= 0x2A,
59 	MAX77693_PMIC_REG_LSCNFG			= 0x2B,
60 
61 	MAX77693_CHG_REG_CHG_INT			= 0xB0,
62 	MAX77693_CHG_REG_CHG_INT_MASK			= 0xB1,
63 	MAX77693_CHG_REG_CHG_INT_OK			= 0xB2,
64 	MAX77693_CHG_REG_CHG_DETAILS_00			= 0xB3,
65 	MAX77693_CHG_REG_CHG_DETAILS_01			= 0xB4,
66 	MAX77693_CHG_REG_CHG_DETAILS_02			= 0xB5,
67 	MAX77693_CHG_REG_CHG_DETAILS_03			= 0xB6,
68 	MAX77693_CHG_REG_CHG_CNFG_00			= 0xB7,
69 	MAX77693_CHG_REG_CHG_CNFG_01			= 0xB8,
70 	MAX77693_CHG_REG_CHG_CNFG_02			= 0xB9,
71 	MAX77693_CHG_REG_CHG_CNFG_03			= 0xBA,
72 	MAX77693_CHG_REG_CHG_CNFG_04			= 0xBB,
73 	MAX77693_CHG_REG_CHG_CNFG_05			= 0xBC,
74 	MAX77693_CHG_REG_CHG_CNFG_06			= 0xBD,
75 	MAX77693_CHG_REG_CHG_CNFG_07			= 0xBE,
76 	MAX77693_CHG_REG_CHG_CNFG_08			= 0xBF,
77 	MAX77693_CHG_REG_CHG_CNFG_09			= 0xC0,
78 	MAX77693_CHG_REG_CHG_CNFG_10			= 0xC1,
79 	MAX77693_CHG_REG_CHG_CNFG_11			= 0xC2,
80 	MAX77693_CHG_REG_CHG_CNFG_12			= 0xC3,
81 	MAX77693_CHG_REG_CHG_CNFG_13			= 0xC4,
82 	MAX77693_CHG_REG_CHG_CNFG_14			= 0xC5,
83 	MAX77693_CHG_REG_SAFEOUT_CTRL			= 0xC6,
84 
85 	MAX77693_PMIC_REG_END,
86 };
87 
88 /* Slave addr = 0x4A: MUIC */
89 enum max77693_muic_reg {
90 	MAX77693_MUIC_REG_ID		= 0x00,
91 	MAX77693_MUIC_REG_INT1		= 0x01,
92 	MAX77693_MUIC_REG_INT2		= 0x02,
93 	MAX77693_MUIC_REG_INT3		= 0x03,
94 	MAX77693_MUIC_REG_STATUS1	= 0x04,
95 	MAX77693_MUIC_REG_STATUS2	= 0x05,
96 	MAX77693_MUIC_REG_STATUS3	= 0x06,
97 	MAX77693_MUIC_REG_INTMASK1	= 0x07,
98 	MAX77693_MUIC_REG_INTMASK2	= 0x08,
99 	MAX77693_MUIC_REG_INTMASK3	= 0x09,
100 	MAX77693_MUIC_REG_CDETCTRL1	= 0x0A,
101 	MAX77693_MUIC_REG_CDETCTRL2	= 0x0B,
102 	MAX77693_MUIC_REG_CTRL1		= 0x0C,
103 	MAX77693_MUIC_REG_CTRL2		= 0x0D,
104 	MAX77693_MUIC_REG_CTRL3		= 0x0E,
105 
106 	MAX77693_MUIC_REG_END,
107 };
108 
109 /* Slave addr = 0x90: Haptic */
110 enum max77693_haptic_reg {
111 	MAX77693_HAPTIC_REG_STATUS		= 0x00,
112 	MAX77693_HAPTIC_REG_CONFIG1		= 0x01,
113 	MAX77693_HAPTIC_REG_CONFIG2		= 0x02,
114 	MAX77693_HAPTIC_REG_CONFIG_CHNL		= 0x03,
115 	MAX77693_HAPTIC_REG_CONFG_CYC1		= 0x04,
116 	MAX77693_HAPTIC_REG_CONFG_CYC2		= 0x05,
117 	MAX77693_HAPTIC_REG_CONFIG_PER1		= 0x06,
118 	MAX77693_HAPTIC_REG_CONFIG_PER2		= 0x07,
119 	MAX77693_HAPTIC_REG_CONFIG_PER3		= 0x08,
120 	MAX77693_HAPTIC_REG_CONFIG_PER4		= 0x09,
121 	MAX77693_HAPTIC_REG_CONFIG_DUTY1	= 0x0A,
122 	MAX77693_HAPTIC_REG_CONFIG_DUTY2	= 0x0B,
123 	MAX77693_HAPTIC_REG_CONFIG_PWM1		= 0x0C,
124 	MAX77693_HAPTIC_REG_CONFIG_PWM2		= 0x0D,
125 	MAX77693_HAPTIC_REG_CONFIG_PWM3		= 0x0E,
126 	MAX77693_HAPTIC_REG_CONFIG_PWM4		= 0x0F,
127 	MAX77693_HAPTIC_REG_REV			= 0x10,
128 
129 	MAX77693_HAPTIC_REG_END,
130 };
131 
132 enum max77693_irq_source {
133 	LED_INT = 0,
134 	TOPSYS_INT,
135 	CHG_INT,
136 	MUIC_INT1,
137 	MUIC_INT2,
138 	MUIC_INT3,
139 
140 	MAX77693_IRQ_GROUP_NR,
141 };
142 
143 enum max77693_irq {
144 	/* PMIC - FLASH */
145 	MAX77693_LED_IRQ_FLED2_OPEN,
146 	MAX77693_LED_IRQ_FLED2_SHORT,
147 	MAX77693_LED_IRQ_FLED1_OPEN,
148 	MAX77693_LED_IRQ_FLED1_SHORT,
149 	MAX77693_LED_IRQ_MAX_FLASH,
150 
151 	/* PMIC - TOPSYS */
152 	MAX77693_TOPSYS_IRQ_T120C_INT,
153 	MAX77693_TOPSYS_IRQ_T140C_INT,
154 	MAX77693_TOPSYS_IRQ_LOWSYS_INT,
155 
156 	/* PMIC - Charger */
157 	MAX77693_CHG_IRQ_BYP_I,
158 	MAX77693_CHG_IRQ_THM_I,
159 	MAX77693_CHG_IRQ_BAT_I,
160 	MAX77693_CHG_IRQ_CHG_I,
161 	MAX77693_CHG_IRQ_CHGIN_I,
162 
163 	/* MUIC INT1 */
164 	MAX77693_MUIC_IRQ_INT1_ADC,
165 	MAX77693_MUIC_IRQ_INT1_ADC_LOW,
166 	MAX77693_MUIC_IRQ_INT1_ADC_ERR,
167 	MAX77693_MUIC_IRQ_INT1_ADC1K,
168 
169 	/* MUIC INT2 */
170 	MAX77693_MUIC_IRQ_INT2_CHGTYP,
171 	MAX77693_MUIC_IRQ_INT2_CHGDETREUN,
172 	MAX77693_MUIC_IRQ_INT2_DCDTMR,
173 	MAX77693_MUIC_IRQ_INT2_DXOVP,
174 	MAX77693_MUIC_IRQ_INT2_VBVOLT,
175 	MAX77693_MUIC_IRQ_INT2_VIDRM,
176 
177 	/* MUIC INT3 */
178 	MAX77693_MUIC_IRQ_INT3_EOC,
179 	MAX77693_MUIC_IRQ_INT3_CGMBC,
180 	MAX77693_MUIC_IRQ_INT3_OVP,
181 	MAX77693_MUIC_IRQ_INT3_MBCCHG_ERR,
182 	MAX77693_MUIC_IRQ_INT3_CHG_ENABLED,
183 	MAX77693_MUIC_IRQ_INT3_BAT_DET,
184 
185 	MAX77693_IRQ_NR,
186 };
187 
188 struct max77693_dev {
189 	struct device *dev;
190 	struct i2c_client *i2c;		/* 0xCC , PMIC, Charger, Flash LED */
191 	struct i2c_client *muic;	/* 0x4A , MUIC */
192 	struct i2c_client *haptic;	/* 0x90 , Haptic */
193 
194 	int type;
195 
196 	struct regmap *regmap;
197 	struct regmap *regmap_muic;
198 	struct regmap *regmap_haptic;
199 
200 	struct irq_domain *irq_domain;
201 
202 	int irq;
203 	int irq_gpio;
204 	bool wakeup;
205 	struct mutex irqlock;
206 	int irq_masks_cur[MAX77693_IRQ_GROUP_NR];
207 	int irq_masks_cache[MAX77693_IRQ_GROUP_NR];
208 };
209 
210 enum max77693_types {
211 	TYPE_MAX77693,
212 };
213 
214 extern int max77693_read_reg(struct regmap *map, u8 reg, u8 *dest);
215 extern int max77693_bulk_read(struct regmap *map, u8 reg, int count,
216 				u8 *buf);
217 extern int max77693_write_reg(struct regmap *map, u8 reg, u8 value);
218 extern int max77693_bulk_write(struct regmap *map, u8 reg, int count,
219 				u8 *buf);
220 extern int max77693_update_reg(struct regmap *map, u8 reg, u8 val, u8 mask);
221 
222 extern int max77693_irq_init(struct max77693_dev *max77686);
223 extern void max77693_irq_exit(struct max77693_dev *max77686);
224 extern int max77693_irq_resume(struct max77693_dev *max77686);
225 
226 #endif /*  __LINUX_MFD_MAX77693_PRIV_H */
227