1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2dcc21cc0SLinus Walleij /*
3dcc21cc0SLinus Walleij * Header file for the compaq Micro MFD
4dcc21cc0SLinus Walleij */
5dcc21cc0SLinus Walleij
6dcc21cc0SLinus Walleij #ifndef _MFD_IPAQ_MICRO_H_
7dcc21cc0SLinus Walleij #define _MFD_IPAQ_MICRO_H_
8dcc21cc0SLinus Walleij
9dcc21cc0SLinus Walleij #include <linux/spinlock.h>
10dcc21cc0SLinus Walleij #include <linux/completion.h>
11dcc21cc0SLinus Walleij #include <linux/list.h>
12dcc21cc0SLinus Walleij
13dcc21cc0SLinus Walleij #define TX_BUF_SIZE 32
14dcc21cc0SLinus Walleij #define RX_BUF_SIZE 16
15dcc21cc0SLinus Walleij #define CHAR_SOF 0x02
16dcc21cc0SLinus Walleij
17dcc21cc0SLinus Walleij /*
18dcc21cc0SLinus Walleij * These are the different messages that can be sent to the microcontroller
19dcc21cc0SLinus Walleij * to control various aspects.
20dcc21cc0SLinus Walleij */
21dcc21cc0SLinus Walleij #define MSG_VERSION 0x0
22dcc21cc0SLinus Walleij #define MSG_KEYBOARD 0x2
23dcc21cc0SLinus Walleij #define MSG_TOUCHSCREEN 0x3
24dcc21cc0SLinus Walleij #define MSG_EEPROM_READ 0x4
25dcc21cc0SLinus Walleij #define MSG_EEPROM_WRITE 0x5
26dcc21cc0SLinus Walleij #define MSG_THERMAL_SENSOR 0x6
27dcc21cc0SLinus Walleij #define MSG_NOTIFY_LED 0x8
28dcc21cc0SLinus Walleij #define MSG_BATTERY 0x9
29dcc21cc0SLinus Walleij #define MSG_SPI_READ 0xb
30dcc21cc0SLinus Walleij #define MSG_SPI_WRITE 0xc
31dcc21cc0SLinus Walleij #define MSG_BACKLIGHT 0xd /* H3600 only */
32dcc21cc0SLinus Walleij #define MSG_CODEC_CTRL 0xe /* H3100 only */
33dcc21cc0SLinus Walleij #define MSG_DISPLAY_CTRL 0xf /* H3100 only */
34dcc21cc0SLinus Walleij
35dcc21cc0SLinus Walleij /* state of receiver parser */
36dcc21cc0SLinus Walleij enum rx_state {
37dcc21cc0SLinus Walleij STATE_SOF = 0, /* Next byte should be start of frame */
38dcc21cc0SLinus Walleij STATE_ID, /* Next byte is ID & message length */
39dcc21cc0SLinus Walleij STATE_DATA, /* Next byte is a data byte */
40dcc21cc0SLinus Walleij STATE_CHKSUM /* Next byte should be checksum */
41dcc21cc0SLinus Walleij };
42dcc21cc0SLinus Walleij
43dcc21cc0SLinus Walleij /**
44dcc21cc0SLinus Walleij * struct ipaq_micro_txdev - TX state
45dcc21cc0SLinus Walleij * @len: length of message in TX buffer
46dcc21cc0SLinus Walleij * @index: current index into TX buffer
47dcc21cc0SLinus Walleij * @buf: TX buffer
48dcc21cc0SLinus Walleij */
49dcc21cc0SLinus Walleij struct ipaq_micro_txdev {
50dcc21cc0SLinus Walleij u8 len;
51dcc21cc0SLinus Walleij u8 index;
52dcc21cc0SLinus Walleij u8 buf[TX_BUF_SIZE];
53dcc21cc0SLinus Walleij };
54dcc21cc0SLinus Walleij
55dcc21cc0SLinus Walleij /**
56dcc21cc0SLinus Walleij * struct ipaq_micro_rxdev - RX state
57dcc21cc0SLinus Walleij * @state: context of RX state machine
58dcc21cc0SLinus Walleij * @chksum: calculated checksum
59dcc21cc0SLinus Walleij * @id: message ID from packet
60dcc21cc0SLinus Walleij * @len: RX buffer length
61dcc21cc0SLinus Walleij * @index: RX buffer index
62dcc21cc0SLinus Walleij * @buf: RX buffer
63dcc21cc0SLinus Walleij */
64dcc21cc0SLinus Walleij struct ipaq_micro_rxdev {
65dcc21cc0SLinus Walleij enum rx_state state;
66dcc21cc0SLinus Walleij unsigned char chksum;
67dcc21cc0SLinus Walleij u8 id;
68dcc21cc0SLinus Walleij unsigned int len;
69dcc21cc0SLinus Walleij unsigned int index;
70dcc21cc0SLinus Walleij u8 buf[RX_BUF_SIZE];
71dcc21cc0SLinus Walleij };
72dcc21cc0SLinus Walleij
73dcc21cc0SLinus Walleij /**
74dcc21cc0SLinus Walleij * struct ipaq_micro_msg - message to the iPAQ microcontroller
75dcc21cc0SLinus Walleij * @id: 4-bit ID of the message
76dcc21cc0SLinus Walleij * @tx_len: length of TX data
77dcc21cc0SLinus Walleij * @tx_data: TX data to send
78*79f821b5SZhang Jiaming * @rx_len: length of received RX data
79*79f821b5SZhang Jiaming * @rx_data: RX data to receive
80dcc21cc0SLinus Walleij * @ack: a completion that will be completed when RX is complete
81dcc21cc0SLinus Walleij * @node: list node if message gets queued
82dcc21cc0SLinus Walleij */
83dcc21cc0SLinus Walleij struct ipaq_micro_msg {
84dcc21cc0SLinus Walleij u8 id;
85dcc21cc0SLinus Walleij u8 tx_len;
86dcc21cc0SLinus Walleij u8 tx_data[TX_BUF_SIZE];
87dcc21cc0SLinus Walleij u8 rx_len;
88dcc21cc0SLinus Walleij u8 rx_data[RX_BUF_SIZE];
89dcc21cc0SLinus Walleij struct completion ack;
90dcc21cc0SLinus Walleij struct list_head node;
91dcc21cc0SLinus Walleij };
92dcc21cc0SLinus Walleij
93dcc21cc0SLinus Walleij /**
94dcc21cc0SLinus Walleij * struct ipaq_micro - iPAQ microcontroller state
95dcc21cc0SLinus Walleij * @dev: corresponding platform device
96dcc21cc0SLinus Walleij * @base: virtual memory base for underlying serial device
97dcc21cc0SLinus Walleij * @sdlc: virtual memory base for Synchronous Data Link Controller
98dcc21cc0SLinus Walleij * @version: version string
99dcc21cc0SLinus Walleij * @tx: TX state
100dcc21cc0SLinus Walleij * @rx: RX state
101dcc21cc0SLinus Walleij * @lock: lock for this state container
102dcc21cc0SLinus Walleij * @msg: current message
103dcc21cc0SLinus Walleij * @queue: message queue
104dcc21cc0SLinus Walleij * @key: callback for asynchronous key events
105dcc21cc0SLinus Walleij * @key_data: data to pass along with key events
106dcc21cc0SLinus Walleij * @ts: callback for asynchronous touchscreen events
107dcc21cc0SLinus Walleij * @ts_data: data to pass along with key events
108dcc21cc0SLinus Walleij */
109dcc21cc0SLinus Walleij struct ipaq_micro {
110dcc21cc0SLinus Walleij struct device *dev;
111dcc21cc0SLinus Walleij void __iomem *base;
112dcc21cc0SLinus Walleij void __iomem *sdlc;
113dcc21cc0SLinus Walleij char version[5];
114dcc21cc0SLinus Walleij struct ipaq_micro_txdev tx; /* transmit ISR state */
115dcc21cc0SLinus Walleij struct ipaq_micro_rxdev rx; /* receive ISR state */
116dcc21cc0SLinus Walleij spinlock_t lock;
117dcc21cc0SLinus Walleij struct ipaq_micro_msg *msg;
118dcc21cc0SLinus Walleij struct list_head queue;
119dcc21cc0SLinus Walleij void (*key) (void *data, int len, unsigned char *rxdata);
120dcc21cc0SLinus Walleij void *key_data;
121dcc21cc0SLinus Walleij void (*ts) (void *data, int len, unsigned char *rxdata);
122dcc21cc0SLinus Walleij void *ts_data;
123dcc21cc0SLinus Walleij };
124dcc21cc0SLinus Walleij
125dcc21cc0SLinus Walleij extern int
126dcc21cc0SLinus Walleij ipaq_micro_tx_msg(struct ipaq_micro *micro, struct ipaq_micro_msg *msg);
127dcc21cc0SLinus Walleij
128dcc21cc0SLinus Walleij static inline int
ipaq_micro_tx_msg_sync(struct ipaq_micro * micro,struct ipaq_micro_msg * msg)129dcc21cc0SLinus Walleij ipaq_micro_tx_msg_sync(struct ipaq_micro *micro,
130dcc21cc0SLinus Walleij struct ipaq_micro_msg *msg)
131dcc21cc0SLinus Walleij {
132dcc21cc0SLinus Walleij int ret;
133dcc21cc0SLinus Walleij
134dcc21cc0SLinus Walleij init_completion(&msg->ack);
135dcc21cc0SLinus Walleij ret = ipaq_micro_tx_msg(micro, msg);
136dcc21cc0SLinus Walleij wait_for_completion(&msg->ack);
137dcc21cc0SLinus Walleij
138dcc21cc0SLinus Walleij return ret;
139dcc21cc0SLinus Walleij }
140dcc21cc0SLinus Walleij
141dcc21cc0SLinus Walleij static inline int
ipaq_micro_tx_msg_async(struct ipaq_micro * micro,struct ipaq_micro_msg * msg)142dcc21cc0SLinus Walleij ipaq_micro_tx_msg_async(struct ipaq_micro *micro,
143dcc21cc0SLinus Walleij struct ipaq_micro_msg *msg)
144dcc21cc0SLinus Walleij {
145dcc21cc0SLinus Walleij init_completion(&msg->ack);
146dcc21cc0SLinus Walleij return ipaq_micro_tx_msg(micro, msg);
147dcc21cc0SLinus Walleij }
148dcc21cc0SLinus Walleij
149dcc21cc0SLinus Walleij #endif /* _MFD_IPAQ_MICRO_H_ */
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