1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Functions and registers to access AXP20X power management chip. 4 * 5 * Copyright (C) 2013, Carlo Caione <[email protected]> 6 */ 7 8 #ifndef __LINUX_MFD_AXP20X_H 9 #define __LINUX_MFD_AXP20X_H 10 11 #include <linux/regmap.h> 12 13 enum axp20x_variants { 14 AXP152_ID = 0, 15 AXP202_ID, 16 AXP209_ID, 17 AXP221_ID, 18 AXP223_ID, 19 AXP288_ID, 20 AXP803_ID, 21 AXP806_ID, 22 AXP809_ID, 23 AXP813_ID, 24 AXP15060_ID, 25 NR_AXP20X_VARIANTS, 26 }; 27 28 #define AXP20X_DATACACHE(m) (0x04 + (m)) 29 30 /* Power supply */ 31 #define AXP152_PWR_OP_MODE 0x01 32 #define AXP152_LDO3456_DC1234_CTRL 0x12 33 #define AXP152_ALDO_OP_MODE 0x13 34 #define AXP152_LDO0_CTRL 0x15 35 #define AXP152_DCDC2_V_OUT 0x23 36 #define AXP152_DCDC2_V_RAMP 0x25 37 #define AXP152_DCDC1_V_OUT 0x26 38 #define AXP152_DCDC3_V_OUT 0x27 39 #define AXP152_ALDO12_V_OUT 0x28 40 #define AXP152_DLDO1_V_OUT 0x29 41 #define AXP152_DLDO2_V_OUT 0x2a 42 #define AXP152_DCDC4_V_OUT 0x2b 43 #define AXP152_V_OFF 0x31 44 #define AXP152_OFF_CTRL 0x32 45 #define AXP152_PEK_KEY 0x36 46 #define AXP152_DCDC_FREQ 0x37 47 #define AXP152_DCDC_MODE 0x80 48 49 #define AXP20X_PWR_INPUT_STATUS 0x00 50 #define AXP20X_PWR_OP_MODE 0x01 51 #define AXP20X_USB_OTG_STATUS 0x02 52 #define AXP20X_PWR_OUT_CTRL 0x12 53 #define AXP20X_DCDC2_V_OUT 0x23 54 #define AXP20X_DCDC2_LDO3_V_RAMP 0x25 55 #define AXP20X_DCDC3_V_OUT 0x27 56 #define AXP20X_LDO24_V_OUT 0x28 57 #define AXP20X_LDO3_V_OUT 0x29 58 #define AXP20X_VBUS_IPSOUT_MGMT 0x30 59 #define AXP20X_V_OFF 0x31 60 #define AXP20X_OFF_CTRL 0x32 61 #define AXP20X_CHRG_CTRL1 0x33 62 #define AXP20X_CHRG_CTRL2 0x34 63 #define AXP20X_CHRG_BAK_CTRL 0x35 64 #define AXP20X_PEK_KEY 0x36 65 #define AXP20X_DCDC_FREQ 0x37 66 #define AXP20X_V_LTF_CHRG 0x38 67 #define AXP20X_V_HTF_CHRG 0x39 68 #define AXP20X_APS_WARN_L1 0x3a 69 #define AXP20X_APS_WARN_L2 0x3b 70 #define AXP20X_V_LTF_DISCHRG 0x3c 71 #define AXP20X_V_HTF_DISCHRG 0x3d 72 73 #define AXP22X_PWR_OUT_CTRL1 0x10 74 #define AXP22X_PWR_OUT_CTRL2 0x12 75 #define AXP22X_PWR_OUT_CTRL3 0x13 76 #define AXP22X_DLDO1_V_OUT 0x15 77 #define AXP22X_DLDO2_V_OUT 0x16 78 #define AXP22X_DLDO3_V_OUT 0x17 79 #define AXP22X_DLDO4_V_OUT 0x18 80 #define AXP22X_ELDO1_V_OUT 0x19 81 #define AXP22X_ELDO2_V_OUT 0x1a 82 #define AXP22X_ELDO3_V_OUT 0x1b 83 #define AXP22X_DC5LDO_V_OUT 0x1c 84 #define AXP22X_DCDC1_V_OUT 0x21 85 #define AXP22X_DCDC2_V_OUT 0x22 86 #define AXP22X_DCDC3_V_OUT 0x23 87 #define AXP22X_DCDC4_V_OUT 0x24 88 #define AXP22X_DCDC5_V_OUT 0x25 89 #define AXP22X_DCDC23_V_RAMP_CTRL 0x27 90 #define AXP22X_ALDO1_V_OUT 0x28 91 #define AXP22X_ALDO2_V_OUT 0x29 92 #define AXP22X_ALDO3_V_OUT 0x2a 93 #define AXP22X_CHRG_CTRL3 0x35 94 95 #define AXP806_STARTUP_SRC 0x00 96 #define AXP806_CHIP_ID 0x03 97 #define AXP806_PWR_OUT_CTRL1 0x10 98 #define AXP806_PWR_OUT_CTRL2 0x11 99 #define AXP806_DCDCA_V_CTRL 0x12 100 #define AXP806_DCDCB_V_CTRL 0x13 101 #define AXP806_DCDCC_V_CTRL 0x14 102 #define AXP806_DCDCD_V_CTRL 0x15 103 #define AXP806_DCDCE_V_CTRL 0x16 104 #define AXP806_ALDO1_V_CTRL 0x17 105 #define AXP806_ALDO2_V_CTRL 0x18 106 #define AXP806_ALDO3_V_CTRL 0x19 107 #define AXP806_DCDC_MODE_CTRL1 0x1a 108 #define AXP806_DCDC_MODE_CTRL2 0x1b 109 #define AXP806_DCDC_FREQ_CTRL 0x1c 110 #define AXP806_BLDO1_V_CTRL 0x20 111 #define AXP806_BLDO2_V_CTRL 0x21 112 #define AXP806_BLDO3_V_CTRL 0x22 113 #define AXP806_BLDO4_V_CTRL 0x23 114 #define AXP806_CLDO1_V_CTRL 0x24 115 #define AXP806_CLDO2_V_CTRL 0x25 116 #define AXP806_CLDO3_V_CTRL 0x26 117 #define AXP806_VREF_TEMP_WARN_L 0xf3 118 #define AXP806_BUS_ADDR_EXT 0xfe 119 #define AXP806_REG_ADDR_EXT 0xff 120 121 #define AXP803_POLYPHASE_CTRL 0x14 122 #define AXP803_FLDO1_V_OUT 0x1c 123 #define AXP803_FLDO2_V_OUT 0x1d 124 #define AXP803_DCDC1_V_OUT 0x20 125 #define AXP803_DCDC2_V_OUT 0x21 126 #define AXP803_DCDC3_V_OUT 0x22 127 #define AXP803_DCDC4_V_OUT 0x23 128 #define AXP803_DCDC5_V_OUT 0x24 129 #define AXP803_DCDC6_V_OUT 0x25 130 #define AXP803_DCDC_FREQ_CTRL 0x3b 131 132 /* Other DCDC regulator control registers are the same as AXP803 */ 133 #define AXP813_DCDC7_V_OUT 0x26 134 135 #define AXP15060_STARTUP_SRC 0x00 136 #define AXP15060_PWR_OUT_CTRL1 0x10 137 #define AXP15060_PWR_OUT_CTRL2 0x11 138 #define AXP15060_PWR_OUT_CTRL3 0x12 139 #define AXP15060_DCDC1_V_CTRL 0x13 140 #define AXP15060_DCDC2_V_CTRL 0x14 141 #define AXP15060_DCDC3_V_CTRL 0x15 142 #define AXP15060_DCDC4_V_CTRL 0x16 143 #define AXP15060_DCDC5_V_CTRL 0x17 144 #define AXP15060_DCDC6_V_CTRL 0x18 145 #define AXP15060_ALDO1_V_CTRL 0x19 146 #define AXP15060_DCDC_MODE_CTRL1 0x1a 147 #define AXP15060_DCDC_MODE_CTRL2 0x1b 148 #define AXP15060_OUTPUT_MONITOR_DISCHARGE 0x1e 149 #define AXP15060_IRQ_PWROK_VOFF 0x1f 150 #define AXP15060_ALDO2_V_CTRL 0x20 151 #define AXP15060_ALDO3_V_CTRL 0x21 152 #define AXP15060_ALDO4_V_CTRL 0x22 153 #define AXP15060_ALDO5_V_CTRL 0x23 154 #define AXP15060_BLDO1_V_CTRL 0x24 155 #define AXP15060_BLDO2_V_CTRL 0x25 156 #define AXP15060_BLDO3_V_CTRL 0x26 157 #define AXP15060_BLDO4_V_CTRL 0x27 158 #define AXP15060_BLDO5_V_CTRL 0x28 159 #define AXP15060_CLDO1_V_CTRL 0x29 160 #define AXP15060_CLDO2_V_CTRL 0x2a 161 #define AXP15060_CLDO3_V_CTRL 0x2b 162 #define AXP15060_CLDO4_V_CTRL 0x2d 163 #define AXP15060_CPUSLDO_V_CTRL 0x2e 164 #define AXP15060_PWR_WAKEUP_CTRL 0x31 165 #define AXP15060_PWR_DISABLE_DOWN_SEQ 0x32 166 #define AXP15060_PEK_KEY 0x36 167 168 /* Interrupt */ 169 #define AXP152_IRQ1_EN 0x40 170 #define AXP152_IRQ2_EN 0x41 171 #define AXP152_IRQ3_EN 0x42 172 #define AXP152_IRQ1_STATE 0x48 173 #define AXP152_IRQ2_STATE 0x49 174 #define AXP152_IRQ3_STATE 0x4a 175 176 #define AXP20X_IRQ1_EN 0x40 177 #define AXP20X_IRQ2_EN 0x41 178 #define AXP20X_IRQ3_EN 0x42 179 #define AXP20X_IRQ4_EN 0x43 180 #define AXP20X_IRQ5_EN 0x44 181 #define AXP20X_IRQ6_EN 0x45 182 #define AXP20X_IRQ1_STATE 0x48 183 #define AXP20X_IRQ2_STATE 0x49 184 #define AXP20X_IRQ3_STATE 0x4a 185 #define AXP20X_IRQ4_STATE 0x4b 186 #define AXP20X_IRQ5_STATE 0x4c 187 #define AXP20X_IRQ6_STATE 0x4d 188 189 #define AXP15060_IRQ1_EN 0x40 190 #define AXP15060_IRQ2_EN 0x41 191 #define AXP15060_IRQ1_STATE 0x48 192 #define AXP15060_IRQ2_STATE 0x49 193 194 /* ADC */ 195 #define AXP20X_ACIN_V_ADC_H 0x56 196 #define AXP20X_ACIN_V_ADC_L 0x57 197 #define AXP20X_ACIN_I_ADC_H 0x58 198 #define AXP20X_ACIN_I_ADC_L 0x59 199 #define AXP20X_VBUS_V_ADC_H 0x5a 200 #define AXP20X_VBUS_V_ADC_L 0x5b 201 #define AXP20X_VBUS_I_ADC_H 0x5c 202 #define AXP20X_VBUS_I_ADC_L 0x5d 203 #define AXP20X_TEMP_ADC_H 0x5e 204 #define AXP20X_TEMP_ADC_L 0x5f 205 #define AXP20X_TS_IN_H 0x62 206 #define AXP20X_TS_IN_L 0x63 207 #define AXP20X_GPIO0_V_ADC_H 0x64 208 #define AXP20X_GPIO0_V_ADC_L 0x65 209 #define AXP20X_GPIO1_V_ADC_H 0x66 210 #define AXP20X_GPIO1_V_ADC_L 0x67 211 #define AXP20X_PWR_BATT_H 0x70 212 #define AXP20X_PWR_BATT_M 0x71 213 #define AXP20X_PWR_BATT_L 0x72 214 #define AXP20X_BATT_V_H 0x78 215 #define AXP20X_BATT_V_L 0x79 216 #define AXP20X_BATT_CHRG_I_H 0x7a 217 #define AXP20X_BATT_CHRG_I_L 0x7b 218 #define AXP20X_BATT_DISCHRG_I_H 0x7c 219 #define AXP20X_BATT_DISCHRG_I_L 0x7d 220 #define AXP20X_IPSOUT_V_HIGH_H 0x7e 221 #define AXP20X_IPSOUT_V_HIGH_L 0x7f 222 223 /* Power supply */ 224 #define AXP20X_DCDC_MODE 0x80 225 #define AXP20X_ADC_EN1 0x82 226 #define AXP20X_ADC_EN2 0x83 227 #define AXP20X_ADC_RATE 0x84 228 #define AXP20X_GPIO10_IN_RANGE 0x85 229 #define AXP20X_GPIO1_ADC_IRQ_RIS 0x86 230 #define AXP20X_GPIO1_ADC_IRQ_FAL 0x87 231 #define AXP20X_TIMER_CTRL 0x8a 232 #define AXP20X_VBUS_MON 0x8b 233 #define AXP20X_OVER_TMP 0x8f 234 235 #define AXP22X_PWREN_CTRL1 0x8c 236 #define AXP22X_PWREN_CTRL2 0x8d 237 238 /* GPIO */ 239 #define AXP152_GPIO0_CTRL 0x90 240 #define AXP152_GPIO1_CTRL 0x91 241 #define AXP152_GPIO2_CTRL 0x92 242 #define AXP152_GPIO3_CTRL 0x93 243 #define AXP152_LDOGPIO2_V_OUT 0x96 244 #define AXP152_GPIO_INPUT 0x97 245 #define AXP152_PWM0_FREQ_X 0x98 246 #define AXP152_PWM0_FREQ_Y 0x99 247 #define AXP152_PWM0_DUTY_CYCLE 0x9a 248 #define AXP152_PWM1_FREQ_X 0x9b 249 #define AXP152_PWM1_FREQ_Y 0x9c 250 #define AXP152_PWM1_DUTY_CYCLE 0x9d 251 252 #define AXP20X_GPIO0_CTRL 0x90 253 #define AXP20X_LDO5_V_OUT 0x91 254 #define AXP20X_GPIO1_CTRL 0x92 255 #define AXP20X_GPIO2_CTRL 0x93 256 #define AXP20X_GPIO20_SS 0x94 257 #define AXP20X_GPIO3_CTRL 0x95 258 259 #define AXP22X_LDO_IO0_V_OUT 0x91 260 #define AXP22X_LDO_IO1_V_OUT 0x93 261 #define AXP22X_GPIO_STATE 0x94 262 #define AXP22X_GPIO_PULL_DOWN 0x95 263 264 #define AXP15060_CLDO4_GPIO2_MODESET 0x2c 265 266 /* Battery */ 267 #define AXP20X_CHRG_CC_31_24 0xb0 268 #define AXP20X_CHRG_CC_23_16 0xb1 269 #define AXP20X_CHRG_CC_15_8 0xb2 270 #define AXP20X_CHRG_CC_7_0 0xb3 271 #define AXP20X_DISCHRG_CC_31_24 0xb4 272 #define AXP20X_DISCHRG_CC_23_16 0xb5 273 #define AXP20X_DISCHRG_CC_15_8 0xb6 274 #define AXP20X_DISCHRG_CC_7_0 0xb7 275 #define AXP20X_CC_CTRL 0xb8 276 #define AXP20X_FG_RES 0xb9 277 278 /* OCV */ 279 #define AXP20X_RDC_H 0xba 280 #define AXP20X_RDC_L 0xbb 281 #define AXP20X_OCV(m) (0xc0 + (m)) 282 #define AXP20X_OCV_MAX 0xf 283 284 /* AXP22X specific registers */ 285 #define AXP22X_PMIC_TEMP_H 0x56 286 #define AXP22X_PMIC_TEMP_L 0x57 287 #define AXP22X_TS_ADC_H 0x58 288 #define AXP22X_TS_ADC_L 0x59 289 #define AXP22X_BATLOW_THRES1 0xe6 290 291 /* AXP288/AXP803 specific registers */ 292 #define AXP288_POWER_REASON 0x02 293 #define AXP288_BC_GLOBAL 0x2c 294 #define AXP288_BC_VBUS_CNTL 0x2d 295 #define AXP288_BC_USB_STAT 0x2e 296 #define AXP288_BC_DET_STAT 0x2f 297 #define AXP288_PMIC_ADC_H 0x56 298 #define AXP288_PMIC_ADC_L 0x57 299 #define AXP288_TS_ADC_H 0x58 300 #define AXP288_TS_ADC_L 0x59 301 #define AXP288_GP_ADC_H 0x5a 302 #define AXP288_GP_ADC_L 0x5b 303 #define AXP288_ADC_TS_PIN_CTRL 0x84 304 #define AXP288_RT_BATT_V_H 0xa0 305 #define AXP288_RT_BATT_V_L 0xa1 306 307 #define AXP813_ACIN_PATH_CTRL 0x3a 308 #define AXP813_ADC_RATE 0x85 309 310 /* Fuel Gauge */ 311 #define AXP288_FG_RDC1_REG 0xba 312 #define AXP288_FG_RDC0_REG 0xbb 313 #define AXP288_FG_OCVH_REG 0xbc 314 #define AXP288_FG_OCVL_REG 0xbd 315 #define AXP288_FG_OCV_CURVE_REG 0xc0 316 #define AXP288_FG_DES_CAP1_REG 0xe0 317 #define AXP288_FG_DES_CAP0_REG 0xe1 318 #define AXP288_FG_CC_MTR1_REG 0xe2 319 #define AXP288_FG_CC_MTR0_REG 0xe3 320 #define AXP288_FG_OCV_CAP_REG 0xe4 321 #define AXP288_FG_CC_CAP_REG 0xe5 322 #define AXP288_FG_LOW_CAP_REG 0xe6 323 #define AXP288_FG_TUNE0 0xe8 324 #define AXP288_FG_TUNE1 0xe9 325 #define AXP288_FG_TUNE2 0xea 326 #define AXP288_FG_TUNE3 0xeb 327 #define AXP288_FG_TUNE4 0xec 328 #define AXP288_FG_TUNE5 0xed 329 330 /* Regulators IDs */ 331 enum { 332 AXP20X_LDO1 = 0, 333 AXP20X_LDO2, 334 AXP20X_LDO3, 335 AXP20X_LDO4, 336 AXP20X_LDO5, 337 AXP20X_DCDC2, 338 AXP20X_DCDC3, 339 AXP20X_REG_ID_MAX, 340 }; 341 342 enum { 343 AXP22X_DCDC1 = 0, 344 AXP22X_DCDC2, 345 AXP22X_DCDC3, 346 AXP22X_DCDC4, 347 AXP22X_DCDC5, 348 AXP22X_DC1SW, 349 AXP22X_DC5LDO, 350 AXP22X_ALDO1, 351 AXP22X_ALDO2, 352 AXP22X_ALDO3, 353 AXP22X_ELDO1, 354 AXP22X_ELDO2, 355 AXP22X_ELDO3, 356 AXP22X_DLDO1, 357 AXP22X_DLDO2, 358 AXP22X_DLDO3, 359 AXP22X_DLDO4, 360 AXP22X_RTC_LDO, 361 AXP22X_LDO_IO0, 362 AXP22X_LDO_IO1, 363 AXP22X_REG_ID_MAX, 364 }; 365 366 enum { 367 AXP806_DCDCA = 0, 368 AXP806_DCDCB, 369 AXP806_DCDCC, 370 AXP806_DCDCD, 371 AXP806_DCDCE, 372 AXP806_ALDO1, 373 AXP806_ALDO2, 374 AXP806_ALDO3, 375 AXP806_BLDO1, 376 AXP806_BLDO2, 377 AXP806_BLDO3, 378 AXP806_BLDO4, 379 AXP806_CLDO1, 380 AXP806_CLDO2, 381 AXP806_CLDO3, 382 AXP806_SW, 383 AXP806_REG_ID_MAX, 384 }; 385 386 enum { 387 AXP809_DCDC1 = 0, 388 AXP809_DCDC2, 389 AXP809_DCDC3, 390 AXP809_DCDC4, 391 AXP809_DCDC5, 392 AXP809_DC1SW, 393 AXP809_DC5LDO, 394 AXP809_ALDO1, 395 AXP809_ALDO2, 396 AXP809_ALDO3, 397 AXP809_ELDO1, 398 AXP809_ELDO2, 399 AXP809_ELDO3, 400 AXP809_DLDO1, 401 AXP809_DLDO2, 402 AXP809_RTC_LDO, 403 AXP809_LDO_IO0, 404 AXP809_LDO_IO1, 405 AXP809_SW, 406 AXP809_REG_ID_MAX, 407 }; 408 409 enum { 410 AXP803_DCDC1 = 0, 411 AXP803_DCDC2, 412 AXP803_DCDC3, 413 AXP803_DCDC4, 414 AXP803_DCDC5, 415 AXP803_DCDC6, 416 AXP803_DC1SW, 417 AXP803_ALDO1, 418 AXP803_ALDO2, 419 AXP803_ALDO3, 420 AXP803_DLDO1, 421 AXP803_DLDO2, 422 AXP803_DLDO3, 423 AXP803_DLDO4, 424 AXP803_ELDO1, 425 AXP803_ELDO2, 426 AXP803_ELDO3, 427 AXP803_FLDO1, 428 AXP803_FLDO2, 429 AXP803_RTC_LDO, 430 AXP803_LDO_IO0, 431 AXP803_LDO_IO1, 432 AXP803_REG_ID_MAX, 433 }; 434 435 enum { 436 AXP813_DCDC1 = 0, 437 AXP813_DCDC2, 438 AXP813_DCDC3, 439 AXP813_DCDC4, 440 AXP813_DCDC5, 441 AXP813_DCDC6, 442 AXP813_DCDC7, 443 AXP813_ALDO1, 444 AXP813_ALDO2, 445 AXP813_ALDO3, 446 AXP813_DLDO1, 447 AXP813_DLDO2, 448 AXP813_DLDO3, 449 AXP813_DLDO4, 450 AXP813_ELDO1, 451 AXP813_ELDO2, 452 AXP813_ELDO3, 453 AXP813_FLDO1, 454 AXP813_FLDO2, 455 AXP813_FLDO3, 456 AXP813_RTC_LDO, 457 AXP813_LDO_IO0, 458 AXP813_LDO_IO1, 459 AXP813_SW, 460 AXP813_REG_ID_MAX, 461 }; 462 463 enum { 464 AXP15060_DCDC1 = 0, 465 AXP15060_DCDC2, 466 AXP15060_DCDC3, 467 AXP15060_DCDC4, 468 AXP15060_DCDC5, 469 AXP15060_DCDC6, 470 AXP15060_ALDO1, 471 AXP15060_ALDO2, 472 AXP15060_ALDO3, 473 AXP15060_ALDO4, 474 AXP15060_ALDO5, 475 AXP15060_BLDO1, 476 AXP15060_BLDO2, 477 AXP15060_BLDO3, 478 AXP15060_BLDO4, 479 AXP15060_BLDO5, 480 AXP15060_CLDO1, 481 AXP15060_CLDO2, 482 AXP15060_CLDO3, 483 AXP15060_CLDO4, 484 AXP15060_CPUSLDO, 485 AXP15060_SW, 486 AXP15060_RTC_LDO, 487 AXP15060_REG_ID_MAX, 488 }; 489 490 /* IRQs */ 491 enum { 492 AXP152_IRQ_LDO0IN_CONNECT = 1, 493 AXP152_IRQ_LDO0IN_REMOVAL, 494 AXP152_IRQ_ALDO0IN_CONNECT, 495 AXP152_IRQ_ALDO0IN_REMOVAL, 496 AXP152_IRQ_DCDC1_V_LOW, 497 AXP152_IRQ_DCDC2_V_LOW, 498 AXP152_IRQ_DCDC3_V_LOW, 499 AXP152_IRQ_DCDC4_V_LOW, 500 AXP152_IRQ_PEK_SHORT, 501 AXP152_IRQ_PEK_LONG, 502 AXP152_IRQ_TIMER, 503 /* out of bit order to make sure the press event is handled first */ 504 AXP152_IRQ_PEK_FAL_EDGE, 505 AXP152_IRQ_PEK_RIS_EDGE, 506 AXP152_IRQ_GPIO3_INPUT, 507 AXP152_IRQ_GPIO2_INPUT, 508 AXP152_IRQ_GPIO1_INPUT, 509 AXP152_IRQ_GPIO0_INPUT, 510 }; 511 512 enum { 513 AXP20X_IRQ_ACIN_OVER_V = 1, 514 AXP20X_IRQ_ACIN_PLUGIN, 515 AXP20X_IRQ_ACIN_REMOVAL, 516 AXP20X_IRQ_VBUS_OVER_V, 517 AXP20X_IRQ_VBUS_PLUGIN, 518 AXP20X_IRQ_VBUS_REMOVAL, 519 AXP20X_IRQ_VBUS_V_LOW, 520 AXP20X_IRQ_BATT_PLUGIN, 521 AXP20X_IRQ_BATT_REMOVAL, 522 AXP20X_IRQ_BATT_ENT_ACT_MODE, 523 AXP20X_IRQ_BATT_EXIT_ACT_MODE, 524 AXP20X_IRQ_CHARG, 525 AXP20X_IRQ_CHARG_DONE, 526 AXP20X_IRQ_BATT_TEMP_HIGH, 527 AXP20X_IRQ_BATT_TEMP_LOW, 528 AXP20X_IRQ_DIE_TEMP_HIGH, 529 AXP20X_IRQ_CHARG_I_LOW, 530 AXP20X_IRQ_DCDC1_V_LONG, 531 AXP20X_IRQ_DCDC2_V_LONG, 532 AXP20X_IRQ_DCDC3_V_LONG, 533 AXP20X_IRQ_PEK_SHORT = 22, 534 AXP20X_IRQ_PEK_LONG, 535 AXP20X_IRQ_N_OE_PWR_ON, 536 AXP20X_IRQ_N_OE_PWR_OFF, 537 AXP20X_IRQ_VBUS_VALID, 538 AXP20X_IRQ_VBUS_NOT_VALID, 539 AXP20X_IRQ_VBUS_SESS_VALID, 540 AXP20X_IRQ_VBUS_SESS_END, 541 AXP20X_IRQ_LOW_PWR_LVL1, 542 AXP20X_IRQ_LOW_PWR_LVL2, 543 AXP20X_IRQ_TIMER, 544 /* out of bit order to make sure the press event is handled first */ 545 AXP20X_IRQ_PEK_FAL_EDGE, 546 AXP20X_IRQ_PEK_RIS_EDGE, 547 AXP20X_IRQ_GPIO3_INPUT, 548 AXP20X_IRQ_GPIO2_INPUT, 549 AXP20X_IRQ_GPIO1_INPUT, 550 AXP20X_IRQ_GPIO0_INPUT, 551 }; 552 553 enum axp22x_irqs { 554 AXP22X_IRQ_ACIN_OVER_V = 1, 555 AXP22X_IRQ_ACIN_PLUGIN, 556 AXP22X_IRQ_ACIN_REMOVAL, 557 AXP22X_IRQ_VBUS_OVER_V, 558 AXP22X_IRQ_VBUS_PLUGIN, 559 AXP22X_IRQ_VBUS_REMOVAL, 560 AXP22X_IRQ_VBUS_V_LOW, 561 AXP22X_IRQ_BATT_PLUGIN, 562 AXP22X_IRQ_BATT_REMOVAL, 563 AXP22X_IRQ_BATT_ENT_ACT_MODE, 564 AXP22X_IRQ_BATT_EXIT_ACT_MODE, 565 AXP22X_IRQ_CHARG, 566 AXP22X_IRQ_CHARG_DONE, 567 AXP22X_IRQ_BATT_TEMP_HIGH, 568 AXP22X_IRQ_BATT_TEMP_LOW, 569 AXP22X_IRQ_DIE_TEMP_HIGH, 570 AXP22X_IRQ_PEK_SHORT, 571 AXP22X_IRQ_PEK_LONG, 572 AXP22X_IRQ_LOW_PWR_LVL1, 573 AXP22X_IRQ_LOW_PWR_LVL2, 574 AXP22X_IRQ_TIMER, 575 /* out of bit order to make sure the press event is handled first */ 576 AXP22X_IRQ_PEK_FAL_EDGE, 577 AXP22X_IRQ_PEK_RIS_EDGE, 578 AXP22X_IRQ_GPIO1_INPUT, 579 AXP22X_IRQ_GPIO0_INPUT, 580 }; 581 582 enum axp288_irqs { 583 AXP288_IRQ_VBUS_FALL = 2, 584 AXP288_IRQ_VBUS_RISE, 585 AXP288_IRQ_OV, 586 AXP288_IRQ_FALLING_ALT, 587 AXP288_IRQ_RISING_ALT, 588 AXP288_IRQ_OV_ALT, 589 AXP288_IRQ_DONE = 10, 590 AXP288_IRQ_CHARGING, 591 AXP288_IRQ_SAFE_QUIT, 592 AXP288_IRQ_SAFE_ENTER, 593 AXP288_IRQ_ABSENT, 594 AXP288_IRQ_APPEND, 595 AXP288_IRQ_QWBTU, 596 AXP288_IRQ_WBTU, 597 AXP288_IRQ_QWBTO, 598 AXP288_IRQ_WBTO, 599 AXP288_IRQ_QCBTU, 600 AXP288_IRQ_CBTU, 601 AXP288_IRQ_QCBTO, 602 AXP288_IRQ_CBTO, 603 AXP288_IRQ_WL2, 604 AXP288_IRQ_WL1, 605 AXP288_IRQ_GPADC, 606 AXP288_IRQ_OT = 31, 607 AXP288_IRQ_GPIO0, 608 AXP288_IRQ_GPIO1, 609 AXP288_IRQ_POKO, 610 AXP288_IRQ_POKL, 611 AXP288_IRQ_POKS, 612 AXP288_IRQ_POKN, 613 AXP288_IRQ_POKP, 614 AXP288_IRQ_TIMER, 615 AXP288_IRQ_MV_CHNG, 616 AXP288_IRQ_BC_USB_CHNG, 617 }; 618 619 enum axp803_irqs { 620 AXP803_IRQ_ACIN_OVER_V = 1, 621 AXP803_IRQ_ACIN_PLUGIN, 622 AXP803_IRQ_ACIN_REMOVAL, 623 AXP803_IRQ_VBUS_OVER_V, 624 AXP803_IRQ_VBUS_PLUGIN, 625 AXP803_IRQ_VBUS_REMOVAL, 626 AXP803_IRQ_BATT_PLUGIN, 627 AXP803_IRQ_BATT_REMOVAL, 628 AXP803_IRQ_BATT_ENT_ACT_MODE, 629 AXP803_IRQ_BATT_EXIT_ACT_MODE, 630 AXP803_IRQ_CHARG, 631 AXP803_IRQ_CHARG_DONE, 632 AXP803_IRQ_BATT_CHG_TEMP_HIGH, 633 AXP803_IRQ_BATT_CHG_TEMP_HIGH_END, 634 AXP803_IRQ_BATT_CHG_TEMP_LOW, 635 AXP803_IRQ_BATT_CHG_TEMP_LOW_END, 636 AXP803_IRQ_BATT_ACT_TEMP_HIGH, 637 AXP803_IRQ_BATT_ACT_TEMP_HIGH_END, 638 AXP803_IRQ_BATT_ACT_TEMP_LOW, 639 AXP803_IRQ_BATT_ACT_TEMP_LOW_END, 640 AXP803_IRQ_DIE_TEMP_HIGH, 641 AXP803_IRQ_GPADC, 642 AXP803_IRQ_LOW_PWR_LVL1, 643 AXP803_IRQ_LOW_PWR_LVL2, 644 AXP803_IRQ_TIMER, 645 /* out of bit order to make sure the press event is handled first */ 646 AXP803_IRQ_PEK_FAL_EDGE, 647 AXP803_IRQ_PEK_RIS_EDGE, 648 AXP803_IRQ_PEK_SHORT, 649 AXP803_IRQ_PEK_LONG, 650 AXP803_IRQ_PEK_OVER_OFF, 651 AXP803_IRQ_GPIO1_INPUT, 652 AXP803_IRQ_GPIO0_INPUT, 653 AXP803_IRQ_BC_USB_CHNG, 654 AXP803_IRQ_MV_CHNG, 655 }; 656 657 enum axp806_irqs { 658 AXP806_IRQ_DIE_TEMP_HIGH_LV1, 659 AXP806_IRQ_DIE_TEMP_HIGH_LV2, 660 AXP806_IRQ_DCDCA_V_LOW, 661 AXP806_IRQ_DCDCB_V_LOW, 662 AXP806_IRQ_DCDCC_V_LOW, 663 AXP806_IRQ_DCDCD_V_LOW, 664 AXP806_IRQ_DCDCE_V_LOW, 665 AXP806_IRQ_POK_LONG, 666 AXP806_IRQ_POK_SHORT, 667 AXP806_IRQ_WAKEUP, 668 AXP806_IRQ_POK_FALL, 669 AXP806_IRQ_POK_RISE, 670 }; 671 672 enum axp809_irqs { 673 AXP809_IRQ_ACIN_OVER_V = 1, 674 AXP809_IRQ_ACIN_PLUGIN, 675 AXP809_IRQ_ACIN_REMOVAL, 676 AXP809_IRQ_VBUS_OVER_V, 677 AXP809_IRQ_VBUS_PLUGIN, 678 AXP809_IRQ_VBUS_REMOVAL, 679 AXP809_IRQ_VBUS_V_LOW, 680 AXP809_IRQ_BATT_PLUGIN, 681 AXP809_IRQ_BATT_REMOVAL, 682 AXP809_IRQ_BATT_ENT_ACT_MODE, 683 AXP809_IRQ_BATT_EXIT_ACT_MODE, 684 AXP809_IRQ_CHARG, 685 AXP809_IRQ_CHARG_DONE, 686 AXP809_IRQ_BATT_CHG_TEMP_HIGH, 687 AXP809_IRQ_BATT_CHG_TEMP_HIGH_END, 688 AXP809_IRQ_BATT_CHG_TEMP_LOW, 689 AXP809_IRQ_BATT_CHG_TEMP_LOW_END, 690 AXP809_IRQ_BATT_ACT_TEMP_HIGH, 691 AXP809_IRQ_BATT_ACT_TEMP_HIGH_END, 692 AXP809_IRQ_BATT_ACT_TEMP_LOW, 693 AXP809_IRQ_BATT_ACT_TEMP_LOW_END, 694 AXP809_IRQ_DIE_TEMP_HIGH, 695 AXP809_IRQ_LOW_PWR_LVL1, 696 AXP809_IRQ_LOW_PWR_LVL2, 697 AXP809_IRQ_TIMER, 698 /* out of bit order to make sure the press event is handled first */ 699 AXP809_IRQ_PEK_FAL_EDGE, 700 AXP809_IRQ_PEK_RIS_EDGE, 701 AXP809_IRQ_PEK_SHORT, 702 AXP809_IRQ_PEK_LONG, 703 AXP809_IRQ_PEK_OVER_OFF, 704 AXP809_IRQ_GPIO1_INPUT, 705 AXP809_IRQ_GPIO0_INPUT, 706 }; 707 708 enum axp15060_irqs { 709 AXP15060_IRQ_DIE_TEMP_HIGH_LV1 = 1, 710 AXP15060_IRQ_DIE_TEMP_HIGH_LV2, 711 AXP15060_IRQ_DCDC1_V_LOW, 712 AXP15060_IRQ_DCDC2_V_LOW, 713 AXP15060_IRQ_DCDC3_V_LOW, 714 AXP15060_IRQ_DCDC4_V_LOW, 715 AXP15060_IRQ_DCDC5_V_LOW, 716 AXP15060_IRQ_DCDC6_V_LOW, 717 AXP15060_IRQ_PEK_LONG, 718 AXP15060_IRQ_PEK_SHORT, 719 AXP15060_IRQ_GPIO1_INPUT, 720 AXP15060_IRQ_PEK_FAL_EDGE, 721 AXP15060_IRQ_PEK_RIS_EDGE, 722 AXP15060_IRQ_GPIO2_INPUT, 723 }; 724 725 struct axp20x_dev { 726 struct device *dev; 727 int irq; 728 unsigned long irq_flags; 729 struct regmap *regmap; 730 struct regmap_irq_chip_data *regmap_irqc; 731 long variant; 732 int nr_cells; 733 const struct mfd_cell *cells; 734 const struct regmap_config *regmap_cfg; 735 const struct regmap_irq_chip *regmap_irq_chip; 736 }; 737 738 /* generic helper function for reading 9-16 bit wide regs */ 739 static inline int axp20x_read_variable_width(struct regmap *regmap, 740 unsigned int reg, unsigned int width) 741 { 742 unsigned int reg_val, result; 743 int err; 744 745 err = regmap_read(regmap, reg, ®_val); 746 if (err) 747 return err; 748 749 result = reg_val << (width - 8); 750 751 err = regmap_read(regmap, reg + 1, ®_val); 752 if (err) 753 return err; 754 755 result |= reg_val; 756 757 return result; 758 } 759 760 /** 761 * axp20x_match_device(): Setup axp20x variant related fields 762 * 763 * @axp20x: axp20x device to setup (.dev field must be set) 764 * @dev: device associated with this axp20x device 765 * 766 * This lets the axp20x core configure the mfd cells and register maps 767 * for later use. 768 */ 769 int axp20x_match_device(struct axp20x_dev *axp20x); 770 771 /** 772 * axp20x_device_probe(): Probe a configured axp20x device 773 * 774 * @axp20x: axp20x device to probe (must be configured) 775 * 776 * This function lets the axp20x core register the axp20x mfd devices 777 * and irqchip. The axp20x device passed in must be fully configured 778 * with axp20x_match_device, its irq set, and regmap created. 779 */ 780 int axp20x_device_probe(struct axp20x_dev *axp20x); 781 782 /** 783 * axp20x_device_remove(): Remove a axp20x device 784 * 785 * @axp20x: axp20x device to remove 786 * 787 * This tells the axp20x core to remove the associated mfd devices 788 */ 789 void axp20x_device_remove(struct axp20x_dev *axp20x); 790 791 #endif /* __LINUX_MFD_AXP20X_H */ 792