1 /* 2 * Copyright 2003-2005 Red Hat, Inc. All rights reserved. 3 * Copyright 2003-2005 Jeff Garzik 4 * 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2, or (at your option) 9 * any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; see the file COPYING. If not, write to 18 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 19 * 20 * 21 * libata documentation is available via 'make {ps|pdf}docs', 22 * as Documentation/DocBook/libata.* 23 * 24 */ 25 26 #ifndef __LINUX_LIBATA_H__ 27 #define __LINUX_LIBATA_H__ 28 29 #include <linux/delay.h> 30 #include <linux/interrupt.h> 31 #include <linux/pci.h> 32 #include <linux/dma-mapping.h> 33 #include <asm/io.h> 34 #include <linux/ata.h> 35 #include <linux/workqueue.h> 36 37 /* 38 * compile-time options: to be removed as soon as all the drivers are 39 * converted to the new debugging mechanism 40 */ 41 #undef ATA_DEBUG /* debugging output */ 42 #undef ATA_VERBOSE_DEBUG /* yet more debugging output */ 43 #undef ATA_IRQ_TRAP /* define to ack screaming irqs */ 44 #undef ATA_NDEBUG /* define to disable quick runtime checks */ 45 #undef ATA_ENABLE_PATA /* define to enable PATA support in some 46 * low-level drivers */ 47 #undef ATAPI_ENABLE_DMADIR /* enables ATAPI DMADIR bridge support */ 48 49 50 /* note: prints function name for you */ 51 #ifdef ATA_DEBUG 52 #define DPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 53 #ifdef ATA_VERBOSE_DEBUG 54 #define VPRINTK(fmt, args...) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 55 #else 56 #define VPRINTK(fmt, args...) 57 #endif /* ATA_VERBOSE_DEBUG */ 58 #else 59 #define DPRINTK(fmt, args...) 60 #define VPRINTK(fmt, args...) 61 #endif /* ATA_DEBUG */ 62 63 #define BPRINTK(fmt, args...) if (ap->flags & ATA_FLAG_DEBUGMSG) printk(KERN_ERR "%s: " fmt, __FUNCTION__, ## args) 64 65 /* NEW: debug levels */ 66 #define HAVE_LIBATA_MSG 1 67 68 enum { 69 ATA_MSG_DRV = 0x0001, 70 ATA_MSG_INFO = 0x0002, 71 ATA_MSG_PROBE = 0x0004, 72 ATA_MSG_WARN = 0x0008, 73 ATA_MSG_MALLOC = 0x0010, 74 ATA_MSG_CTL = 0x0020, 75 ATA_MSG_INTR = 0x0040, 76 ATA_MSG_ERR = 0x0080, 77 }; 78 79 #define ata_msg_drv(p) ((p)->msg_enable & ATA_MSG_DRV) 80 #define ata_msg_info(p) ((p)->msg_enable & ATA_MSG_INFO) 81 #define ata_msg_probe(p) ((p)->msg_enable & ATA_MSG_PROBE) 82 #define ata_msg_warn(p) ((p)->msg_enable & ATA_MSG_WARN) 83 #define ata_msg_malloc(p) ((p)->msg_enable & ATA_MSG_MALLOC) 84 #define ata_msg_ctl(p) ((p)->msg_enable & ATA_MSG_CTL) 85 #define ata_msg_intr(p) ((p)->msg_enable & ATA_MSG_INTR) 86 #define ata_msg_err(p) ((p)->msg_enable & ATA_MSG_ERR) 87 88 static inline u32 ata_msg_init(int dval, int default_msg_enable_bits) 89 { 90 if (dval < 0 || dval >= (sizeof(u32) * 8)) 91 return default_msg_enable_bits; /* should be 0x1 - only driver info msgs */ 92 if (!dval) 93 return 0; 94 return (1 << dval) - 1; 95 } 96 97 /* defines only for the constants which don't work well as enums */ 98 #define ATA_TAG_POISON 0xfafbfcfdU 99 100 /* move to PCI layer? */ 101 static inline struct device *pci_dev_to_dev(struct pci_dev *pdev) 102 { 103 return &pdev->dev; 104 } 105 106 enum { 107 /* various global constants */ 108 LIBATA_MAX_PRD = ATA_MAX_PRD / 2, 109 ATA_MAX_PORTS = 8, 110 ATA_DEF_QUEUE = 1, 111 ATA_MAX_QUEUE = 1, 112 ATA_MAX_SECTORS = 200, /* FIXME */ 113 ATA_MAX_BUS = 2, 114 ATA_DEF_BUSY_WAIT = 10000, 115 ATA_SHORT_PAUSE = (HZ >> 6) + 1, 116 117 ATA_SHT_EMULATED = 1, 118 ATA_SHT_CMD_PER_LUN = 1, 119 ATA_SHT_THIS_ID = -1, 120 ATA_SHT_USE_CLUSTERING = 1, 121 122 /* struct ata_device stuff */ 123 ATA_DFLAG_LBA48 = (1 << 0), /* device supports LBA48 */ 124 ATA_DFLAG_PIO = (1 << 1), /* device currently in PIO mode */ 125 ATA_DFLAG_LBA = (1 << 2), /* device supports LBA */ 126 127 ATA_DEV_UNKNOWN = 0, /* unknown device */ 128 ATA_DEV_ATA = 1, /* ATA device */ 129 ATA_DEV_ATA_UNSUP = 2, /* ATA device (unsupported) */ 130 ATA_DEV_ATAPI = 3, /* ATAPI device */ 131 ATA_DEV_ATAPI_UNSUP = 4, /* ATAPI device (unsupported) */ 132 ATA_DEV_NONE = 5, /* no device */ 133 134 /* struct ata_port flags */ 135 ATA_FLAG_SLAVE_POSS = (1 << 1), /* host supports slave dev */ 136 /* (doesn't imply presence) */ 137 ATA_FLAG_PORT_DISABLED = (1 << 2), /* port is disabled, ignore it */ 138 ATA_FLAG_SATA = (1 << 3), 139 ATA_FLAG_NO_LEGACY = (1 << 4), /* no legacy mode check */ 140 ATA_FLAG_SRST = (1 << 5), /* (obsolete) use ATA SRST, not E.D.D. */ 141 ATA_FLAG_MMIO = (1 << 6), /* use MMIO, not PIO */ 142 ATA_FLAG_SATA_RESET = (1 << 7), /* (obsolete) use COMRESET */ 143 ATA_FLAG_PIO_DMA = (1 << 8), /* PIO cmds via DMA */ 144 ATA_FLAG_NOINTR = (1 << 9), /* FIXME: Remove this once 145 * proper HSM is in place. */ 146 ATA_FLAG_DEBUGMSG = (1 << 10), 147 ATA_FLAG_NO_ATAPI = (1 << 11), /* No ATAPI support */ 148 149 ATA_FLAG_SUSPENDED = (1 << 12), /* port is suspended */ 150 151 ATA_FLAG_PIO_LBA48 = (1 << 13), /* Host DMA engine is LBA28 only */ 152 ATA_FLAG_IRQ_MASK = (1 << 14), /* Mask IRQ in PIO xfers */ 153 154 ATA_FLAG_FLUSH_PORT_TASK = (1 << 15), /* Flush port task */ 155 ATA_FLAG_IN_EH = (1 << 16), /* EH in progress */ 156 157 ATA_QCFLAG_ACTIVE = (1 << 1), /* cmd not yet ack'd to scsi lyer */ 158 ATA_QCFLAG_SG = (1 << 3), /* have s/g table? */ 159 ATA_QCFLAG_SINGLE = (1 << 4), /* no s/g, just a single buffer */ 160 ATA_QCFLAG_DMAMAP = ATA_QCFLAG_SG | ATA_QCFLAG_SINGLE, 161 ATA_QCFLAG_EH_SCHEDULED = (1 << 5), /* EH scheduled */ 162 163 /* various lengths of time */ 164 ATA_TMOUT_EDD = 5 * HZ, /* heuristic */ 165 ATA_TMOUT_PIO = 30 * HZ, 166 ATA_TMOUT_BOOT = 30 * HZ, /* heuristic */ 167 ATA_TMOUT_BOOT_QUICK = 7 * HZ, /* heuristic */ 168 ATA_TMOUT_CDB = 30 * HZ, 169 ATA_TMOUT_CDB_QUICK = 5 * HZ, 170 ATA_TMOUT_INTERNAL = 30 * HZ, 171 ATA_TMOUT_INTERNAL_QUICK = 5 * HZ, 172 173 /* ATA bus states */ 174 BUS_UNKNOWN = 0, 175 BUS_DMA = 1, 176 BUS_IDLE = 2, 177 BUS_NOINTR = 3, 178 BUS_NODATA = 4, 179 BUS_TIMER = 5, 180 BUS_PIO = 6, 181 BUS_EDD = 7, 182 BUS_IDENTIFY = 8, 183 BUS_PACKET = 9, 184 185 /* SATA port states */ 186 PORT_UNKNOWN = 0, 187 PORT_ENABLED = 1, 188 PORT_DISABLED = 2, 189 190 /* encoding various smaller bitmaps into a single 191 * unsigned int bitmap 192 */ 193 ATA_BITS_PIO = 5, 194 ATA_BITS_MWDMA = 3, 195 ATA_BITS_UDMA = 8, 196 197 ATA_SHIFT_PIO = 0, 198 ATA_SHIFT_MWDMA = ATA_SHIFT_PIO + ATA_BITS_PIO, 199 ATA_SHIFT_UDMA = ATA_SHIFT_MWDMA + ATA_BITS_MWDMA, 200 201 ATA_MASK_PIO = ((1 << ATA_BITS_PIO) - 1) << ATA_SHIFT_PIO, 202 ATA_MASK_MWDMA = ((1 << ATA_BITS_MWDMA) - 1) << ATA_SHIFT_MWDMA, 203 ATA_MASK_UDMA = ((1 << ATA_BITS_UDMA) - 1) << ATA_SHIFT_UDMA, 204 205 /* size of buffer to pad xfers ending on unaligned boundaries */ 206 ATA_DMA_PAD_SZ = 4, 207 ATA_DMA_PAD_BUF_SZ = ATA_DMA_PAD_SZ * ATA_MAX_QUEUE, 208 209 /* Masks for port functions */ 210 ATA_PORT_PRIMARY = (1 << 0), 211 ATA_PORT_SECONDARY = (1 << 1), 212 }; 213 214 enum hsm_task_states { 215 HSM_ST_UNKNOWN, 216 HSM_ST_IDLE, 217 HSM_ST_POLL, 218 HSM_ST_TMOUT, 219 HSM_ST, 220 HSM_ST_LAST, 221 HSM_ST_LAST_POLL, 222 HSM_ST_ERR, 223 }; 224 225 enum ata_completion_errors { 226 AC_ERR_DEV = (1 << 0), /* device reported error */ 227 AC_ERR_HSM = (1 << 1), /* host state machine violation */ 228 AC_ERR_TIMEOUT = (1 << 2), /* timeout */ 229 AC_ERR_MEDIA = (1 << 3), /* media error */ 230 AC_ERR_ATA_BUS = (1 << 4), /* ATA bus error */ 231 AC_ERR_HOST_BUS = (1 << 5), /* host bus error */ 232 AC_ERR_SYSTEM = (1 << 6), /* system error */ 233 AC_ERR_INVALID = (1 << 7), /* invalid argument */ 234 AC_ERR_OTHER = (1 << 8), /* unknown */ 235 }; 236 237 /* forward declarations */ 238 struct scsi_device; 239 struct ata_port_operations; 240 struct ata_port; 241 struct ata_queued_cmd; 242 243 /* typedefs */ 244 typedef void (*ata_qc_cb_t) (struct ata_queued_cmd *qc); 245 typedef void (*ata_probeinit_fn_t)(struct ata_port *); 246 typedef int (*ata_reset_fn_t)(struct ata_port *, int, unsigned int *); 247 typedef void (*ata_postreset_fn_t)(struct ata_port *ap, unsigned int *); 248 249 struct ata_ioports { 250 unsigned long cmd_addr; 251 unsigned long data_addr; 252 unsigned long error_addr; 253 unsigned long feature_addr; 254 unsigned long nsect_addr; 255 unsigned long lbal_addr; 256 unsigned long lbam_addr; 257 unsigned long lbah_addr; 258 unsigned long device_addr; 259 unsigned long status_addr; 260 unsigned long command_addr; 261 unsigned long altstatus_addr; 262 unsigned long ctl_addr; 263 unsigned long bmdma_addr; 264 unsigned long scr_addr; 265 }; 266 267 struct ata_probe_ent { 268 struct list_head node; 269 struct device *dev; 270 const struct ata_port_operations *port_ops; 271 struct scsi_host_template *sht; 272 struct ata_ioports port[ATA_MAX_PORTS]; 273 unsigned int n_ports; 274 unsigned int hard_port_no; 275 unsigned int pio_mask; 276 unsigned int mwdma_mask; 277 unsigned int udma_mask; 278 unsigned int legacy_mode; 279 unsigned long irq; 280 unsigned int irq_flags; 281 unsigned long host_flags; 282 void __iomem *mmio_base; 283 void *private_data; 284 }; 285 286 struct ata_host_set { 287 spinlock_t lock; 288 struct device *dev; 289 unsigned long irq; 290 void __iomem *mmio_base; 291 unsigned int n_ports; 292 void *private_data; 293 const struct ata_port_operations *ops; 294 struct ata_port * ports[0]; 295 }; 296 297 struct ata_queued_cmd { 298 struct ata_port *ap; 299 struct ata_device *dev; 300 301 struct scsi_cmnd *scsicmd; 302 void (*scsidone)(struct scsi_cmnd *); 303 304 struct ata_taskfile tf; 305 u8 cdb[ATAPI_CDB_LEN]; 306 307 unsigned long flags; /* ATA_QCFLAG_xxx */ 308 unsigned int tag; 309 unsigned int n_elem; 310 unsigned int orig_n_elem; 311 312 int dma_dir; 313 314 unsigned int pad_len; 315 316 unsigned int nsect; 317 unsigned int cursect; 318 319 unsigned int nbytes; 320 unsigned int curbytes; 321 322 unsigned int cursg; 323 unsigned int cursg_ofs; 324 325 struct scatterlist sgent; 326 struct scatterlist pad_sgent; 327 void *buf_virt; 328 329 /* DO NOT iterate over __sg manually, use ata_for_each_sg() */ 330 struct scatterlist *__sg; 331 332 unsigned int err_mask; 333 334 ata_qc_cb_t complete_fn; 335 336 void *private_data; 337 }; 338 339 struct ata_host_stats { 340 unsigned long unhandled_irq; 341 unsigned long idle_irq; 342 unsigned long rw_reqbuf; 343 }; 344 345 struct ata_device { 346 u64 n_sectors; /* size of device, if ATA */ 347 unsigned long flags; /* ATA_DFLAG_xxx */ 348 unsigned int class; /* ATA_DEV_xxx */ 349 unsigned int devno; /* 0 or 1 */ 350 u16 *id; /* IDENTIFY xxx DEVICE data */ 351 u8 pio_mode; 352 u8 dma_mode; 353 u8 xfer_mode; 354 unsigned int xfer_shift; /* ATA_SHIFT_xxx */ 355 356 unsigned int multi_count; /* sectors count for 357 READ/WRITE MULTIPLE */ 358 unsigned int max_sectors; /* per-device max sectors */ 359 unsigned int cdb_len; 360 361 /* per-dev xfer mask */ 362 unsigned int pio_mask; 363 unsigned int mwdma_mask; 364 unsigned int udma_mask; 365 366 /* for CHS addressing */ 367 u16 cylinders; /* Number of cylinders */ 368 u16 heads; /* Number of heads */ 369 u16 sectors; /* Number of sectors per track */ 370 }; 371 372 struct ata_port { 373 struct Scsi_Host *host; /* our co-allocated scsi host */ 374 const struct ata_port_operations *ops; 375 unsigned long flags; /* ATA_FLAG_xxx */ 376 unsigned int id; /* unique id req'd by scsi midlyr */ 377 unsigned int port_no; /* unique port #; from zero */ 378 unsigned int hard_port_no; /* hardware port #; from zero */ 379 380 struct ata_prd *prd; /* our SG list */ 381 dma_addr_t prd_dma; /* and its DMA mapping */ 382 383 void *pad; /* array of DMA pad buffers */ 384 dma_addr_t pad_dma; 385 386 struct ata_ioports ioaddr; /* ATA cmd/ctl/dma register blocks */ 387 388 u8 ctl; /* cache of ATA control register */ 389 u8 last_ctl; /* Cache last written value */ 390 unsigned int pio_mask; 391 unsigned int mwdma_mask; 392 unsigned int udma_mask; 393 unsigned int cbl; /* cable type; ATA_CBL_xxx */ 394 395 struct ata_device device[ATA_MAX_DEVICES]; 396 397 struct ata_queued_cmd qcmd[ATA_MAX_QUEUE]; 398 unsigned long qactive; 399 unsigned int active_tag; 400 401 struct ata_host_stats stats; 402 struct ata_host_set *host_set; 403 struct device *dev; 404 405 struct work_struct port_task; 406 407 unsigned int hsm_task_state; 408 unsigned long pio_task_timeout; 409 410 u32 msg_enable; 411 struct list_head eh_done_q; 412 413 void *private_data; 414 }; 415 416 struct ata_port_operations { 417 void (*port_disable) (struct ata_port *); 418 419 void (*dev_config) (struct ata_port *, struct ata_device *); 420 421 void (*set_piomode) (struct ata_port *, struct ata_device *); 422 void (*set_dmamode) (struct ata_port *, struct ata_device *); 423 424 void (*tf_load) (struct ata_port *ap, const struct ata_taskfile *tf); 425 void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf); 426 427 void (*exec_command)(struct ata_port *ap, const struct ata_taskfile *tf); 428 u8 (*check_status)(struct ata_port *ap); 429 u8 (*check_altstatus)(struct ata_port *ap); 430 void (*dev_select)(struct ata_port *ap, unsigned int device); 431 432 void (*phy_reset) (struct ata_port *ap); /* obsolete */ 433 int (*probe_reset) (struct ata_port *ap, unsigned int *classes); 434 435 void (*post_set_mode) (struct ata_port *ap); 436 437 int (*check_atapi_dma) (struct ata_queued_cmd *qc); 438 439 void (*bmdma_setup) (struct ata_queued_cmd *qc); 440 void (*bmdma_start) (struct ata_queued_cmd *qc); 441 442 void (*qc_prep) (struct ata_queued_cmd *qc); 443 unsigned int (*qc_issue) (struct ata_queued_cmd *qc); 444 445 void (*eng_timeout) (struct ata_port *ap); 446 447 irqreturn_t (*irq_handler)(int, void *, struct pt_regs *); 448 void (*irq_clear) (struct ata_port *); 449 450 u32 (*scr_read) (struct ata_port *ap, unsigned int sc_reg); 451 void (*scr_write) (struct ata_port *ap, unsigned int sc_reg, 452 u32 val); 453 454 int (*port_start) (struct ata_port *ap); 455 void (*port_stop) (struct ata_port *ap); 456 457 void (*host_stop) (struct ata_host_set *host_set); 458 459 void (*bmdma_stop) (struct ata_queued_cmd *qc); 460 u8 (*bmdma_status) (struct ata_port *ap); 461 }; 462 463 struct ata_port_info { 464 struct scsi_host_template *sht; 465 unsigned long host_flags; 466 unsigned long pio_mask; 467 unsigned long mwdma_mask; 468 unsigned long udma_mask; 469 const struct ata_port_operations *port_ops; 470 void *private_data; 471 }; 472 473 struct ata_timing { 474 unsigned short mode; /* ATA mode */ 475 unsigned short setup; /* t1 */ 476 unsigned short act8b; /* t2 for 8-bit I/O */ 477 unsigned short rec8b; /* t2i for 8-bit I/O */ 478 unsigned short cyc8b; /* t0 for 8-bit I/O */ 479 unsigned short active; /* t2 or tD */ 480 unsigned short recover; /* t2i or tK */ 481 unsigned short cycle; /* t0 */ 482 unsigned short udma; /* t2CYCTYP/2 */ 483 }; 484 485 #define FIT(v,vmin,vmax) max_t(short,min_t(short,v,vmax),vmin) 486 487 extern void ata_port_probe(struct ata_port *); 488 extern void __sata_phy_reset(struct ata_port *ap); 489 extern void sata_phy_reset(struct ata_port *ap); 490 extern void ata_bus_reset(struct ata_port *ap); 491 extern int ata_drive_probe_reset(struct ata_port *ap, 492 ata_probeinit_fn_t probeinit, 493 ata_reset_fn_t softreset, ata_reset_fn_t hardreset, 494 ata_postreset_fn_t postreset, unsigned int *classes); 495 extern void ata_std_probeinit(struct ata_port *ap); 496 extern int ata_std_softreset(struct ata_port *ap, int verbose, 497 unsigned int *classes); 498 extern int sata_std_hardreset(struct ata_port *ap, int verbose, 499 unsigned int *class); 500 extern void ata_std_postreset(struct ata_port *ap, unsigned int *classes); 501 extern int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev, 502 int post_reset); 503 extern void ata_port_disable(struct ata_port *); 504 extern void ata_std_ports(struct ata_ioports *ioaddr); 505 #ifdef CONFIG_PCI 506 extern int ata_pci_init_one (struct pci_dev *pdev, struct ata_port_info **port_info, 507 unsigned int n_ports); 508 extern void ata_pci_remove_one (struct pci_dev *pdev); 509 extern int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state); 510 extern int ata_pci_device_resume(struct pci_dev *pdev); 511 extern int ata_pci_clear_simplex(struct pci_dev *pdev); 512 #endif /* CONFIG_PCI */ 513 extern int ata_device_add(const struct ata_probe_ent *ent); 514 extern void ata_host_set_remove(struct ata_host_set *host_set); 515 extern int ata_scsi_detect(struct scsi_host_template *sht); 516 extern int ata_scsi_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 517 extern int ata_scsi_queuecmd(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *)); 518 extern int ata_scsi_error(struct Scsi_Host *host); 519 extern void ata_eh_qc_complete(struct ata_queued_cmd *qc); 520 extern void ata_eh_qc_retry(struct ata_queued_cmd *qc); 521 extern int ata_scsi_release(struct Scsi_Host *host); 522 extern unsigned int ata_host_intr(struct ata_port *ap, struct ata_queued_cmd *qc); 523 extern int ata_scsi_device_resume(struct scsi_device *); 524 extern int ata_scsi_device_suspend(struct scsi_device *, pm_message_t state); 525 extern int ata_device_resume(struct ata_port *, struct ata_device *); 526 extern int ata_device_suspend(struct ata_port *, struct ata_device *, pm_message_t state); 527 extern int ata_ratelimit(void); 528 extern unsigned int ata_busy_sleep(struct ata_port *ap, 529 unsigned long timeout_pat, 530 unsigned long timeout); 531 extern void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), 532 void *data, unsigned long delay); 533 534 /* 535 * Default driver ops implementations 536 */ 537 extern void ata_tf_load(struct ata_port *ap, const struct ata_taskfile *tf); 538 extern void ata_tf_read(struct ata_port *ap, struct ata_taskfile *tf); 539 extern void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp); 540 extern void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf); 541 extern void ata_noop_dev_select (struct ata_port *ap, unsigned int device); 542 extern void ata_std_dev_select (struct ata_port *ap, unsigned int device); 543 extern u8 ata_check_status(struct ata_port *ap); 544 extern u8 ata_altstatus(struct ata_port *ap); 545 extern void ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf); 546 extern int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes); 547 extern int ata_port_start (struct ata_port *ap); 548 extern void ata_port_stop (struct ata_port *ap); 549 extern void ata_host_stop (struct ata_host_set *host_set); 550 extern irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs); 551 extern void ata_qc_prep(struct ata_queued_cmd *qc); 552 extern void ata_noop_qc_prep(struct ata_queued_cmd *qc); 553 extern unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc); 554 extern void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, 555 unsigned int buflen); 556 extern void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg, 557 unsigned int n_elem); 558 extern unsigned int ata_dev_classify(const struct ata_taskfile *tf); 559 extern void ata_id_string(const u16 *id, unsigned char *s, 560 unsigned int ofs, unsigned int len); 561 extern void ata_id_c_string(const u16 *id, unsigned char *s, 562 unsigned int ofs, unsigned int len); 563 extern void ata_bmdma_setup (struct ata_queued_cmd *qc); 564 extern void ata_bmdma_start (struct ata_queued_cmd *qc); 565 extern void ata_bmdma_stop(struct ata_queued_cmd *qc); 566 extern u8 ata_bmdma_status(struct ata_port *ap); 567 extern void ata_bmdma_irq_clear(struct ata_port *ap); 568 extern void __ata_qc_complete(struct ata_queued_cmd *qc); 569 extern void ata_eng_timeout(struct ata_port *ap); 570 extern void ata_scsi_simulate(struct ata_port *ap, struct ata_device *dev, 571 struct scsi_cmnd *cmd, 572 void (*done)(struct scsi_cmnd *)); 573 extern int ata_std_bios_param(struct scsi_device *sdev, 574 struct block_device *bdev, 575 sector_t capacity, int geom[]); 576 extern int ata_scsi_slave_config(struct scsi_device *sdev); 577 extern struct ata_device *ata_dev_pair(struct ata_port *ap, 578 struct ata_device *adev); 579 580 /* 581 * Timing helpers 582 */ 583 584 extern unsigned int ata_pio_need_iordy(const struct ata_device *); 585 extern int ata_timing_compute(struct ata_device *, unsigned short, 586 struct ata_timing *, int, int); 587 extern void ata_timing_merge(const struct ata_timing *, 588 const struct ata_timing *, struct ata_timing *, 589 unsigned int); 590 591 enum { 592 ATA_TIMING_SETUP = (1 << 0), 593 ATA_TIMING_ACT8B = (1 << 1), 594 ATA_TIMING_REC8B = (1 << 2), 595 ATA_TIMING_CYC8B = (1 << 3), 596 ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B | 597 ATA_TIMING_CYC8B, 598 ATA_TIMING_ACTIVE = (1 << 4), 599 ATA_TIMING_RECOVER = (1 << 5), 600 ATA_TIMING_CYCLE = (1 << 6), 601 ATA_TIMING_UDMA = (1 << 7), 602 ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B | 603 ATA_TIMING_REC8B | ATA_TIMING_CYC8B | 604 ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER | 605 ATA_TIMING_CYCLE | ATA_TIMING_UDMA, 606 }; 607 608 609 #ifdef CONFIG_PCI 610 struct pci_bits { 611 unsigned int reg; /* PCI config register to read */ 612 unsigned int width; /* 1 (8 bit), 2 (16 bit), 4 (32 bit) */ 613 unsigned long mask; 614 unsigned long val; 615 }; 616 617 extern void ata_pci_host_stop (struct ata_host_set *host_set); 618 extern struct ata_probe_ent * 619 ata_pci_init_native_mode(struct pci_dev *pdev, struct ata_port_info **port, int portmask); 620 extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); 621 extern unsigned long ata_pci_default_filter(const struct ata_port *, struct ata_device *, unsigned long); 622 #endif /* CONFIG_PCI */ 623 624 625 static inline int 626 ata_sg_is_last(struct scatterlist *sg, struct ata_queued_cmd *qc) 627 { 628 if (sg == &qc->pad_sgent) 629 return 1; 630 if (qc->pad_len) 631 return 0; 632 if (((sg - qc->__sg) + 1) == qc->n_elem) 633 return 1; 634 return 0; 635 } 636 637 static inline struct scatterlist * 638 ata_qc_first_sg(struct ata_queued_cmd *qc) 639 { 640 if (qc->n_elem) 641 return qc->__sg; 642 if (qc->pad_len) 643 return &qc->pad_sgent; 644 return NULL; 645 } 646 647 static inline struct scatterlist * 648 ata_qc_next_sg(struct scatterlist *sg, struct ata_queued_cmd *qc) 649 { 650 if (sg == &qc->pad_sgent) 651 return NULL; 652 if (++sg - qc->__sg < qc->n_elem) 653 return sg; 654 if (qc->pad_len) 655 return &qc->pad_sgent; 656 return NULL; 657 } 658 659 #define ata_for_each_sg(sg, qc) \ 660 for (sg = ata_qc_first_sg(qc); sg; sg = ata_qc_next_sg(sg, qc)) 661 662 static inline unsigned int ata_tag_valid(unsigned int tag) 663 { 664 return (tag < ATA_MAX_QUEUE) ? 1 : 0; 665 } 666 667 static inline unsigned int ata_class_present(unsigned int class) 668 { 669 return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI; 670 } 671 672 static inline unsigned int ata_dev_present(const struct ata_device *dev) 673 { 674 return ata_class_present(dev->class); 675 } 676 677 static inline u8 ata_chk_status(struct ata_port *ap) 678 { 679 return ap->ops->check_status(ap); 680 } 681 682 683 /** 684 * ata_pause - Flush writes and pause 400 nanoseconds. 685 * @ap: Port to wait for. 686 * 687 * LOCKING: 688 * Inherited from caller. 689 */ 690 691 static inline void ata_pause(struct ata_port *ap) 692 { 693 ata_altstatus(ap); 694 ndelay(400); 695 } 696 697 698 /** 699 * ata_busy_wait - Wait for a port status register 700 * @ap: Port to wait for. 701 * 702 * Waits up to max*10 microseconds for the selected bits in the port's 703 * status register to be cleared. 704 * Returns final value of status register. 705 * 706 * LOCKING: 707 * Inherited from caller. 708 */ 709 710 static inline u8 ata_busy_wait(struct ata_port *ap, unsigned int bits, 711 unsigned int max) 712 { 713 u8 status; 714 715 do { 716 udelay(10); 717 status = ata_chk_status(ap); 718 max--; 719 } while ((status & bits) && (max > 0)); 720 721 return status; 722 } 723 724 725 /** 726 * ata_wait_idle - Wait for a port to be idle. 727 * @ap: Port to wait for. 728 * 729 * Waits up to 10ms for port's BUSY and DRQ signals to clear. 730 * Returns final value of status register. 731 * 732 * LOCKING: 733 * Inherited from caller. 734 */ 735 736 static inline u8 ata_wait_idle(struct ata_port *ap) 737 { 738 u8 status = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000); 739 740 if (status & (ATA_BUSY | ATA_DRQ)) { 741 unsigned long l = ap->ioaddr.status_addr; 742 if (ata_msg_warn(ap)) 743 printk(KERN_WARNING "ATA: abnormal status 0x%X on port 0x%lX\n", 744 status, l); 745 } 746 747 return status; 748 } 749 750 static inline void ata_qc_set_polling(struct ata_queued_cmd *qc) 751 { 752 qc->tf.ctl |= ATA_NIEN; 753 } 754 755 static inline struct ata_queued_cmd *ata_qc_from_tag (struct ata_port *ap, 756 unsigned int tag) 757 { 758 if (likely(ata_tag_valid(tag))) 759 return &ap->qcmd[tag]; 760 return NULL; 761 } 762 763 static inline void ata_tf_init(struct ata_port *ap, struct ata_taskfile *tf, unsigned int device) 764 { 765 memset(tf, 0, sizeof(*tf)); 766 767 tf->ctl = ap->ctl; 768 if (device == 0) 769 tf->device = ATA_DEVICE_OBS; 770 else 771 tf->device = ATA_DEVICE_OBS | ATA_DEV1; 772 } 773 774 static inline void ata_qc_reinit(struct ata_queued_cmd *qc) 775 { 776 qc->__sg = NULL; 777 qc->flags = 0; 778 qc->cursect = qc->cursg = qc->cursg_ofs = 0; 779 qc->nsect = 0; 780 qc->nbytes = qc->curbytes = 0; 781 qc->err_mask = 0; 782 783 ata_tf_init(qc->ap, &qc->tf, qc->dev->devno); 784 } 785 786 /** 787 * ata_qc_complete - Complete an active ATA command 788 * @qc: Command to complete 789 * @err_mask: ATA Status register contents 790 * 791 * Indicate to the mid and upper layers that an ATA 792 * command has completed, with either an ok or not-ok status. 793 * 794 * LOCKING: 795 * spin_lock_irqsave(host_set lock) 796 */ 797 static inline void ata_qc_complete(struct ata_queued_cmd *qc) 798 { 799 if (unlikely(qc->flags & ATA_QCFLAG_EH_SCHEDULED)) 800 return; 801 802 __ata_qc_complete(qc); 803 } 804 805 /** 806 * ata_irq_on - Enable interrupts on a port. 807 * @ap: Port on which interrupts are enabled. 808 * 809 * Enable interrupts on a legacy IDE device using MMIO or PIO, 810 * wait for idle, clear any pending interrupts. 811 * 812 * LOCKING: 813 * Inherited from caller. 814 */ 815 816 static inline u8 ata_irq_on(struct ata_port *ap) 817 { 818 struct ata_ioports *ioaddr = &ap->ioaddr; 819 u8 tmp; 820 821 ap->ctl &= ~ATA_NIEN; 822 ap->last_ctl = ap->ctl; 823 824 if (ap->flags & ATA_FLAG_MMIO) 825 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr); 826 else 827 outb(ap->ctl, ioaddr->ctl_addr); 828 tmp = ata_wait_idle(ap); 829 830 ap->ops->irq_clear(ap); 831 832 return tmp; 833 } 834 835 836 /** 837 * ata_irq_ack - Acknowledge a device interrupt. 838 * @ap: Port on which interrupts are enabled. 839 * 840 * Wait up to 10 ms for legacy IDE device to become idle (BUSY 841 * or BUSY+DRQ clear). Obtain dma status and port status from 842 * device. Clear the interrupt. Return port status. 843 * 844 * LOCKING: 845 */ 846 847 static inline u8 ata_irq_ack(struct ata_port *ap, unsigned int chk_drq) 848 { 849 unsigned int bits = chk_drq ? ATA_BUSY | ATA_DRQ : ATA_BUSY; 850 u8 host_stat, post_stat, status; 851 852 status = ata_busy_wait(ap, bits, 1000); 853 if (status & bits) 854 if (ata_msg_err(ap)) 855 printk(KERN_ERR "abnormal status 0x%X\n", status); 856 857 /* get controller status; clear intr, err bits */ 858 if (ap->flags & ATA_FLAG_MMIO) { 859 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr; 860 host_stat = readb(mmio + ATA_DMA_STATUS); 861 writeb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, 862 mmio + ATA_DMA_STATUS); 863 864 post_stat = readb(mmio + ATA_DMA_STATUS); 865 } else { 866 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 867 outb(host_stat | ATA_DMA_INTR | ATA_DMA_ERR, 868 ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 869 870 post_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS); 871 } 872 873 if (ata_msg_intr(ap)) 874 printk(KERN_INFO "%s: irq ack: host_stat 0x%X, new host_stat 0x%X, drv_stat 0x%X\n", 875 __FUNCTION__, 876 host_stat, post_stat, status); 877 878 return status; 879 } 880 881 static inline u32 scr_read(struct ata_port *ap, unsigned int reg) 882 { 883 return ap->ops->scr_read(ap, reg); 884 } 885 886 static inline void scr_write(struct ata_port *ap, unsigned int reg, u32 val) 887 { 888 ap->ops->scr_write(ap, reg, val); 889 } 890 891 static inline void scr_write_flush(struct ata_port *ap, unsigned int reg, 892 u32 val) 893 { 894 ap->ops->scr_write(ap, reg, val); 895 (void) ap->ops->scr_read(ap, reg); 896 } 897 898 static inline unsigned int sata_dev_present(struct ata_port *ap) 899 { 900 return ((scr_read(ap, SCR_STATUS) & 0xf) == 0x3) ? 1 : 0; 901 } 902 903 static inline int ata_try_flush_cache(const struct ata_device *dev) 904 { 905 return ata_id_wcache_enabled(dev->id) || 906 ata_id_has_flush(dev->id) || 907 ata_id_has_flush_ext(dev->id); 908 } 909 910 static inline unsigned int ac_err_mask(u8 status) 911 { 912 if (status & ATA_BUSY) 913 return AC_ERR_HSM; 914 if (status & (ATA_ERR | ATA_DF)) 915 return AC_ERR_DEV; 916 return 0; 917 } 918 919 static inline unsigned int __ac_err_mask(u8 status) 920 { 921 unsigned int mask = ac_err_mask(status); 922 if (mask == 0) 923 return AC_ERR_OTHER; 924 return mask; 925 } 926 927 static inline int ata_pad_alloc(struct ata_port *ap, struct device *dev) 928 { 929 ap->pad_dma = 0; 930 ap->pad = dma_alloc_coherent(dev, ATA_DMA_PAD_BUF_SZ, 931 &ap->pad_dma, GFP_KERNEL); 932 return (ap->pad == NULL) ? -ENOMEM : 0; 933 } 934 935 static inline void ata_pad_free(struct ata_port *ap, struct device *dev) 936 { 937 dma_free_coherent(dev, ATA_DMA_PAD_BUF_SZ, ap->pad, ap->pad_dma); 938 } 939 940 #endif /* __LINUX_LIBATA_H__ */ 941