1 #ifndef _LINUX_IRQ_H 2 #define _LINUX_IRQ_H 3 4 /* 5 * Please do not include this file in generic code. There is currently 6 * no requirement for any architecture to implement anything held 7 * within this file. 8 * 9 * Thanks. --rmk 10 */ 11 12 #include <linux/smp.h> 13 14 #ifndef CONFIG_S390 15 16 #include <linux/linkage.h> 17 #include <linux/cache.h> 18 #include <linux/spinlock.h> 19 #include <linux/cpumask.h> 20 #include <linux/gfp.h> 21 #include <linux/irqreturn.h> 22 #include <linux/irqnr.h> 23 #include <linux/errno.h> 24 #include <linux/topology.h> 25 #include <linux/wait.h> 26 27 #include <asm/irq.h> 28 #include <asm/ptrace.h> 29 #include <asm/irq_regs.h> 30 31 struct irq_desc; 32 typedef void (*irq_flow_handler_t)(unsigned int irq, 33 struct irq_desc *desc); 34 35 36 /* 37 * IRQ line status. 38 * 39 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h 40 * 41 * IRQ types 42 */ 43 #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ 44 #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ 45 #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ 46 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) 47 #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ 48 #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ 49 #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ 50 #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ 51 52 /* Internal flags */ 53 #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */ 54 #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */ 55 #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */ 56 #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */ 57 #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */ 58 #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */ 59 #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */ 60 #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */ 61 #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */ 62 #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */ 63 #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */ 64 #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */ 65 #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */ 66 #define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */ 67 #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */ 68 #define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */ 69 #define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */ 70 #define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/ 71 #define IRQ_SUSPENDED 0x04000000 /* IRQ has gone through suspend sequence */ 72 #define IRQ_ONESHOT 0x08000000 /* IRQ is not unmasked after hardirq */ 73 #define IRQ_NESTED_THREAD 0x10000000 /* IRQ is nested into another, no own handler thread */ 74 75 #ifdef CONFIG_IRQ_PER_CPU 76 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) 77 # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) 78 #else 79 # define CHECK_IRQ_PER_CPU(var) 0 80 # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING 81 #endif 82 83 struct proc_dir_entry; 84 struct msi_desc; 85 86 /** 87 * struct irq_chip - hardware interrupt chip descriptor 88 * 89 * @name: name for /proc/interrupts 90 * @startup: start up the interrupt (defaults to ->enable if NULL) 91 * @shutdown: shut down the interrupt (defaults to ->disable if NULL) 92 * @enable: enable the interrupt (defaults to chip->unmask if NULL) 93 * @disable: disable the interrupt (defaults to chip->mask if NULL) 94 * @ack: start of a new interrupt 95 * @mask: mask an interrupt source 96 * @mask_ack: ack and mask an interrupt source 97 * @unmask: unmask an interrupt source 98 * @eoi: end of interrupt - chip level 99 * @end: end of interrupt - flow level 100 * @set_affinity: set the CPU affinity on SMP machines 101 * @retrigger: resend an IRQ to the CPU 102 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ 103 * @set_wake: enable/disable power-management wake-on of an IRQ 104 * 105 * @bus_lock: function to lock access to slow bus (i2c) chips 106 * @bus_sync_unlock: function to sync and unlock slow bus (i2c) chips 107 * 108 * @release: release function solely used by UML 109 * @typename: obsoleted by name, kept as migration helper 110 */ 111 struct irq_chip { 112 const char *name; 113 unsigned int (*startup)(unsigned int irq); 114 void (*shutdown)(unsigned int irq); 115 void (*enable)(unsigned int irq); 116 void (*disable)(unsigned int irq); 117 118 void (*ack)(unsigned int irq); 119 void (*mask)(unsigned int irq); 120 void (*mask_ack)(unsigned int irq); 121 void (*unmask)(unsigned int irq); 122 void (*eoi)(unsigned int irq); 123 124 void (*end)(unsigned int irq); 125 int (*set_affinity)(unsigned int irq, 126 const struct cpumask *dest); 127 int (*retrigger)(unsigned int irq); 128 int (*set_type)(unsigned int irq, unsigned int flow_type); 129 int (*set_wake)(unsigned int irq, unsigned int on); 130 131 void (*bus_lock)(unsigned int irq); 132 void (*bus_sync_unlock)(unsigned int irq); 133 134 /* Currently used only by UML, might disappear one day.*/ 135 #ifdef CONFIG_IRQ_RELEASE_METHOD 136 void (*release)(unsigned int irq, void *dev_id); 137 #endif 138 /* 139 * For compatibility, ->typename is copied into ->name. 140 * Will disappear. 141 */ 142 const char *typename; 143 }; 144 145 struct timer_rand_state; 146 struct irq_2_iommu; 147 /** 148 * struct irq_desc - interrupt descriptor 149 * @irq: interrupt number for this descriptor 150 * @timer_rand_state: pointer to timer rand state struct 151 * @kstat_irqs: irq stats per cpu 152 * @irq_2_iommu: iommu with this irq 153 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] 154 * @chip: low level interrupt hardware access 155 * @msi_desc: MSI descriptor 156 * @handler_data: per-IRQ data for the irq_chip methods 157 * @chip_data: platform-specific per-chip private data for the chip 158 * methods, to allow shared chip implementations 159 * @action: the irq action chain 160 * @status: status information 161 * @depth: disable-depth, for nested irq_disable() calls 162 * @wake_depth: enable depth, for multiple set_irq_wake() callers 163 * @irq_count: stats field to detect stalled irqs 164 * @last_unhandled: aging timer for unhandled count 165 * @irqs_unhandled: stats field for spurious unhandled interrupts 166 * @lock: locking for SMP 167 * @affinity: IRQ affinity on SMP 168 * @node: node index useful for balancing 169 * @pending_mask: pending rebalanced interrupts 170 * @threads_active: number of irqaction threads currently running 171 * @wait_for_threads: wait queue for sync_irq to wait for threaded handlers 172 * @dir: /proc/irq/ procfs entry 173 * @name: flow handler name for /proc/interrupts output 174 */ 175 struct irq_desc { 176 unsigned int irq; 177 struct timer_rand_state *timer_rand_state; 178 unsigned int *kstat_irqs; 179 #ifdef CONFIG_INTR_REMAP 180 struct irq_2_iommu *irq_2_iommu; 181 #endif 182 irq_flow_handler_t handle_irq; 183 struct irq_chip *chip; 184 struct msi_desc *msi_desc; 185 void *handler_data; 186 void *chip_data; 187 struct irqaction *action; /* IRQ action list */ 188 unsigned int status; /* IRQ status */ 189 190 unsigned int depth; /* nested irq disables */ 191 unsigned int wake_depth; /* nested wake enables */ 192 unsigned int irq_count; /* For detecting broken IRQs */ 193 unsigned long last_unhandled; /* Aging timer for unhandled count */ 194 unsigned int irqs_unhandled; 195 spinlock_t lock; 196 #ifdef CONFIG_SMP 197 cpumask_var_t affinity; 198 unsigned int node; 199 #ifdef CONFIG_GENERIC_PENDING_IRQ 200 cpumask_var_t pending_mask; 201 #endif 202 #endif 203 atomic_t threads_active; 204 wait_queue_head_t wait_for_threads; 205 #ifdef CONFIG_PROC_FS 206 struct proc_dir_entry *dir; 207 #endif 208 const char *name; 209 } ____cacheline_internodealigned_in_smp; 210 211 extern void arch_init_copy_chip_data(struct irq_desc *old_desc, 212 struct irq_desc *desc, int node); 213 extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc); 214 215 #ifndef CONFIG_SPARSE_IRQ 216 extern struct irq_desc irq_desc[NR_IRQS]; 217 #endif 218 219 #ifdef CONFIG_NUMA_IRQ_DESC 220 extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int node); 221 #else 222 static inline struct irq_desc *move_irq_desc(struct irq_desc *desc, int node) 223 { 224 return desc; 225 } 226 #endif 227 228 extern struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node); 229 230 /* 231 * Pick up the arch-dependent methods: 232 */ 233 #include <asm/hw_irq.h> 234 235 extern int setup_irq(unsigned int irq, struct irqaction *new); 236 extern void remove_irq(unsigned int irq, struct irqaction *act); 237 238 #ifdef CONFIG_GENERIC_HARDIRQS 239 240 #ifdef CONFIG_SMP 241 242 #ifdef CONFIG_GENERIC_PENDING_IRQ 243 244 void move_native_irq(int irq); 245 void move_masked_irq(int irq); 246 247 #else /* CONFIG_GENERIC_PENDING_IRQ */ 248 249 static inline void move_irq(int irq) 250 { 251 } 252 253 static inline void move_native_irq(int irq) 254 { 255 } 256 257 static inline void move_masked_irq(int irq) 258 { 259 } 260 261 #endif /* CONFIG_GENERIC_PENDING_IRQ */ 262 263 #else /* CONFIG_SMP */ 264 265 #define move_native_irq(x) 266 #define move_masked_irq(x) 267 268 #endif /* CONFIG_SMP */ 269 270 extern int no_irq_affinity; 271 272 static inline int irq_balancing_disabled(unsigned int irq) 273 { 274 struct irq_desc *desc; 275 276 desc = irq_to_desc(irq); 277 return desc->status & IRQ_NO_BALANCING_MASK; 278 } 279 280 /* Handle irq action chains: */ 281 extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action); 282 283 /* 284 * Built-in IRQ handlers for various IRQ types, 285 * callable via desc->chip->handle_irq() 286 */ 287 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc); 288 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); 289 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); 290 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); 291 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); 292 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); 293 extern void handle_nested_irq(unsigned int irq); 294 295 /* 296 * Monolithic do_IRQ implementation. 297 */ 298 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 299 extern unsigned int __do_IRQ(unsigned int irq); 300 #endif 301 302 /* 303 * Architectures call this to let the generic IRQ layer 304 * handle an interrupt. If the descriptor is attached to an 305 * irqchip-style controller then we call the ->handle_irq() handler, 306 * and it calls __do_IRQ() if it's attached to an irqtype-style controller. 307 */ 308 static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc) 309 { 310 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 311 desc->handle_irq(irq, desc); 312 #else 313 if (likely(desc->handle_irq)) 314 desc->handle_irq(irq, desc); 315 else 316 __do_IRQ(irq); 317 #endif 318 } 319 320 static inline void generic_handle_irq(unsigned int irq) 321 { 322 generic_handle_irq_desc(irq, irq_to_desc(irq)); 323 } 324 325 /* Handling of unhandled and spurious interrupts: */ 326 extern void note_interrupt(unsigned int irq, struct irq_desc *desc, 327 irqreturn_t action_ret); 328 329 /* Resending of interrupts :*/ 330 void check_irq_resend(struct irq_desc *desc, unsigned int irq); 331 332 /* Enable/disable irq debugging output: */ 333 extern int noirqdebug_setup(char *str); 334 335 /* Checks whether the interrupt can be requested by request_irq(): */ 336 extern int can_request_irq(unsigned int irq, unsigned long irqflags); 337 338 /* Dummy irq-chip implementations: */ 339 extern struct irq_chip no_irq_chip; 340 extern struct irq_chip dummy_irq_chip; 341 342 extern void 343 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, 344 irq_flow_handler_t handle); 345 extern void 346 set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, 347 irq_flow_handler_t handle, const char *name); 348 349 extern void 350 __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, 351 const char *name); 352 353 /* caller has locked the irq_desc and both params are valid */ 354 static inline void __set_irq_handler_unlocked(int irq, 355 irq_flow_handler_t handler) 356 { 357 struct irq_desc *desc; 358 359 desc = irq_to_desc(irq); 360 desc->handle_irq = handler; 361 } 362 363 /* 364 * Set a highlevel flow handler for a given IRQ: 365 */ 366 static inline void 367 set_irq_handler(unsigned int irq, irq_flow_handler_t handle) 368 { 369 __set_irq_handler(irq, handle, 0, NULL); 370 } 371 372 /* 373 * Set a highlevel chained flow handler for a given IRQ. 374 * (a chained handler is automatically enabled and set to 375 * IRQ_NOREQUEST and IRQ_NOPROBE) 376 */ 377 static inline void 378 set_irq_chained_handler(unsigned int irq, 379 irq_flow_handler_t handle) 380 { 381 __set_irq_handler(irq, handle, 1, NULL); 382 } 383 384 extern void set_irq_nested_thread(unsigned int irq, int nest); 385 386 extern void set_irq_noprobe(unsigned int irq); 387 extern void set_irq_probe(unsigned int irq); 388 389 /* Handle dynamic irq creation and destruction */ 390 extern unsigned int create_irq_nr(unsigned int irq_want, int node); 391 extern int create_irq(void); 392 extern void destroy_irq(unsigned int irq); 393 394 /* Test to see if a driver has successfully requested an irq */ 395 static inline int irq_has_action(unsigned int irq) 396 { 397 struct irq_desc *desc = irq_to_desc(irq); 398 return desc->action != NULL; 399 } 400 401 /* Dynamic irq helper functions */ 402 extern void dynamic_irq_init(unsigned int irq); 403 extern void dynamic_irq_cleanup(unsigned int irq); 404 405 /* Set/get chip/data for an IRQ: */ 406 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); 407 extern int set_irq_data(unsigned int irq, void *data); 408 extern int set_irq_chip_data(unsigned int irq, void *data); 409 extern int set_irq_type(unsigned int irq, unsigned int type); 410 extern int set_irq_msi(unsigned int irq, struct msi_desc *entry); 411 412 #define get_irq_chip(irq) (irq_to_desc(irq)->chip) 413 #define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data) 414 #define get_irq_data(irq) (irq_to_desc(irq)->handler_data) 415 #define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc) 416 417 #define get_irq_desc_chip(desc) ((desc)->chip) 418 #define get_irq_desc_chip_data(desc) ((desc)->chip_data) 419 #define get_irq_desc_data(desc) ((desc)->handler_data) 420 #define get_irq_desc_msi(desc) ((desc)->msi_desc) 421 422 #endif /* CONFIG_GENERIC_HARDIRQS */ 423 424 #endif /* !CONFIG_S390 */ 425 426 #ifdef CONFIG_SMP 427 /** 428 * alloc_desc_masks - allocate cpumasks for irq_desc 429 * @desc: pointer to irq_desc struct 430 * @node: node which will be handling the cpumasks 431 * @boot: true if need bootmem 432 * 433 * Allocates affinity and pending_mask cpumask if required. 434 * Returns true if successful (or not required). 435 */ 436 static inline bool alloc_desc_masks(struct irq_desc *desc, int node, 437 bool boot) 438 { 439 gfp_t gfp = GFP_ATOMIC; 440 441 if (boot) 442 gfp = GFP_NOWAIT; 443 444 #ifdef CONFIG_CPUMASK_OFFSTACK 445 if (!alloc_cpumask_var_node(&desc->affinity, gfp, node)) 446 return false; 447 448 #ifdef CONFIG_GENERIC_PENDING_IRQ 449 if (!alloc_cpumask_var_node(&desc->pending_mask, gfp, node)) { 450 free_cpumask_var(desc->affinity); 451 return false; 452 } 453 #endif 454 #endif 455 return true; 456 } 457 458 static inline void init_desc_masks(struct irq_desc *desc) 459 { 460 cpumask_setall(desc->affinity); 461 #ifdef CONFIG_GENERIC_PENDING_IRQ 462 cpumask_clear(desc->pending_mask); 463 #endif 464 } 465 466 /** 467 * init_copy_desc_masks - copy cpumasks for irq_desc 468 * @old_desc: pointer to old irq_desc struct 469 * @new_desc: pointer to new irq_desc struct 470 * 471 * Insures affinity and pending_masks are copied to new irq_desc. 472 * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the 473 * irq_desc struct so the copy is redundant. 474 */ 475 476 static inline void init_copy_desc_masks(struct irq_desc *old_desc, 477 struct irq_desc *new_desc) 478 { 479 #ifdef CONFIG_CPUMASK_OFFSTACK 480 cpumask_copy(new_desc->affinity, old_desc->affinity); 481 482 #ifdef CONFIG_GENERIC_PENDING_IRQ 483 cpumask_copy(new_desc->pending_mask, old_desc->pending_mask); 484 #endif 485 #endif 486 } 487 488 static inline void free_desc_masks(struct irq_desc *old_desc, 489 struct irq_desc *new_desc) 490 { 491 free_cpumask_var(old_desc->affinity); 492 493 #ifdef CONFIG_GENERIC_PENDING_IRQ 494 free_cpumask_var(old_desc->pending_mask); 495 #endif 496 } 497 498 #else /* !CONFIG_SMP */ 499 500 static inline bool alloc_desc_masks(struct irq_desc *desc, int node, 501 bool boot) 502 { 503 return true; 504 } 505 506 static inline void init_desc_masks(struct irq_desc *desc) 507 { 508 } 509 510 static inline void init_copy_desc_masks(struct irq_desc *old_desc, 511 struct irq_desc *new_desc) 512 { 513 } 514 515 static inline void free_desc_masks(struct irq_desc *old_desc, 516 struct irq_desc *new_desc) 517 { 518 } 519 #endif /* CONFIG_SMP */ 520 521 #endif /* _LINUX_IRQ_H */ 522