1 #ifndef _LINUX_IRQ_H 2 #define _LINUX_IRQ_H 3 4 /* 5 * Please do not include this file in generic code. There is currently 6 * no requirement for any architecture to implement anything held 7 * within this file. 8 * 9 * Thanks. --rmk 10 */ 11 12 #include <linux/smp.h> 13 14 #ifndef CONFIG_S390 15 16 #include <linux/linkage.h> 17 #include <linux/cache.h> 18 #include <linux/spinlock.h> 19 #include <linux/cpumask.h> 20 #include <linux/gfp.h> 21 #include <linux/irqreturn.h> 22 #include <linux/irqnr.h> 23 #include <linux/errno.h> 24 #include <linux/topology.h> 25 #include <linux/wait.h> 26 27 #include <asm/irq.h> 28 #include <asm/ptrace.h> 29 #include <asm/irq_regs.h> 30 31 struct irq_desc; 32 typedef void (*irq_flow_handler_t)(unsigned int irq, 33 struct irq_desc *desc); 34 35 36 /* 37 * IRQ line status. 38 * 39 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h 40 * 41 * IRQ types 42 */ 43 #define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ 44 #define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ 45 #define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ 46 #define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) 47 #define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ 48 #define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ 49 #define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ 50 #define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ 51 52 /* Internal flags */ 53 #define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */ 54 #define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */ 55 #define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */ 56 #define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */ 57 #define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */ 58 #define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */ 59 #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */ 60 #define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */ 61 #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */ 62 #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */ 63 #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */ 64 #define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */ 65 #define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */ 66 #define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */ 67 #define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */ 68 #define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */ 69 #define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */ 70 #define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/ 71 #define IRQ_SUSPENDED 0x04000000 /* IRQ has gone through suspend sequence */ 72 #define IRQ_ONESHOT 0x08000000 /* IRQ is not unmasked after hardirq */ 73 #define IRQ_NESTED_THREAD 0x10000000 /* IRQ is nested into another, no own handler thread */ 74 75 #ifdef CONFIG_IRQ_PER_CPU 76 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) 77 # define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) 78 #else 79 # define CHECK_IRQ_PER_CPU(var) 0 80 # define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING 81 #endif 82 83 struct proc_dir_entry; 84 struct msi_desc; 85 86 /** 87 * struct irq_chip - hardware interrupt chip descriptor 88 * 89 * @name: name for /proc/interrupts 90 * @startup: start up the interrupt (defaults to ->enable if NULL) 91 * @shutdown: shut down the interrupt (defaults to ->disable if NULL) 92 * @enable: enable the interrupt (defaults to chip->unmask if NULL) 93 * @disable: disable the interrupt 94 * @ack: start of a new interrupt 95 * @mask: mask an interrupt source 96 * @mask_ack: ack and mask an interrupt source 97 * @unmask: unmask an interrupt source 98 * @eoi: end of interrupt - chip level 99 * @end: end of interrupt - flow level 100 * @set_affinity: set the CPU affinity on SMP machines 101 * @retrigger: resend an IRQ to the CPU 102 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ 103 * @set_wake: enable/disable power-management wake-on of an IRQ 104 * 105 * @bus_lock: function to lock access to slow bus (i2c) chips 106 * @bus_sync_unlock: function to sync and unlock slow bus (i2c) chips 107 * 108 * @release: release function solely used by UML 109 * @typename: obsoleted by name, kept as migration helper 110 */ 111 struct irq_chip { 112 const char *name; 113 unsigned int (*startup)(unsigned int irq); 114 void (*shutdown)(unsigned int irq); 115 void (*enable)(unsigned int irq); 116 void (*disable)(unsigned int irq); 117 118 void (*ack)(unsigned int irq); 119 void (*mask)(unsigned int irq); 120 void (*mask_ack)(unsigned int irq); 121 void (*unmask)(unsigned int irq); 122 void (*eoi)(unsigned int irq); 123 124 void (*end)(unsigned int irq); 125 int (*set_affinity)(unsigned int irq, 126 const struct cpumask *dest); 127 int (*retrigger)(unsigned int irq); 128 int (*set_type)(unsigned int irq, unsigned int flow_type); 129 int (*set_wake)(unsigned int irq, unsigned int on); 130 131 void (*bus_lock)(unsigned int irq); 132 void (*bus_sync_unlock)(unsigned int irq); 133 134 /* Currently used only by UML, might disappear one day.*/ 135 #ifdef CONFIG_IRQ_RELEASE_METHOD 136 void (*release)(unsigned int irq, void *dev_id); 137 #endif 138 /* 139 * For compatibility, ->typename is copied into ->name. 140 * Will disappear. 141 */ 142 const char *typename; 143 }; 144 145 struct timer_rand_state; 146 struct irq_2_iommu; 147 /** 148 * struct irq_desc - interrupt descriptor 149 * @irq: interrupt number for this descriptor 150 * @timer_rand_state: pointer to timer rand state struct 151 * @kstat_irqs: irq stats per cpu 152 * @irq_2_iommu: iommu with this irq 153 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] 154 * @chip: low level interrupt hardware access 155 * @msi_desc: MSI descriptor 156 * @handler_data: per-IRQ data for the irq_chip methods 157 * @chip_data: platform-specific per-chip private data for the chip 158 * methods, to allow shared chip implementations 159 * @action: the irq action chain 160 * @status: status information 161 * @depth: disable-depth, for nested irq_disable() calls 162 * @wake_depth: enable depth, for multiple set_irq_wake() callers 163 * @irq_count: stats field to detect stalled irqs 164 * @last_unhandled: aging timer for unhandled count 165 * @irqs_unhandled: stats field for spurious unhandled interrupts 166 * @lock: locking for SMP 167 * @affinity: IRQ affinity on SMP 168 * @node: node index useful for balancing 169 * @pending_mask: pending rebalanced interrupts 170 * @threads_active: number of irqaction threads currently running 171 * @wait_for_threads: wait queue for sync_irq to wait for threaded handlers 172 * @dir: /proc/irq/ procfs entry 173 * @name: flow handler name for /proc/interrupts output 174 */ 175 struct irq_desc { 176 unsigned int irq; 177 struct timer_rand_state *timer_rand_state; 178 unsigned int *kstat_irqs; 179 #ifdef CONFIG_INTR_REMAP 180 struct irq_2_iommu *irq_2_iommu; 181 #endif 182 irq_flow_handler_t handle_irq; 183 struct irq_chip *chip; 184 struct msi_desc *msi_desc; 185 void *handler_data; 186 void *chip_data; 187 struct irqaction *action; /* IRQ action list */ 188 unsigned int status; /* IRQ status */ 189 190 unsigned int depth; /* nested irq disables */ 191 unsigned int wake_depth; /* nested wake enables */ 192 unsigned int irq_count; /* For detecting broken IRQs */ 193 unsigned long last_unhandled; /* Aging timer for unhandled count */ 194 unsigned int irqs_unhandled; 195 raw_spinlock_t lock; 196 #ifdef CONFIG_SMP 197 cpumask_var_t affinity; 198 const struct cpumask *affinity_hint; 199 unsigned int node; 200 #ifdef CONFIG_GENERIC_PENDING_IRQ 201 cpumask_var_t pending_mask; 202 #endif 203 #endif 204 atomic_t threads_active; 205 wait_queue_head_t wait_for_threads; 206 #ifdef CONFIG_PROC_FS 207 struct proc_dir_entry *dir; 208 #endif 209 const char *name; 210 } ____cacheline_internodealigned_in_smp; 211 212 extern void arch_init_copy_chip_data(struct irq_desc *old_desc, 213 struct irq_desc *desc, int node); 214 extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc); 215 216 #ifndef CONFIG_SPARSE_IRQ 217 extern struct irq_desc irq_desc[NR_IRQS]; 218 #endif 219 220 #ifdef CONFIG_NUMA_IRQ_DESC 221 extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int node); 222 #else 223 static inline struct irq_desc *move_irq_desc(struct irq_desc *desc, int node) 224 { 225 return desc; 226 } 227 #endif 228 229 extern struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node); 230 231 /* 232 * Pick up the arch-dependent methods: 233 */ 234 #include <asm/hw_irq.h> 235 236 extern int setup_irq(unsigned int irq, struct irqaction *new); 237 extern void remove_irq(unsigned int irq, struct irqaction *act); 238 239 #ifdef CONFIG_GENERIC_HARDIRQS 240 241 #ifdef CONFIG_SMP 242 243 #ifdef CONFIG_GENERIC_PENDING_IRQ 244 245 void move_native_irq(int irq); 246 void move_masked_irq(int irq); 247 248 #else /* CONFIG_GENERIC_PENDING_IRQ */ 249 250 static inline void move_irq(int irq) 251 { 252 } 253 254 static inline void move_native_irq(int irq) 255 { 256 } 257 258 static inline void move_masked_irq(int irq) 259 { 260 } 261 262 #endif /* CONFIG_GENERIC_PENDING_IRQ */ 263 264 #else /* CONFIG_SMP */ 265 266 #define move_native_irq(x) 267 #define move_masked_irq(x) 268 269 #endif /* CONFIG_SMP */ 270 271 extern int no_irq_affinity; 272 273 static inline int irq_balancing_disabled(unsigned int irq) 274 { 275 struct irq_desc *desc; 276 277 desc = irq_to_desc(irq); 278 return desc->status & IRQ_NO_BALANCING_MASK; 279 } 280 281 /* Handle irq action chains: */ 282 extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action); 283 284 /* 285 * Built-in IRQ handlers for various IRQ types, 286 * callable via desc->handle_irq() 287 */ 288 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc); 289 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); 290 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); 291 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); 292 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); 293 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); 294 extern void handle_nested_irq(unsigned int irq); 295 296 /* 297 * Monolithic do_IRQ implementation. 298 */ 299 #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 300 extern unsigned int __do_IRQ(unsigned int irq); 301 #endif 302 303 /* 304 * Architectures call this to let the generic IRQ layer 305 * handle an interrupt. If the descriptor is attached to an 306 * irqchip-style controller then we call the ->handle_irq() handler, 307 * and it calls __do_IRQ() if it's attached to an irqtype-style controller. 308 */ 309 static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc) 310 { 311 #ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 312 desc->handle_irq(irq, desc); 313 #else 314 if (likely(desc->handle_irq)) 315 desc->handle_irq(irq, desc); 316 else 317 __do_IRQ(irq); 318 #endif 319 } 320 321 static inline void generic_handle_irq(unsigned int irq) 322 { 323 generic_handle_irq_desc(irq, irq_to_desc(irq)); 324 } 325 326 /* Handling of unhandled and spurious interrupts: */ 327 extern void note_interrupt(unsigned int irq, struct irq_desc *desc, 328 irqreturn_t action_ret); 329 330 /* Resending of interrupts :*/ 331 void check_irq_resend(struct irq_desc *desc, unsigned int irq); 332 333 /* Enable/disable irq debugging output: */ 334 extern int noirqdebug_setup(char *str); 335 336 /* Checks whether the interrupt can be requested by request_irq(): */ 337 extern int can_request_irq(unsigned int irq, unsigned long irqflags); 338 339 /* Dummy irq-chip implementations: */ 340 extern struct irq_chip no_irq_chip; 341 extern struct irq_chip dummy_irq_chip; 342 343 extern void 344 set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, 345 irq_flow_handler_t handle); 346 extern void 347 set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, 348 irq_flow_handler_t handle, const char *name); 349 350 extern void 351 __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, 352 const char *name); 353 354 /* caller has locked the irq_desc and both params are valid */ 355 static inline void __set_irq_handler_unlocked(int irq, 356 irq_flow_handler_t handler) 357 { 358 struct irq_desc *desc; 359 360 desc = irq_to_desc(irq); 361 desc->handle_irq = handler; 362 } 363 364 /* 365 * Set a highlevel flow handler for a given IRQ: 366 */ 367 static inline void 368 set_irq_handler(unsigned int irq, irq_flow_handler_t handle) 369 { 370 __set_irq_handler(irq, handle, 0, NULL); 371 } 372 373 /* 374 * Set a highlevel chained flow handler for a given IRQ. 375 * (a chained handler is automatically enabled and set to 376 * IRQ_NOREQUEST and IRQ_NOPROBE) 377 */ 378 static inline void 379 set_irq_chained_handler(unsigned int irq, 380 irq_flow_handler_t handle) 381 { 382 __set_irq_handler(irq, handle, 1, NULL); 383 } 384 385 extern void set_irq_nested_thread(unsigned int irq, int nest); 386 387 extern void set_irq_noprobe(unsigned int irq); 388 extern void set_irq_probe(unsigned int irq); 389 390 /* Handle dynamic irq creation and destruction */ 391 extern unsigned int create_irq_nr(unsigned int irq_want, int node); 392 extern int create_irq(void); 393 extern void destroy_irq(unsigned int irq); 394 395 /* Test to see if a driver has successfully requested an irq */ 396 static inline int irq_has_action(unsigned int irq) 397 { 398 struct irq_desc *desc = irq_to_desc(irq); 399 return desc->action != NULL; 400 } 401 402 /* Dynamic irq helper functions */ 403 extern void dynamic_irq_init(unsigned int irq); 404 void dynamic_irq_init_keep_chip_data(unsigned int irq); 405 extern void dynamic_irq_cleanup(unsigned int irq); 406 void dynamic_irq_cleanup_keep_chip_data(unsigned int irq); 407 408 /* Set/get chip/data for an IRQ: */ 409 extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); 410 extern int set_irq_data(unsigned int irq, void *data); 411 extern int set_irq_chip_data(unsigned int irq, void *data); 412 extern int set_irq_type(unsigned int irq, unsigned int type); 413 extern int set_irq_msi(unsigned int irq, struct msi_desc *entry); 414 415 #define get_irq_chip(irq) (irq_to_desc(irq)->chip) 416 #define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data) 417 #define get_irq_data(irq) (irq_to_desc(irq)->handler_data) 418 #define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc) 419 420 #define get_irq_desc_chip(desc) ((desc)->chip) 421 #define get_irq_desc_chip_data(desc) ((desc)->chip_data) 422 #define get_irq_desc_data(desc) ((desc)->handler_data) 423 #define get_irq_desc_msi(desc) ((desc)->msi_desc) 424 425 #endif /* CONFIG_GENERIC_HARDIRQS */ 426 427 #endif /* !CONFIG_S390 */ 428 429 #ifdef CONFIG_SMP 430 /** 431 * alloc_desc_masks - allocate cpumasks for irq_desc 432 * @desc: pointer to irq_desc struct 433 * @node: node which will be handling the cpumasks 434 * @boot: true if need bootmem 435 * 436 * Allocates affinity and pending_mask cpumask if required. 437 * Returns true if successful (or not required). 438 */ 439 static inline bool alloc_desc_masks(struct irq_desc *desc, int node, 440 bool boot) 441 { 442 gfp_t gfp = GFP_ATOMIC; 443 444 if (boot) 445 gfp = GFP_NOWAIT; 446 447 #ifdef CONFIG_CPUMASK_OFFSTACK 448 if (!alloc_cpumask_var_node(&desc->affinity, gfp, node)) 449 return false; 450 451 #ifdef CONFIG_GENERIC_PENDING_IRQ 452 if (!alloc_cpumask_var_node(&desc->pending_mask, gfp, node)) { 453 free_cpumask_var(desc->affinity); 454 return false; 455 } 456 #endif 457 #endif 458 return true; 459 } 460 461 static inline void init_desc_masks(struct irq_desc *desc) 462 { 463 cpumask_setall(desc->affinity); 464 #ifdef CONFIG_GENERIC_PENDING_IRQ 465 cpumask_clear(desc->pending_mask); 466 #endif 467 } 468 469 /** 470 * init_copy_desc_masks - copy cpumasks for irq_desc 471 * @old_desc: pointer to old irq_desc struct 472 * @new_desc: pointer to new irq_desc struct 473 * 474 * Insures affinity and pending_masks are copied to new irq_desc. 475 * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the 476 * irq_desc struct so the copy is redundant. 477 */ 478 479 static inline void init_copy_desc_masks(struct irq_desc *old_desc, 480 struct irq_desc *new_desc) 481 { 482 #ifdef CONFIG_CPUMASK_OFFSTACK 483 cpumask_copy(new_desc->affinity, old_desc->affinity); 484 485 #ifdef CONFIG_GENERIC_PENDING_IRQ 486 cpumask_copy(new_desc->pending_mask, old_desc->pending_mask); 487 #endif 488 #endif 489 } 490 491 static inline void free_desc_masks(struct irq_desc *old_desc, 492 struct irq_desc *new_desc) 493 { 494 free_cpumask_var(old_desc->affinity); 495 496 #ifdef CONFIG_GENERIC_PENDING_IRQ 497 free_cpumask_var(old_desc->pending_mask); 498 #endif 499 } 500 501 #else /* !CONFIG_SMP */ 502 503 static inline bool alloc_desc_masks(struct irq_desc *desc, int node, 504 bool boot) 505 { 506 return true; 507 } 508 509 static inline void init_desc_masks(struct irq_desc *desc) 510 { 511 } 512 513 static inline void init_copy_desc_masks(struct irq_desc *old_desc, 514 struct irq_desc *new_desc) 515 { 516 } 517 518 static inline void free_desc_masks(struct irq_desc *old_desc, 519 struct irq_desc *new_desc) 520 { 521 } 522 #endif /* CONFIG_SMP */ 523 524 #endif /* _LINUX_IRQ_H */ 525