1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __IO_PGTABLE_H 3 #define __IO_PGTABLE_H 4 #include <linux/bitops.h> 5 6 /* 7 * Public API for use by IOMMU drivers 8 */ 9 enum io_pgtable_fmt { 10 ARM_32_LPAE_S1, 11 ARM_32_LPAE_S2, 12 ARM_64_LPAE_S1, 13 ARM_64_LPAE_S2, 14 ARM_V7S, 15 ARM_MALI_LPAE, 16 IO_PGTABLE_NUM_FMTS, 17 }; 18 19 /** 20 * struct iommu_gather_ops - IOMMU callbacks for TLB and page table management. 21 * 22 * @tlb_flush_all: Synchronously invalidate the entire TLB context. 23 * @tlb_add_flush: Queue up a TLB invalidation for a virtual address range. 24 * @tlb_sync: Ensure any queued TLB invalidation has taken effect, and 25 * any corresponding page table updates are visible to the 26 * IOMMU. 27 * 28 * Note that these can all be called in atomic context and must therefore 29 * not block. 30 */ 31 struct iommu_gather_ops { 32 void (*tlb_flush_all)(void *cookie); 33 void (*tlb_add_flush)(unsigned long iova, size_t size, size_t granule, 34 bool leaf, void *cookie); 35 void (*tlb_sync)(void *cookie); 36 }; 37 38 /** 39 * struct io_pgtable_cfg - Configuration data for a set of page tables. 40 * 41 * @quirks: A bitmap of hardware quirks that require some special 42 * action by the low-level page table allocator. 43 * @pgsize_bitmap: A bitmap of page sizes supported by this set of page 44 * tables. 45 * @ias: Input address (iova) size, in bits. 46 * @oas: Output address (paddr) size, in bits. 47 * @coherent_walk A flag to indicate whether or not page table walks made 48 * by the IOMMU are coherent with the CPU caches. 49 * @tlb: TLB management callbacks for this set of tables. 50 * @iommu_dev: The device representing the DMA configuration for the 51 * page table walker. 52 */ 53 struct io_pgtable_cfg { 54 /* 55 * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in 56 * stage 1 PTEs, for hardware which insists on validating them 57 * even in non-secure state where they should normally be ignored. 58 * 59 * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and 60 * IOMMU_NOEXEC flags and map everything with full access, for 61 * hardware which does not implement the permissions of a given 62 * format, and/or requires some format-specific default value. 63 * 64 * IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid 65 * (unmapped) entries but the hardware might do so anyway, perform 66 * TLB maintenance when mapping as well as when unmapping. 67 * 68 * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend 69 * to support up to 34 bits PA where the bit32 and bit33 are 70 * encoded in the bit9 and bit4 of the PTE respectively. 71 * 72 * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs 73 * on unmap, for DMA domains using the flush queue mechanism for 74 * delayed invalidation. 75 */ 76 #define IO_PGTABLE_QUIRK_ARM_NS BIT(0) 77 #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1) 78 #define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2) 79 #define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3) 80 #define IO_PGTABLE_QUIRK_NON_STRICT BIT(4) 81 unsigned long quirks; 82 unsigned long pgsize_bitmap; 83 unsigned int ias; 84 unsigned int oas; 85 bool coherent_walk; 86 const struct iommu_gather_ops *tlb; 87 struct device *iommu_dev; 88 89 /* Low-level data specific to the table format */ 90 union { 91 struct { 92 u64 ttbr[2]; 93 u64 tcr; 94 u64 mair[2]; 95 } arm_lpae_s1_cfg; 96 97 struct { 98 u64 vttbr; 99 u64 vtcr; 100 } arm_lpae_s2_cfg; 101 102 struct { 103 u32 ttbr[2]; 104 u32 tcr; 105 u32 nmrr; 106 u32 prrr; 107 } arm_v7s_cfg; 108 109 struct { 110 u64 transtab; 111 u64 memattr; 112 } arm_mali_lpae_cfg; 113 }; 114 }; 115 116 /** 117 * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers. 118 * 119 * @map: Map a physically contiguous memory region. 120 * @unmap: Unmap a physically contiguous memory region. 121 * @iova_to_phys: Translate iova to physical address. 122 * 123 * These functions map directly onto the iommu_ops member functions with 124 * the same names. 125 */ 126 struct io_pgtable_ops { 127 int (*map)(struct io_pgtable_ops *ops, unsigned long iova, 128 phys_addr_t paddr, size_t size, int prot); 129 size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova, 130 size_t size); 131 phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops, 132 unsigned long iova); 133 }; 134 135 /** 136 * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU. 137 * 138 * @fmt: The page table format. 139 * @cfg: The page table configuration. This will be modified to represent 140 * the configuration actually provided by the allocator (e.g. the 141 * pgsize_bitmap may be restricted). 142 * @cookie: An opaque token provided by the IOMMU driver and passed back to 143 * the callback routines in cfg->tlb. 144 */ 145 struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt, 146 struct io_pgtable_cfg *cfg, 147 void *cookie); 148 149 /** 150 * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller 151 * *must* ensure that the page table is no longer 152 * live, but the TLB can be dirty. 153 * 154 * @ops: The ops returned from alloc_io_pgtable_ops. 155 */ 156 void free_io_pgtable_ops(struct io_pgtable_ops *ops); 157 158 159 /* 160 * Internal structures for page table allocator implementations. 161 */ 162 163 /** 164 * struct io_pgtable - Internal structure describing a set of page tables. 165 * 166 * @fmt: The page table format. 167 * @cookie: An opaque token provided by the IOMMU driver and passed back to 168 * any callback routines. 169 * @cfg: A copy of the page table configuration. 170 * @ops: The page table operations in use for this set of page tables. 171 */ 172 struct io_pgtable { 173 enum io_pgtable_fmt fmt; 174 void *cookie; 175 struct io_pgtable_cfg cfg; 176 struct io_pgtable_ops ops; 177 }; 178 179 #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops) 180 181 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop) 182 { 183 iop->cfg.tlb->tlb_flush_all(iop->cookie); 184 } 185 186 static inline void io_pgtable_tlb_add_flush(struct io_pgtable *iop, 187 unsigned long iova, size_t size, size_t granule, bool leaf) 188 { 189 iop->cfg.tlb->tlb_add_flush(iova, size, granule, leaf, iop->cookie); 190 } 191 192 static inline void io_pgtable_tlb_sync(struct io_pgtable *iop) 193 { 194 iop->cfg.tlb->tlb_sync(iop->cookie); 195 } 196 197 /** 198 * struct io_pgtable_init_fns - Alloc/free a set of page tables for a 199 * particular format. 200 * 201 * @alloc: Allocate a set of page tables described by cfg. 202 * @free: Free the page tables associated with iop. 203 */ 204 struct io_pgtable_init_fns { 205 struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie); 206 void (*free)(struct io_pgtable *iop); 207 }; 208 209 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns; 210 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns; 211 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns; 212 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns; 213 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns; 214 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns; 215 216 #endif /* __IO_PGTABLE_H */ 217