1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Data types and headers for RAPL support 4 * 5 * Copyright (C) 2019 Intel Corporation. 6 * 7 * Author: Zhang Rui <[email protected]> 8 */ 9 10 #ifndef __INTEL_RAPL_H__ 11 #define __INTEL_RAPL_H__ 12 13 #include <linux/types.h> 14 #include <linux/powercap.h> 15 16 enum rapl_domain_type { 17 RAPL_DOMAIN_PACKAGE, /* entire package/socket */ 18 RAPL_DOMAIN_PP0, /* core power plane */ 19 RAPL_DOMAIN_PP1, /* graphics uncore */ 20 RAPL_DOMAIN_DRAM, /* DRAM control_type */ 21 RAPL_DOMAIN_PLATFORM, /* PSys control_type */ 22 RAPL_DOMAIN_MAX, 23 }; 24 25 enum rapl_domain_reg_id { 26 RAPL_DOMAIN_REG_LIMIT, 27 RAPL_DOMAIN_REG_STATUS, 28 RAPL_DOMAIN_REG_PERF, 29 RAPL_DOMAIN_REG_POLICY, 30 RAPL_DOMAIN_REG_INFO, 31 RAPL_DOMAIN_REG_MAX, 32 }; 33 34 struct rapl_package; 35 36 enum rapl_primitives { 37 ENERGY_COUNTER, 38 POWER_LIMIT1, 39 POWER_LIMIT2, 40 FW_LOCK, 41 42 PL1_ENABLE, /* power limit 1, aka long term */ 43 PL1_CLAMP, /* allow frequency to go below OS request */ 44 PL2_ENABLE, /* power limit 2, aka short term, instantaneous */ 45 PL2_CLAMP, 46 47 TIME_WINDOW1, /* long term */ 48 TIME_WINDOW2, /* short term */ 49 THERMAL_SPEC_POWER, 50 MAX_POWER, 51 52 MIN_POWER, 53 MAX_TIME_WINDOW, 54 THROTTLED_TIME, 55 PRIORITY_LEVEL, 56 57 /* below are not raw primitive data */ 58 AVERAGE_POWER, 59 NR_RAPL_PRIMITIVES, 60 }; 61 62 struct rapl_domain_data { 63 u64 primitives[NR_RAPL_PRIMITIVES]; 64 unsigned long timestamp; 65 }; 66 67 #define NR_POWER_LIMITS (2) 68 struct rapl_power_limit { 69 struct powercap_zone_constraint *constraint; 70 int prim_id; /* primitive ID used to enable */ 71 struct rapl_domain *domain; 72 const char *name; 73 u64 last_power_limit; 74 }; 75 76 struct rapl_package; 77 78 struct rapl_domain { 79 const char *name; 80 enum rapl_domain_type id; 81 int regs[RAPL_DOMAIN_REG_MAX]; 82 struct powercap_zone power_zone; 83 struct rapl_domain_data rdd; 84 struct rapl_power_limit rpl[NR_POWER_LIMITS]; 85 u64 attr_map; /* track capabilities */ 86 unsigned int state; 87 unsigned int domain_energy_unit; 88 struct rapl_package *rp; 89 }; 90 91 struct reg_action { 92 u32 reg; 93 u64 mask; 94 u64 value; 95 int err; 96 }; 97 98 /** 99 * struct rapl_if_priv: private data for different RAPL interfaces 100 * @control_type: Each RAPL interface must have its own powercap 101 * control type. 102 * @platform_rapl_domain: Optional. Some RAPL interface may have platform 103 * level RAPL control. 104 * @pcap_rapl_online: CPU hotplug state for each RAPL interface. 105 * @reg_unit: Register for getting energy/power/time unit. 106 * @regs: Register sets for different RAPL Domains. 107 * @read_raw: Callback for reading RAPL interface specific 108 * registers. 109 * @write_raw: Callback for writing RAPL interface specific 110 * registers. 111 */ 112 struct rapl_if_priv { 113 struct powercap_control_type *control_type; 114 struct rapl_domain *platform_rapl_domain; 115 enum cpuhp_state pcap_rapl_online; 116 u32 reg_unit; 117 u32 regs[RAPL_DOMAIN_MAX][RAPL_DOMAIN_REG_MAX]; 118 int (*read_raw)(int cpu, struct reg_action *ra); 119 int (*write_raw)(int cpu, struct reg_action *ra); 120 }; 121 122 /* maximum rapl package domain name: package-%d-die-%d */ 123 #define PACKAGE_DOMAIN_NAME_LENGTH 30 124 125 struct rapl_package { 126 unsigned int id; /* logical die id, equals physical 1-die systems */ 127 unsigned int nr_domains; 128 unsigned long domain_map; /* bit map of active domains */ 129 unsigned int power_unit; 130 unsigned int energy_unit; 131 unsigned int time_unit; 132 struct rapl_domain *domains; /* array of domains, sized at runtime */ 133 struct powercap_zone *power_zone; /* keep track of parent zone */ 134 unsigned long power_limit_irq; /* keep track of package power limit 135 * notify interrupt enable status. 136 */ 137 struct list_head plist; 138 int lead_cpu; /* one active cpu per package for access */ 139 /* Track active cpus */ 140 struct cpumask cpumask; 141 char name[PACKAGE_DOMAIN_NAME_LENGTH]; 142 struct rapl_if_priv *priv; 143 }; 144 145 #endif /* __INTEL_RAPL_H__ */ 146