xref: /linux-6.15/include/linux/i3c/master.h (revision bb4e9af0)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2018 Cadence Design Systems Inc.
4  *
5  * Author: Boris Brezillon <[email protected]>
6  */
7 
8 #ifndef I3C_MASTER_H
9 #define I3C_MASTER_H
10 
11 #include <asm/bitsperlong.h>
12 
13 #include <linux/bitops.h>
14 #include <linux/i2c.h>
15 #include <linux/i3c/ccc.h>
16 #include <linux/i3c/device.h>
17 #include <linux/rwsem.h>
18 #include <linux/spinlock.h>
19 #include <linux/workqueue.h>
20 
21 #define I3C_HOT_JOIN_ADDR		0x2
22 #define I3C_BROADCAST_ADDR		0x7e
23 #define I3C_MAX_ADDR			GENMASK(6, 0)
24 
25 struct i3c_master_controller;
26 struct i3c_bus;
27 struct i2c_device;
28 struct i3c_device;
29 
30 /**
31  * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor
32  * @node: node element used to insert the slot into the I2C or I3C device
33  *	  list
34  * @master: I3C master that instantiated this device. Will be used to do
35  *	    I2C/I3C transfers
36  * @master_priv: master private data assigned to the device. Can be used to
37  *		 add master specific information
38  *
39  * This structure is describing common I3C/I2C dev information.
40  */
41 struct i3c_i2c_dev_desc {
42 	struct list_head node;
43 	struct i3c_master_controller *master;
44 	void *master_priv;
45 };
46 
47 #define I3C_LVR_I2C_INDEX_MASK		GENMASK(7, 5)
48 #define I3C_LVR_I2C_INDEX(x)		((x) << 5)
49 #define I3C_LVR_I2C_FM_MODE		BIT(4)
50 
51 #define I2C_MAX_ADDR			GENMASK(6, 0)
52 
53 /**
54  * struct i2c_dev_boardinfo - I2C device board information
55  * @node: used to insert the boardinfo object in the I2C boardinfo list
56  * @base: regular I2C board information
57  * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about
58  *	 the I2C device limitations
59  *
60  * This structure is used to attach board-level information to an I2C device.
61  * Each I2C device connected on the I3C bus should have one.
62  */
63 struct i2c_dev_boardinfo {
64 	struct list_head node;
65 	struct i2c_board_info base;
66 	u8 lvr;
67 };
68 
69 /**
70  * struct i2c_dev_desc - I2C device descriptor
71  * @common: common part of the I2C device descriptor
72  * @boardinfo: pointer to the boardinfo attached to this I2C device
73  * @dev: I2C device object registered to the I2C framework
74  *
75  * Each I2C device connected on the bus will have an i2c_dev_desc.
76  * This object is created by the core and later attached to the controller
77  * using &struct_i3c_master_controller->ops->attach_i2c_dev().
78  *
79  * &struct_i2c_dev_desc is the internal representation of an I2C device
80  * connected on an I3C bus. This object is also passed to all
81  * &struct_i3c_master_controller_ops hooks.
82  */
83 struct i2c_dev_desc {
84 	struct i3c_i2c_dev_desc common;
85 	const struct i2c_dev_boardinfo *boardinfo;
86 	struct i2c_client *dev;
87 };
88 
89 /**
90  * struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot
91  * @work: work associated to this slot. The IBI handler will be called from
92  *	  there
93  * @dev: the I3C device that has generated this IBI
94  * @len: length of the payload associated to this IBI
95  * @data: payload buffer
96  *
97  * An IBI slot is an object pre-allocated by the controller and used when an
98  * IBI comes in.
99  * Every time an IBI comes in, the I3C master driver should find a free IBI
100  * slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using
101  * i3c_master_queue_ibi().
102  *
103  * How IBI slots are allocated is left to the I3C master driver, though, for
104  * simple kmalloc-based allocation, the generic IBI slot pool can be used.
105  */
106 struct i3c_ibi_slot {
107 	struct work_struct work;
108 	struct i3c_dev_desc *dev;
109 	unsigned int len;
110 	void *data;
111 };
112 
113 /**
114  * struct i3c_device_ibi_info - IBI information attached to a specific device
115  * @all_ibis_handled: used to be informed when no more IBIs are waiting to be
116  *		      processed. Used by i3c_device_disable_ibi() to wait for
117  *		      all IBIs to be dequeued
118  * @pending_ibis: count the number of pending IBIs. Each pending IBI has its
119  *		  work element queued to the controller workqueue
120  * @max_payload_len: maximum payload length for an IBI coming from this device.
121  *		     this value is specified when calling
122  *		     i3c_device_request_ibi() and should not change at run
123  *		     time. All messages IBIs exceeding this limit should be
124  *		     rejected by the master
125  * @num_slots: number of IBI slots reserved for this device
126  * @enabled: reflect the IBI status
127  * @handler: IBI handler specified at i3c_device_request_ibi() call time. This
128  *	     handler will be called from the controller workqueue, and as such
129  *	     is allowed to sleep (though it is recommended to process the IBI
130  *	     as fast as possible to not stall processing of other IBIs queued
131  *	     on the same workqueue).
132  *	     New I3C messages can be sent from the IBI handler
133  *
134  * The &struct_i3c_device_ibi_info object is allocated when
135  * i3c_device_request_ibi() is called and attached to a specific device. This
136  * object is here to manage IBIs coming from a specific I3C device.
137  *
138  * Note that this structure is the generic view of the IBI management
139  * infrastructure. I3C master drivers may have their own internal
140  * representation which they can associate to the device using
141  * controller-private data.
142  */
143 struct i3c_device_ibi_info {
144 	struct completion all_ibis_handled;
145 	atomic_t pending_ibis;
146 	unsigned int max_payload_len;
147 	unsigned int num_slots;
148 	unsigned int enabled;
149 	void (*handler)(struct i3c_device *dev,
150 			const struct i3c_ibi_payload *payload);
151 };
152 
153 /**
154  * struct i3c_dev_boardinfo - I3C device board information
155  * @node: used to insert the boardinfo object in the I3C boardinfo list
156  * @init_dyn_addr: initial dynamic address requested by the FW. We provide no
157  *		   guarantee that the device will end up using this address,
158  *		   but try our best to assign this specific address to the
159  *		   device
160  * @static_addr: static address the I3C device listen on before it's been
161  *		 assigned a dynamic address by the master. Will be used during
162  *		 bus initialization to assign it a specific dynamic address
163  *		 before starting DAA (Dynamic Address Assignment)
164  * @pid: I3C Provisional ID exposed by the device. This is a unique identifier
165  *	 that may be used to attach boardinfo to i3c_dev_desc when the device
166  *	 does not have a static address
167  * @of_node: optional DT node in case the device has been described in the DT
168  *
169  * This structure is used to attach board-level information to an I3C device.
170  * Not all I3C devices connected on the bus will have a boardinfo. It's only
171  * needed if you want to attach extra resources to a device or assign it a
172  * specific dynamic address.
173  */
174 struct i3c_dev_boardinfo {
175 	struct list_head node;
176 	u8 init_dyn_addr;
177 	u8 static_addr;
178 	u64 pid;
179 	struct device_node *of_node;
180 };
181 
182 /**
183  * struct i3c_dev_desc - I3C device descriptor
184  * @common: common part of the I3C device descriptor
185  * @info: I3C device information. Will be automatically filled when you create
186  *	  your device with i3c_master_add_i3c_dev_locked()
187  * @ibi_lock: lock used to protect the &struct_i3c_device->ibi
188  * @ibi: IBI info attached to a device. Should be NULL until
189  *	 i3c_device_request_ibi() is called
190  * @dev: pointer to the I3C device object exposed to I3C device drivers. This
191  *	 should never be accessed from I3C master controller drivers. Only core
192  *	 code should manipulate it in when updating the dev <-> desc link or
193  *	 when propagating IBI events to the driver
194  * @boardinfo: pointer to the boardinfo attached to this I3C device
195  *
196  * Internal representation of an I3C device. This object is only used by the
197  * core and passed to I3C master controller drivers when they're requested to
198  * do some operations on the device.
199  * The core maintains the link between the internal I3C dev descriptor and the
200  * object exposed to the I3C device drivers (&struct_i3c_device).
201  */
202 struct i3c_dev_desc {
203 	struct i3c_i2c_dev_desc common;
204 	struct i3c_device_info info;
205 	struct mutex ibi_lock;
206 	struct i3c_device_ibi_info *ibi;
207 	struct i3c_device *dev;
208 	const struct i3c_dev_boardinfo *boardinfo;
209 };
210 
211 /**
212  * struct i3c_device - I3C device object
213  * @dev: device object to register the I3C dev to the device model
214  * @desc: pointer to an i3c device descriptor object. This link is updated
215  *	  every time the I3C device is rediscovered with a different dynamic
216  *	  address assigned
217  * @bus: I3C bus this device is attached to
218  *
219  * I3C device object exposed to I3C device drivers. The takes care of linking
220  * this object to the relevant &struct_i3c_dev_desc one.
221  * All I3C devs on the I3C bus are represented, including I3C masters. For each
222  * of them, we have an instance of &struct i3c_device.
223  */
224 struct i3c_device {
225 	struct device dev;
226 	struct i3c_dev_desc *desc;
227 	struct i3c_bus *bus;
228 };
229 
230 /*
231  * The I3C specification says the maximum number of devices connected on the
232  * bus is 11, but this number depends on external parameters like trace length,
233  * capacitive load per Device, and the types of Devices present on the Bus.
234  * I3C master can also have limitations, so this number is just here as a
235  * reference and should be adjusted on a per-controller/per-board basis.
236  */
237 #define I3C_BUS_MAX_DEVS		11
238 
239 #define I3C_BUS_MAX_I3C_SCL_RATE	12900000
240 #define I3C_BUS_TYP_I3C_SCL_RATE	12500000
241 #define I3C_BUS_I2C_FM_PLUS_SCL_RATE	1000000
242 #define I3C_BUS_I2C_FM_SCL_RATE		400000
243 #define I3C_BUS_TLOW_OD_MIN_NS		200
244 
245 /**
246  * enum i3c_bus_mode - I3C bus mode
247  * @I3C_BUS_MODE_PURE: only I3C devices are connected to the bus. No limitation
248  *		       expected
249  * @I3C_BUS_MODE_MIXED_FAST: I2C devices with 50ns spike filter are present on
250  *			     the bus. The only impact in this mode is that the
251  *			     high SCL pulse has to stay below 50ns to trick I2C
252  *			     devices when transmitting I3C frames
253  * @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are
254  *				present on the bus. However they allow
255  *				compliance up to the maximum SDR SCL clock
256  *				frequency.
257  * @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present
258  *			     on the bus
259  */
260 enum i3c_bus_mode {
261 	I3C_BUS_MODE_PURE,
262 	I3C_BUS_MODE_MIXED_FAST,
263 	I3C_BUS_MODE_MIXED_LIMITED,
264 	I3C_BUS_MODE_MIXED_SLOW,
265 };
266 
267 /**
268  * enum i3c_addr_slot_status - I3C address slot status
269  * @I3C_ADDR_SLOT_FREE: address is free
270  * @I3C_ADDR_SLOT_RSVD: address is reserved
271  * @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device
272  * @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device
273  * @I3C_ADDR_SLOT_STATUS_MASK: address slot mask
274  *
275  * On an I3C bus, addresses are assigned dynamically, and we need to know which
276  * addresses are free to use and which ones are already assigned.
277  *
278  * Addresses marked as reserved are those reserved by the I3C protocol
279  * (broadcast address, ...).
280  */
281 enum i3c_addr_slot_status {
282 	I3C_ADDR_SLOT_FREE,
283 	I3C_ADDR_SLOT_RSVD,
284 	I3C_ADDR_SLOT_I2C_DEV,
285 	I3C_ADDR_SLOT_I3C_DEV,
286 	I3C_ADDR_SLOT_STATUS_MASK = 3,
287 };
288 
289 /**
290  * struct i3c_bus - I3C bus object
291  * @cur_master: I3C master currently driving the bus. Since I3C is multi-master
292  *		this can change over the time. Will be used to let a master
293  *		know whether it needs to request bus ownership before sending
294  *		a frame or not
295  * @id: bus ID. Assigned by the framework when register the bus
296  * @addrslots: a bitmap with 2-bits per-slot to encode the address status and
297  *	       ease the DAA (Dynamic Address Assignment) procedure (see
298  *	       &enum i3c_addr_slot_status)
299  * @mode: bus mode (see &enum i3c_bus_mode)
300  * @scl_rate.i3c: maximum rate for the clock signal when doing I3C SDR/priv
301  *		  transfers
302  * @scl_rate.i2c: maximum rate for the clock signal when doing I2C transfers
303  * @scl_rate: SCL signal rate for I3C and I2C mode
304  * @devs.i3c: contains a list of I3C device descriptors representing I3C
305  *	      devices connected on the bus and successfully attached to the
306  *	      I3C master
307  * @devs.i2c: contains a list of I2C device descriptors representing I2C
308  *	      devices connected on the bus and successfully attached to the
309  *	      I3C master
310  * @devs: 2 lists containing all I3C/I2C devices connected to the bus
311  * @lock: read/write lock on the bus. This is needed to protect against
312  *	  operations that have an impact on the whole bus and the devices
313  *	  connected to it. For example, when asking slaves to drop their
314  *	  dynamic address (RSTDAA CCC), we need to make sure no one is trying
315  *	  to send I3C frames to these devices.
316  *	  Note that this lock does not protect against concurrency between
317  *	  devices: several drivers can send different I3C/I2C frames through
318  *	  the same master in parallel. This is the responsibility of the
319  *	  master to guarantee that frames are actually sent sequentially and
320  *	  not interlaced
321  *
322  * The I3C bus is represented with its own object and not implicitly described
323  * by the I3C master to cope with the multi-master functionality, where one bus
324  * can be shared amongst several masters, each of them requesting bus ownership
325  * when they need to.
326  */
327 struct i3c_bus {
328 	struct i3c_dev_desc *cur_master;
329 	int id;
330 	unsigned long addrslots[((I2C_MAX_ADDR + 1) * 2) / BITS_PER_LONG];
331 	enum i3c_bus_mode mode;
332 	struct {
333 		unsigned long i3c;
334 		unsigned long i2c;
335 	} scl_rate;
336 	struct {
337 		struct list_head i3c;
338 		struct list_head i2c;
339 	} devs;
340 	struct rw_semaphore lock;
341 };
342 
343 /**
344  * struct i3c_master_controller_ops - I3C master methods
345  * @bus_init: hook responsible for the I3C bus initialization. You should at
346  *	      least call master_set_info() from there and set the bus mode.
347  *	      You can also put controller specific initialization in there.
348  *	      This method is mandatory.
349  * @bus_cleanup: cleanup everything done in
350  *		 &i3c_master_controller_ops->bus_init().
351  *		 This method is optional.
352  * @attach_i3c_dev: called every time an I3C device is attached to the bus. It
353  *		    can be after a DAA or when a device is statically declared
354  *		    by the FW, in which case it will only have a static address
355  *		    and the dynamic address will be 0.
356  *		    When this function is called, device information have not
357  *		    been retrieved yet.
358  *		    This is a good place to attach master controller specific
359  *		    data to I3C devices.
360  *		    This method is optional.
361  * @reattach_i3c_dev: called every time an I3C device has its addressed
362  *		      changed. It can be because the device has been powered
363  *		      down and has lost its address, or it can happen when a
364  *		      device had a static address and has been assigned a
365  *		      dynamic address with SETDASA.
366  *		      This method is optional.
367  * @detach_i3c_dev: called when an I3C device is detached from the bus. Usually
368  *		    happens when the master device is unregistered.
369  *		    This method is optional.
370  * @do_daa: do a DAA (Dynamic Address Assignment) procedure. This is procedure
371  *	    should send an ENTDAA CCC command and then add all devices
372  *	    discovered sure the DAA using i3c_master_add_i3c_dev_locked().
373  *	    Add devices added with i3c_master_add_i3c_dev_locked() will then be
374  *	    attached or re-attached to the controller.
375  *	    This method is mandatory.
376  * @supports_ccc_cmd: should return true if the CCC command is supported, false
377  *		      otherwise.
378  *		      This method is optional, if not provided the core assumes
379  *		      all CCC commands are supported.
380  * @send_ccc_cmd: send a CCC command
381  *		  This method is mandatory.
382  * @priv_xfers: do one or several private I3C SDR transfers
383  *		This method is mandatory.
384  * @attach_i2c_dev: called every time an I2C device is attached to the bus.
385  *		    This is a good place to attach master controller specific
386  *		    data to I2C devices.
387  *		    This method is optional.
388  * @detach_i2c_dev: called when an I2C device is detached from the bus. Usually
389  *		    happens when the master device is unregistered.
390  *		    This method is optional.
391  * @i2c_xfers: do one or several I2C transfers. Note that, unlike i3c
392  *	       transfers, the core does not guarantee that buffers attached to
393  *	       the transfers are DMA-safe. If drivers want to have DMA-safe
394  *	       buffers, they should use the i2c_get_dma_safe_msg_buf()
395  *	       and i2c_put_dma_safe_msg_buf() helpers provided by the I2C
396  *	       framework.
397  *	       This method is mandatory.
398  * @request_ibi: attach an IBI handler to an I3C device. This implies defining
399  *		 an IBI handler and the constraints of the IBI (maximum payload
400  *		 length and number of pre-allocated slots).
401  *		 Some controllers support less IBI-capable devices than regular
402  *		 devices, so this method might return -%EBUSY if there's no
403  *		 more space for an extra IBI registration
404  *		 This method is optional.
405  * @free_ibi: free an IBI previously requested with ->request_ibi(). The IBI
406  *	      should have been disabled with ->disable_irq() prior to that
407  *	      This method is mandatory only if ->request_ibi is not NULL.
408  * @enable_ibi: enable the IBI. Only valid if ->request_ibi() has been called
409  *		prior to ->enable_ibi(). The controller should first enable
410  *		the IBI on the controller end (for example, unmask the hardware
411  *		IRQ) and then send the ENEC CCC command (with the IBI flag set)
412  *		to the I3C device.
413  *		This method is mandatory only if ->request_ibi is not NULL.
414  * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI
415  *		 flag set and then deactivate the hardware IRQ on the
416  *		 controller end.
417  *		 This method is mandatory only if ->request_ibi is not NULL.
418  * @recycle_ibi_slot: recycle an IBI slot. Called every time an IBI has been
419  *		      processed by its handler. The IBI slot should be put back
420  *		      in the IBI slot pool so that the controller can re-use it
421  *		      for a future IBI
422  *		      This method is mandatory only if ->request_ibi is not
423  *		      NULL.
424  */
425 struct i3c_master_controller_ops {
426 	int (*bus_init)(struct i3c_master_controller *master);
427 	void (*bus_cleanup)(struct i3c_master_controller *master);
428 	int (*attach_i3c_dev)(struct i3c_dev_desc *dev);
429 	int (*reattach_i3c_dev)(struct i3c_dev_desc *dev, u8 old_dyn_addr);
430 	void (*detach_i3c_dev)(struct i3c_dev_desc *dev);
431 	int (*do_daa)(struct i3c_master_controller *master);
432 	bool (*supports_ccc_cmd)(struct i3c_master_controller *master,
433 				 const struct i3c_ccc_cmd *cmd);
434 	int (*send_ccc_cmd)(struct i3c_master_controller *master,
435 			    struct i3c_ccc_cmd *cmd);
436 	int (*priv_xfers)(struct i3c_dev_desc *dev,
437 			  struct i3c_priv_xfer *xfers,
438 			  int nxfers);
439 	int (*attach_i2c_dev)(struct i2c_dev_desc *dev);
440 	void (*detach_i2c_dev)(struct i2c_dev_desc *dev);
441 	int (*i2c_xfers)(struct i2c_dev_desc *dev,
442 			 const struct i2c_msg *xfers, int nxfers);
443 	int (*request_ibi)(struct i3c_dev_desc *dev,
444 			   const struct i3c_ibi_setup *req);
445 	void (*free_ibi)(struct i3c_dev_desc *dev);
446 	int (*enable_ibi)(struct i3c_dev_desc *dev);
447 	int (*disable_ibi)(struct i3c_dev_desc *dev);
448 	void (*recycle_ibi_slot)(struct i3c_dev_desc *dev,
449 				 struct i3c_ibi_slot *slot);
450 };
451 
452 /**
453  * struct i3c_master_controller - I3C master controller object
454  * @dev: device to be registered to the device-model
455  * @this: an I3C device object representing this master. This device will be
456  *	  added to the list of I3C devs available on the bus
457  * @i2c: I2C adapter used for backward compatibility. This adapter is
458  *	 registered to the I2C subsystem to be as transparent as possible to
459  *	 existing I2C drivers
460  * @ops: master operations. See &struct i3c_master_controller_ops
461  * @secondary: true if the master is a secondary master
462  * @init_done: true when the bus initialization is done
463  * @boardinfo.i3c: list of I3C  boardinfo objects
464  * @boardinfo.i2c: list of I2C boardinfo objects
465  * @boardinfo: board-level information attached to devices connected on the bus
466  * @bus: I3C bus exposed by this master
467  * @wq: workqueue used to execute IBI handlers. Can also be used by master
468  *	drivers if they need to postpone operations that need to take place
469  *	in a thread context. Typical examples are Hot Join processing which
470  *	requires taking the bus lock in maintenance, which in turn, can only
471  *	be done from a sleep-able context
472  *
473  * A &struct i3c_master_controller has to be registered to the I3C subsystem
474  * through i3c_master_register(). None of &struct i3c_master_controller fields
475  * should be set manually, just pass appropriate values to
476  * i3c_master_register().
477  */
478 struct i3c_master_controller {
479 	struct device dev;
480 	struct i3c_dev_desc *this;
481 	struct i2c_adapter i2c;
482 	const struct i3c_master_controller_ops *ops;
483 	unsigned int secondary : 1;
484 	unsigned int init_done : 1;
485 	struct {
486 		struct list_head i3c;
487 		struct list_head i2c;
488 	} boardinfo;
489 	struct i3c_bus bus;
490 	struct workqueue_struct *wq;
491 };
492 
493 /**
494  * i3c_bus_for_each_i2cdev() - iterate over all I2C devices present on the bus
495  * @bus: the I3C bus
496  * @dev: an I2C device descriptor pointer updated to point to the current slot
497  *	 at each iteration of the loop
498  *
499  * Iterate over all I2C devs present on the bus.
500  */
501 #define i3c_bus_for_each_i2cdev(bus, dev)				\
502 	list_for_each_entry(dev, &(bus)->devs.i2c, common.node)
503 
504 /**
505  * i3c_bus_for_each_i3cdev() - iterate over all I3C devices present on the bus
506  * @bus: the I3C bus
507  * @dev: and I3C device descriptor pointer updated to point to the current slot
508  *	 at each iteration of the loop
509  *
510  * Iterate over all I3C devs present on the bus.
511  */
512 #define i3c_bus_for_each_i3cdev(bus, dev)				\
513 	list_for_each_entry(dev, &(bus)->devs.i3c, common.node)
514 
515 int i3c_master_do_i2c_xfers(struct i3c_master_controller *master,
516 			    const struct i2c_msg *xfers,
517 			    int nxfers);
518 
519 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
520 			    u8 evts);
521 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
522 			   u8 evts);
523 int i3c_master_entdaa_locked(struct i3c_master_controller *master);
524 int i3c_master_defslvs_locked(struct i3c_master_controller *master);
525 
526 int i3c_master_get_free_addr(struct i3c_master_controller *master,
527 			     u8 start_addr);
528 
529 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
530 				  u8 addr);
531 int i3c_master_do_daa(struct i3c_master_controller *master);
532 
533 int i3c_master_set_info(struct i3c_master_controller *master,
534 			const struct i3c_device_info *info);
535 
536 int i3c_master_register(struct i3c_master_controller *master,
537 			struct device *parent,
538 			const struct i3c_master_controller_ops *ops,
539 			bool secondary);
540 int i3c_master_unregister(struct i3c_master_controller *master);
541 
542 /**
543  * i3c_dev_get_master_data() - get master private data attached to an I3C
544  *			       device descriptor
545  * @dev: the I3C device descriptor to get private data from
546  *
547  * Return: the private data previously attached with i3c_dev_set_master_data()
548  *	   or NULL if no data has been attached to the device.
549  */
550 static inline void *i3c_dev_get_master_data(const struct i3c_dev_desc *dev)
551 {
552 	return dev->common.master_priv;
553 }
554 
555 /**
556  * i3c_dev_set_master_data() - attach master private data to an I3C device
557  *			       descriptor
558  * @dev: the I3C device descriptor to attach private data to
559  * @data: private data
560  *
561  * This functions allows a master controller to attach per-device private data
562  * which can then be retrieved with i3c_dev_get_master_data().
563  */
564 static inline void i3c_dev_set_master_data(struct i3c_dev_desc *dev,
565 					   void *data)
566 {
567 	dev->common.master_priv = data;
568 }
569 
570 /**
571  * i2c_dev_get_master_data() - get master private data attached to an I2C
572  *			       device descriptor
573  * @dev: the I2C device descriptor to get private data from
574  *
575  * Return: the private data previously attached with i2c_dev_set_master_data()
576  *	   or NULL if no data has been attached to the device.
577  */
578 static inline void *i2c_dev_get_master_data(const struct i2c_dev_desc *dev)
579 {
580 	return dev->common.master_priv;
581 }
582 
583 /**
584  * i2c_dev_set_master_data() - attach master private data to an I2C device
585  *			       descriptor
586  * @dev: the I2C device descriptor to attach private data to
587  * @data: private data
588  *
589  * This functions allows a master controller to attach per-device private data
590  * which can then be retrieved with i2c_device_get_master_data().
591  */
592 static inline void i2c_dev_set_master_data(struct i2c_dev_desc *dev,
593 					   void *data)
594 {
595 	dev->common.master_priv = data;
596 }
597 
598 /**
599  * i3c_dev_get_master() - get master used to communicate with a device
600  * @dev: I3C dev
601  *
602  * Return: the master controller driving @dev
603  */
604 static inline struct i3c_master_controller *
605 i3c_dev_get_master(struct i3c_dev_desc *dev)
606 {
607 	return dev->common.master;
608 }
609 
610 /**
611  * i2c_dev_get_master() - get master used to communicate with a device
612  * @dev: I2C dev
613  *
614  * Return: the master controller driving @dev
615  */
616 static inline struct i3c_master_controller *
617 i2c_dev_get_master(struct i2c_dev_desc *dev)
618 {
619 	return dev->common.master;
620 }
621 
622 /**
623  * i3c_master_get_bus() - get the bus attached to a master
624  * @master: master object
625  *
626  * Return: the I3C bus @master is connected to
627  */
628 static inline struct i3c_bus *
629 i3c_master_get_bus(struct i3c_master_controller *master)
630 {
631 	return &master->bus;
632 }
633 
634 struct i3c_generic_ibi_pool;
635 
636 struct i3c_generic_ibi_pool *
637 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
638 			   const struct i3c_ibi_setup *req);
639 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool);
640 
641 struct i3c_ibi_slot *
642 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool);
643 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
644 				  struct i3c_ibi_slot *slot);
645 
646 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot);
647 
648 struct i3c_ibi_slot *i3c_master_get_free_ibi_slot(struct i3c_dev_desc *dev);
649 
650 #endif /* I3C_MASTER_H */
651