1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <[email protected]> 6 */ 7 8 #ifndef I3C_MASTER_H 9 #define I3C_MASTER_H 10 11 #include <asm/bitsperlong.h> 12 13 #include <linux/bitops.h> 14 #include <linux/i2c.h> 15 #include <linux/i3c/ccc.h> 16 #include <linux/i3c/device.h> 17 #include <linux/rwsem.h> 18 #include <linux/spinlock.h> 19 #include <linux/workqueue.h> 20 21 #define I3C_HOT_JOIN_ADDR 0x2 22 #define I3C_BROADCAST_ADDR 0x7e 23 #define I3C_MAX_ADDR GENMASK(6, 0) 24 25 struct i2c_client; 26 27 /* notifier actions. notifier call data is the struct i3c_bus */ 28 enum { 29 I3C_NOTIFY_BUS_ADD, 30 I3C_NOTIFY_BUS_REMOVE, 31 }; 32 33 struct i3c_master_controller; 34 struct i3c_bus; 35 struct i3c_device; 36 extern const struct bus_type i3c_bus_type; 37 38 /** 39 * struct i3c_i2c_dev_desc - Common part of the I3C/I2C device descriptor 40 * @node: node element used to insert the slot into the I2C or I3C device 41 * list 42 * @master: I3C master that instantiated this device. Will be used to do 43 * I2C/I3C transfers 44 * @master_priv: master private data assigned to the device. Can be used to 45 * add master specific information 46 * 47 * This structure is describing common I3C/I2C dev information. 48 */ 49 struct i3c_i2c_dev_desc { 50 struct list_head node; 51 struct i3c_master_controller *master; 52 void *master_priv; 53 }; 54 55 #define I3C_LVR_I2C_INDEX_MASK GENMASK(7, 5) 56 #define I3C_LVR_I2C_INDEX(x) ((x) << 5) 57 #define I3C_LVR_I2C_FM_MODE BIT(4) 58 59 #define I2C_MAX_ADDR GENMASK(6, 0) 60 61 /** 62 * struct i2c_dev_boardinfo - I2C device board information 63 * @node: used to insert the boardinfo object in the I2C boardinfo list 64 * @base: regular I2C board information 65 * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about 66 * the I2C device limitations 67 * 68 * This structure is used to attach board-level information to an I2C device. 69 * Each I2C device connected on the I3C bus should have one. 70 */ 71 struct i2c_dev_boardinfo { 72 struct list_head node; 73 struct i2c_board_info base; 74 u8 lvr; 75 }; 76 77 /** 78 * struct i2c_dev_desc - I2C device descriptor 79 * @common: common part of the I2C device descriptor 80 * @dev: I2C device object registered to the I2C framework 81 * @addr: I2C device address 82 * @lvr: LVR (Legacy Virtual Register) needed by the I3C core to know about 83 * the I2C device limitations 84 * 85 * Each I2C device connected on the bus will have an i2c_dev_desc. 86 * This object is created by the core and later attached to the controller 87 * using &struct_i3c_master_controller->ops->attach_i2c_dev(). 88 * 89 * &struct_i2c_dev_desc is the internal representation of an I2C device 90 * connected on an I3C bus. This object is also passed to all 91 * &struct_i3c_master_controller_ops hooks. 92 */ 93 struct i2c_dev_desc { 94 struct i3c_i2c_dev_desc common; 95 struct i2c_client *dev; 96 u16 addr; 97 u8 lvr; 98 }; 99 100 /** 101 * struct i3c_ibi_slot - I3C IBI (In-Band Interrupt) slot 102 * @work: work associated to this slot. The IBI handler will be called from 103 * there 104 * @dev: the I3C device that has generated this IBI 105 * @len: length of the payload associated to this IBI 106 * @data: payload buffer 107 * 108 * An IBI slot is an object pre-allocated by the controller and used when an 109 * IBI comes in. 110 * Every time an IBI comes in, the I3C master driver should find a free IBI 111 * slot in its IBI slot pool, retrieve the IBI payload and queue the IBI using 112 * i3c_master_queue_ibi(). 113 * 114 * How IBI slots are allocated is left to the I3C master driver, though, for 115 * simple kmalloc-based allocation, the generic IBI slot pool can be used. 116 */ 117 struct i3c_ibi_slot { 118 struct work_struct work; 119 struct i3c_dev_desc *dev; 120 unsigned int len; 121 void *data; 122 }; 123 124 /** 125 * struct i3c_device_ibi_info - IBI information attached to a specific device 126 * @all_ibis_handled: used to be informed when no more IBIs are waiting to be 127 * processed. Used by i3c_device_disable_ibi() to wait for 128 * all IBIs to be dequeued 129 * @pending_ibis: count the number of pending IBIs. Each pending IBI has its 130 * work element queued to the controller workqueue 131 * @max_payload_len: maximum payload length for an IBI coming from this device. 132 * this value is specified when calling 133 * i3c_device_request_ibi() and should not change at run 134 * time. All messages IBIs exceeding this limit should be 135 * rejected by the master 136 * @num_slots: number of IBI slots reserved for this device 137 * @enabled: reflect the IBI status 138 * @wq: workqueue used to execute IBI handlers. 139 * @handler: IBI handler specified at i3c_device_request_ibi() call time. This 140 * handler will be called from the controller workqueue, and as such 141 * is allowed to sleep (though it is recommended to process the IBI 142 * as fast as possible to not stall processing of other IBIs queued 143 * on the same workqueue). 144 * New I3C messages can be sent from the IBI handler 145 * 146 * The &struct_i3c_device_ibi_info object is allocated when 147 * i3c_device_request_ibi() is called and attached to a specific device. This 148 * object is here to manage IBIs coming from a specific I3C device. 149 * 150 * Note that this structure is the generic view of the IBI management 151 * infrastructure. I3C master drivers may have their own internal 152 * representation which they can associate to the device using 153 * controller-private data. 154 */ 155 struct i3c_device_ibi_info { 156 struct completion all_ibis_handled; 157 atomic_t pending_ibis; 158 unsigned int max_payload_len; 159 unsigned int num_slots; 160 unsigned int enabled; 161 struct workqueue_struct *wq; 162 void (*handler)(struct i3c_device *dev, 163 const struct i3c_ibi_payload *payload); 164 }; 165 166 /** 167 * struct i3c_dev_boardinfo - I3C device board information 168 * @node: used to insert the boardinfo object in the I3C boardinfo list 169 * @init_dyn_addr: initial dynamic address requested by the FW. We provide no 170 * guarantee that the device will end up using this address, 171 * but try our best to assign this specific address to the 172 * device 173 * @static_addr: static address the I3C device listen on before it's been 174 * assigned a dynamic address by the master. Will be used during 175 * bus initialization to assign it a specific dynamic address 176 * before starting DAA (Dynamic Address Assignment) 177 * @pid: I3C Provisioned ID exposed by the device. This is a unique identifier 178 * that may be used to attach boardinfo to i3c_dev_desc when the device 179 * does not have a static address 180 * @of_node: optional DT node in case the device has been described in the DT 181 * 182 * This structure is used to attach board-level information to an I3C device. 183 * Not all I3C devices connected on the bus will have a boardinfo. It's only 184 * needed if you want to attach extra resources to a device or assign it a 185 * specific dynamic address. 186 */ 187 struct i3c_dev_boardinfo { 188 struct list_head node; 189 u8 init_dyn_addr; 190 u8 static_addr; 191 u64 pid; 192 struct device_node *of_node; 193 }; 194 195 /** 196 * struct i3c_dev_desc - I3C device descriptor 197 * @common: common part of the I3C device descriptor 198 * @info: I3C device information. Will be automatically filled when you create 199 * your device with i3c_master_add_i3c_dev_locked() 200 * @ibi_lock: lock used to protect the &struct_i3c_device->ibi 201 * @ibi: IBI info attached to a device. Should be NULL until 202 * i3c_device_request_ibi() is called 203 * @dev: pointer to the I3C device object exposed to I3C device drivers. This 204 * should never be accessed from I3C master controller drivers. Only core 205 * code should manipulate it in when updating the dev <-> desc link or 206 * when propagating IBI events to the driver 207 * @boardinfo: pointer to the boardinfo attached to this I3C device 208 * 209 * Internal representation of an I3C device. This object is only used by the 210 * core and passed to I3C master controller drivers when they're requested to 211 * do some operations on the device. 212 * The core maintains the link between the internal I3C dev descriptor and the 213 * object exposed to the I3C device drivers (&struct_i3c_device). 214 */ 215 struct i3c_dev_desc { 216 struct i3c_i2c_dev_desc common; 217 struct i3c_device_info info; 218 struct mutex ibi_lock; 219 struct i3c_device_ibi_info *ibi; 220 struct i3c_device *dev; 221 const struct i3c_dev_boardinfo *boardinfo; 222 }; 223 224 /** 225 * struct i3c_device - I3C device object 226 * @dev: device object to register the I3C dev to the device model 227 * @desc: pointer to an i3c device descriptor object. This link is updated 228 * every time the I3C device is rediscovered with a different dynamic 229 * address assigned 230 * @bus: I3C bus this device is attached to 231 * 232 * I3C device object exposed to I3C device drivers. The takes care of linking 233 * this object to the relevant &struct_i3c_dev_desc one. 234 * All I3C devs on the I3C bus are represented, including I3C masters. For each 235 * of them, we have an instance of &struct i3c_device. 236 */ 237 struct i3c_device { 238 struct device dev; 239 struct i3c_dev_desc *desc; 240 struct i3c_bus *bus; 241 }; 242 243 /* 244 * The I3C specification says the maximum number of devices connected on the 245 * bus is 11, but this number depends on external parameters like trace length, 246 * capacitive load per Device, and the types of Devices present on the Bus. 247 * I3C master can also have limitations, so this number is just here as a 248 * reference and should be adjusted on a per-controller/per-board basis. 249 */ 250 #define I3C_BUS_MAX_DEVS 11 251 252 #define I3C_BUS_MAX_I3C_SCL_RATE 12900000 253 #define I3C_BUS_TYP_I3C_SCL_RATE 12500000 254 #define I3C_BUS_I2C_FM_PLUS_SCL_RATE 1000000 255 #define I3C_BUS_I2C_FM_SCL_RATE 400000 256 #define I3C_BUS_TLOW_OD_MIN_NS 200 257 258 /** 259 * enum i3c_bus_mode - I3C bus mode 260 * @I3C_BUS_MODE_PURE: only I3C devices are connected to the bus. No limitation 261 * expected 262 * @I3C_BUS_MODE_MIXED_FAST: I2C devices with 50ns spike filter are present on 263 * the bus. The only impact in this mode is that the 264 * high SCL pulse has to stay below 50ns to trick I2C 265 * devices when transmitting I3C frames 266 * @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are 267 * present on the bus. However they allow 268 * compliance up to the maximum SDR SCL clock 269 * frequency. 270 * @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present 271 * on the bus 272 */ 273 enum i3c_bus_mode { 274 I3C_BUS_MODE_PURE, 275 I3C_BUS_MODE_MIXED_FAST, 276 I3C_BUS_MODE_MIXED_LIMITED, 277 I3C_BUS_MODE_MIXED_SLOW, 278 }; 279 280 /** 281 * enum i3c_open_drain_speed - I3C open-drain speed 282 * @I3C_OPEN_DRAIN_SLOW_SPEED: Slow open-drain speed for sending the first 283 * broadcast address. The first broadcast address at this speed 284 * will be visible to all devices on the I3C bus. I3C devices 285 * working in I2C mode will turn off their spike filter when 286 * switching into I3C mode. 287 * @I3C_OPEN_DRAIN_NORMAL_SPEED: Normal open-drain speed in I3C bus mode. 288 */ 289 enum i3c_open_drain_speed { 290 I3C_OPEN_DRAIN_SLOW_SPEED, 291 I3C_OPEN_DRAIN_NORMAL_SPEED, 292 }; 293 294 /** 295 * enum i3c_addr_slot_status - I3C address slot status 296 * @I3C_ADDR_SLOT_FREE: address is free 297 * @I3C_ADDR_SLOT_RSVD: address is reserved 298 * @I3C_ADDR_SLOT_I2C_DEV: address is assigned to an I2C device 299 * @I3C_ADDR_SLOT_I3C_DEV: address is assigned to an I3C device 300 * @I3C_ADDR_SLOT_STATUS_MASK: address slot mask 301 * @I3C_ADDR_SLOT_EXT_DESIRED: the bitmask represents addresses that are preferred by some devices, 302 * such as the "assigned-address" property in a device tree source. 303 * On an I3C bus, addresses are assigned dynamically, and we need to know which 304 * addresses are free to use and which ones are already assigned. 305 * 306 * Addresses marked as reserved are those reserved by the I3C protocol 307 * (broadcast address, ...). 308 */ 309 enum i3c_addr_slot_status { 310 I3C_ADDR_SLOT_FREE, 311 I3C_ADDR_SLOT_RSVD, 312 I3C_ADDR_SLOT_I2C_DEV, 313 I3C_ADDR_SLOT_I3C_DEV, 314 I3C_ADDR_SLOT_STATUS_MASK = 3, 315 I3C_ADDR_SLOT_EXT_STATUS_MASK = 7, 316 I3C_ADDR_SLOT_EXT_DESIRED = BIT(2), 317 }; 318 319 #define I3C_ADDR_SLOT_STATUS_BITS 4 320 321 /** 322 * struct i3c_bus - I3C bus object 323 * @cur_master: I3C master currently driving the bus. Since I3C is multi-master 324 * this can change over the time. Will be used to let a master 325 * know whether it needs to request bus ownership before sending 326 * a frame or not 327 * @id: bus ID. Assigned by the framework when register the bus 328 * @addrslots: a bitmap with 2-bits per-slot to encode the address status and 329 * ease the DAA (Dynamic Address Assignment) procedure (see 330 * &enum i3c_addr_slot_status) 331 * @mode: bus mode (see &enum i3c_bus_mode) 332 * @scl_rate.i3c: maximum rate for the clock signal when doing I3C SDR/priv 333 * transfers 334 * @scl_rate.i2c: maximum rate for the clock signal when doing I2C transfers 335 * @scl_rate: SCL signal rate for I3C and I2C mode 336 * @devs.i3c: contains a list of I3C device descriptors representing I3C 337 * devices connected on the bus and successfully attached to the 338 * I3C master 339 * @devs.i2c: contains a list of I2C device descriptors representing I2C 340 * devices connected on the bus and successfully attached to the 341 * I3C master 342 * @devs: 2 lists containing all I3C/I2C devices connected to the bus 343 * @lock: read/write lock on the bus. This is needed to protect against 344 * operations that have an impact on the whole bus and the devices 345 * connected to it. For example, when asking slaves to drop their 346 * dynamic address (RSTDAA CCC), we need to make sure no one is trying 347 * to send I3C frames to these devices. 348 * Note that this lock does not protect against concurrency between 349 * devices: several drivers can send different I3C/I2C frames through 350 * the same master in parallel. This is the responsibility of the 351 * master to guarantee that frames are actually sent sequentially and 352 * not interlaced 353 * 354 * The I3C bus is represented with its own object and not implicitly described 355 * by the I3C master to cope with the multi-master functionality, where one bus 356 * can be shared amongst several masters, each of them requesting bus ownership 357 * when they need to. 358 */ 359 struct i3c_bus { 360 struct i3c_dev_desc *cur_master; 361 int id; 362 unsigned long addrslots[((I2C_MAX_ADDR + 1) * I3C_ADDR_SLOT_STATUS_BITS) / BITS_PER_LONG]; 363 enum i3c_bus_mode mode; 364 struct { 365 unsigned long i3c; 366 unsigned long i2c; 367 } scl_rate; 368 struct { 369 struct list_head i3c; 370 struct list_head i2c; 371 } devs; 372 struct rw_semaphore lock; 373 }; 374 375 /** 376 * struct i3c_master_controller_ops - I3C master methods 377 * @bus_init: hook responsible for the I3C bus initialization. You should at 378 * least call master_set_info() from there and set the bus mode. 379 * You can also put controller specific initialization in there. 380 * This method is mandatory. 381 * @bus_cleanup: cleanup everything done in 382 * &i3c_master_controller_ops->bus_init(). 383 * This method is optional. 384 * @attach_i3c_dev: called every time an I3C device is attached to the bus. It 385 * can be after a DAA or when a device is statically declared 386 * by the FW, in which case it will only have a static address 387 * and the dynamic address will be 0. 388 * When this function is called, device information have not 389 * been retrieved yet. 390 * This is a good place to attach master controller specific 391 * data to I3C devices. 392 * This method is optional. 393 * @reattach_i3c_dev: called every time an I3C device has its addressed 394 * changed. It can be because the device has been powered 395 * down and has lost its address, or it can happen when a 396 * device had a static address and has been assigned a 397 * dynamic address with SETDASA. 398 * This method is optional. 399 * @detach_i3c_dev: called when an I3C device is detached from the bus. Usually 400 * happens when the master device is unregistered. 401 * This method is optional. 402 * @do_daa: do a DAA (Dynamic Address Assignment) procedure. This is procedure 403 * should send an ENTDAA CCC command and then add all devices 404 * discovered sure the DAA using i3c_master_add_i3c_dev_locked(). 405 * Add devices added with i3c_master_add_i3c_dev_locked() will then be 406 * attached or re-attached to the controller. 407 * This method is mandatory. 408 * @supports_ccc_cmd: should return true if the CCC command is supported, false 409 * otherwise. 410 * This method is optional, if not provided the core assumes 411 * all CCC commands are supported. 412 * @send_ccc_cmd: send a CCC command 413 * This method is mandatory. 414 * @priv_xfers: do one or several private I3C SDR transfers 415 * This method is mandatory. 416 * @attach_i2c_dev: called every time an I2C device is attached to the bus. 417 * This is a good place to attach master controller specific 418 * data to I2C devices. 419 * This method is optional. 420 * @detach_i2c_dev: called when an I2C device is detached from the bus. Usually 421 * happens when the master device is unregistered. 422 * This method is optional. 423 * @i2c_xfers: do one or several I2C transfers. Note that, unlike i3c 424 * transfers, the core does not guarantee that buffers attached to 425 * the transfers are DMA-safe. If drivers want to have DMA-safe 426 * buffers, they should use the i2c_get_dma_safe_msg_buf() 427 * and i2c_put_dma_safe_msg_buf() helpers provided by the I2C 428 * framework. 429 * This method is mandatory. 430 * @request_ibi: attach an IBI handler to an I3C device. This implies defining 431 * an IBI handler and the constraints of the IBI (maximum payload 432 * length and number of pre-allocated slots). 433 * Some controllers support less IBI-capable devices than regular 434 * devices, so this method might return -%EBUSY if there's no 435 * more space for an extra IBI registration 436 * This method is optional. 437 * @free_ibi: free an IBI previously requested with ->request_ibi(). The IBI 438 * should have been disabled with ->disable_irq() prior to that 439 * This method is mandatory only if ->request_ibi is not NULL. 440 * @enable_ibi: enable the IBI. Only valid if ->request_ibi() has been called 441 * prior to ->enable_ibi(). The controller should first enable 442 * the IBI on the controller end (for example, unmask the hardware 443 * IRQ) and then send the ENEC CCC command (with the IBI flag set) 444 * to the I3C device. 445 * This method is mandatory only if ->request_ibi is not NULL. 446 * @disable_ibi: disable an IBI. First send the DISEC CCC command with the IBI 447 * flag set and then deactivate the hardware IRQ on the 448 * controller end. 449 * This method is mandatory only if ->request_ibi is not NULL. 450 * @recycle_ibi_slot: recycle an IBI slot. Called every time an IBI has been 451 * processed by its handler. The IBI slot should be put back 452 * in the IBI slot pool so that the controller can re-use it 453 * for a future IBI 454 * This method is mandatory only if ->request_ibi is not 455 * NULL. 456 * @enable_hotjoin: enable hot join event detect. 457 * @disable_hotjoin: disable hot join event detect. 458 * @set_speed: adjust I3C open drain mode timing. 459 */ 460 struct i3c_master_controller_ops { 461 int (*bus_init)(struct i3c_master_controller *master); 462 void (*bus_cleanup)(struct i3c_master_controller *master); 463 int (*attach_i3c_dev)(struct i3c_dev_desc *dev); 464 int (*reattach_i3c_dev)(struct i3c_dev_desc *dev, u8 old_dyn_addr); 465 void (*detach_i3c_dev)(struct i3c_dev_desc *dev); 466 int (*do_daa)(struct i3c_master_controller *master); 467 bool (*supports_ccc_cmd)(struct i3c_master_controller *master, 468 const struct i3c_ccc_cmd *cmd); 469 int (*send_ccc_cmd)(struct i3c_master_controller *master, 470 struct i3c_ccc_cmd *cmd); 471 int (*priv_xfers)(struct i3c_dev_desc *dev, 472 struct i3c_priv_xfer *xfers, 473 int nxfers); 474 int (*attach_i2c_dev)(struct i2c_dev_desc *dev); 475 void (*detach_i2c_dev)(struct i2c_dev_desc *dev); 476 int (*i2c_xfers)(struct i2c_dev_desc *dev, 477 const struct i2c_msg *xfers, int nxfers); 478 int (*request_ibi)(struct i3c_dev_desc *dev, 479 const struct i3c_ibi_setup *req); 480 void (*free_ibi)(struct i3c_dev_desc *dev); 481 int (*enable_ibi)(struct i3c_dev_desc *dev); 482 int (*disable_ibi)(struct i3c_dev_desc *dev); 483 void (*recycle_ibi_slot)(struct i3c_dev_desc *dev, 484 struct i3c_ibi_slot *slot); 485 int (*enable_hotjoin)(struct i3c_master_controller *master); 486 int (*disable_hotjoin)(struct i3c_master_controller *master); 487 int (*set_speed)(struct i3c_master_controller *master, enum i3c_open_drain_speed speed); 488 }; 489 490 /** 491 * struct i3c_master_controller - I3C master controller object 492 * @dev: device to be registered to the device-model 493 * @this: an I3C device object representing this master. This device will be 494 * added to the list of I3C devs available on the bus 495 * @i2c: I2C adapter used for backward compatibility. This adapter is 496 * registered to the I2C subsystem to be as transparent as possible to 497 * existing I2C drivers 498 * @ops: master operations. See &struct i3c_master_controller_ops 499 * @secondary: true if the master is a secondary master 500 * @init_done: true when the bus initialization is done 501 * @hotjoin: true if the master support hotjoin 502 * @boardinfo.i3c: list of I3C boardinfo objects 503 * @boardinfo.i2c: list of I2C boardinfo objects 504 * @boardinfo: board-level information attached to devices connected on the bus 505 * @bus: I3C bus exposed by this master 506 * @wq: workqueue which can be used by master 507 * drivers if they need to postpone operations that need to take place 508 * in a thread context. Typical examples are Hot Join processing which 509 * requires taking the bus lock in maintenance, which in turn, can only 510 * be done from a sleep-able context 511 * 512 * A &struct i3c_master_controller has to be registered to the I3C subsystem 513 * through i3c_master_register(). None of &struct i3c_master_controller fields 514 * should be set manually, just pass appropriate values to 515 * i3c_master_register(). 516 */ 517 struct i3c_master_controller { 518 struct device dev; 519 struct i3c_dev_desc *this; 520 struct i2c_adapter i2c; 521 const struct i3c_master_controller_ops *ops; 522 unsigned int secondary : 1; 523 unsigned int init_done : 1; 524 unsigned int hotjoin: 1; 525 struct { 526 struct list_head i3c; 527 struct list_head i2c; 528 } boardinfo; 529 struct i3c_bus bus; 530 struct workqueue_struct *wq; 531 }; 532 533 /** 534 * i3c_bus_for_each_i2cdev() - iterate over all I2C devices present on the bus 535 * @bus: the I3C bus 536 * @dev: an I2C device descriptor pointer updated to point to the current slot 537 * at each iteration of the loop 538 * 539 * Iterate over all I2C devs present on the bus. 540 */ 541 #define i3c_bus_for_each_i2cdev(bus, dev) \ 542 list_for_each_entry(dev, &(bus)->devs.i2c, common.node) 543 544 /** 545 * i3c_bus_for_each_i3cdev() - iterate over all I3C devices present on the bus 546 * @bus: the I3C bus 547 * @dev: and I3C device descriptor pointer updated to point to the current slot 548 * at each iteration of the loop 549 * 550 * Iterate over all I3C devs present on the bus. 551 */ 552 #define i3c_bus_for_each_i3cdev(bus, dev) \ 553 list_for_each_entry(dev, &(bus)->devs.i3c, common.node) 554 555 int i3c_master_do_i2c_xfers(struct i3c_master_controller *master, 556 const struct i2c_msg *xfers, 557 int nxfers); 558 559 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 560 u8 evts); 561 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 562 u8 evts); 563 int i3c_master_entdaa_locked(struct i3c_master_controller *master); 564 int i3c_master_defslvs_locked(struct i3c_master_controller *master); 565 566 int i3c_master_get_free_addr(struct i3c_master_controller *master, 567 u8 start_addr); 568 569 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 570 u8 addr); 571 int i3c_master_do_daa(struct i3c_master_controller *master); 572 573 int i3c_master_set_info(struct i3c_master_controller *master, 574 const struct i3c_device_info *info); 575 576 int i3c_master_register(struct i3c_master_controller *master, 577 struct device *parent, 578 const struct i3c_master_controller_ops *ops, 579 bool secondary); 580 void i3c_master_unregister(struct i3c_master_controller *master); 581 int i3c_master_enable_hotjoin(struct i3c_master_controller *master); 582 int i3c_master_disable_hotjoin(struct i3c_master_controller *master); 583 584 /** 585 * i3c_dev_get_master_data() - get master private data attached to an I3C 586 * device descriptor 587 * @dev: the I3C device descriptor to get private data from 588 * 589 * Return: the private data previously attached with i3c_dev_set_master_data() 590 * or NULL if no data has been attached to the device. 591 */ 592 static inline void *i3c_dev_get_master_data(const struct i3c_dev_desc *dev) 593 { 594 return dev->common.master_priv; 595 } 596 597 /** 598 * i3c_dev_set_master_data() - attach master private data to an I3C device 599 * descriptor 600 * @dev: the I3C device descriptor to attach private data to 601 * @data: private data 602 * 603 * This functions allows a master controller to attach per-device private data 604 * which can then be retrieved with i3c_dev_get_master_data(). 605 */ 606 static inline void i3c_dev_set_master_data(struct i3c_dev_desc *dev, 607 void *data) 608 { 609 dev->common.master_priv = data; 610 } 611 612 /** 613 * i2c_dev_get_master_data() - get master private data attached to an I2C 614 * device descriptor 615 * @dev: the I2C device descriptor to get private data from 616 * 617 * Return: the private data previously attached with i2c_dev_set_master_data() 618 * or NULL if no data has been attached to the device. 619 */ 620 static inline void *i2c_dev_get_master_data(const struct i2c_dev_desc *dev) 621 { 622 return dev->common.master_priv; 623 } 624 625 /** 626 * i2c_dev_set_master_data() - attach master private data to an I2C device 627 * descriptor 628 * @dev: the I2C device descriptor to attach private data to 629 * @data: private data 630 * 631 * This functions allows a master controller to attach per-device private data 632 * which can then be retrieved with i2c_device_get_master_data(). 633 */ 634 static inline void i2c_dev_set_master_data(struct i2c_dev_desc *dev, 635 void *data) 636 { 637 dev->common.master_priv = data; 638 } 639 640 /** 641 * i3c_dev_get_master() - get master used to communicate with a device 642 * @dev: I3C dev 643 * 644 * Return: the master controller driving @dev 645 */ 646 static inline struct i3c_master_controller * 647 i3c_dev_get_master(struct i3c_dev_desc *dev) 648 { 649 return dev->common.master; 650 } 651 652 /** 653 * i2c_dev_get_master() - get master used to communicate with a device 654 * @dev: I2C dev 655 * 656 * Return: the master controller driving @dev 657 */ 658 static inline struct i3c_master_controller * 659 i2c_dev_get_master(struct i2c_dev_desc *dev) 660 { 661 return dev->common.master; 662 } 663 664 /** 665 * i3c_master_get_bus() - get the bus attached to a master 666 * @master: master object 667 * 668 * Return: the I3C bus @master is connected to 669 */ 670 static inline struct i3c_bus * 671 i3c_master_get_bus(struct i3c_master_controller *master) 672 { 673 return &master->bus; 674 } 675 676 struct i3c_generic_ibi_pool; 677 678 struct i3c_generic_ibi_pool * 679 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 680 const struct i3c_ibi_setup *req); 681 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool); 682 683 struct i3c_ibi_slot * 684 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool); 685 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 686 struct i3c_ibi_slot *slot); 687 688 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot); 689 690 struct i3c_ibi_slot *i3c_master_get_free_ibi_slot(struct i3c_dev_desc *dev); 691 692 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data), 693 void *data); 694 int i3c_register_notifier(struct notifier_block *nb); 695 int i3c_unregister_notifier(struct notifier_block *nb); 696 697 #endif /* I3C_MASTER_H */ 698