1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _LINUX_GPIO_REGMAP_H 4 #define _LINUX_GPIO_REGMAP_H 5 6 struct device; 7 struct fwnode_handle; 8 struct gpio_regmap; 9 struct irq_domain; 10 struct regmap; 11 12 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1)) 13 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) 14 15 /** 16 * struct gpio_regmap_config - Description of a generic regmap gpio_chip. 17 * @parent: The parent device 18 * @regmap: The regmap used to access the registers 19 * given, the name of the device is used 20 * @fwnode: (Optional) The firmware node. 21 * If not given, the fwnode of the parent is used. 22 * @label: (Optional) Descriptive name for GPIO controller. 23 * If not given, the name of the device is used. 24 * @ngpio: Number of GPIOs 25 * @names: (Optional) Array of names for gpios 26 * @reg_dat_base: (Optional) (in) register base address 27 * @reg_set_base: (Optional) set register base address 28 * @reg_clr_base: (Optional) clear register base address 29 * @reg_dir_in_base: (Optional) in setting register base address 30 * @reg_dir_out_base: (Optional) out setting register base address 31 * @reg_stride: (Optional) May be set if the registers (of the 32 * same type, dat, set, etc) are not consecutive. 33 * @ngpio_per_reg: Number of GPIOs per register 34 * @irq_domain: (Optional) IRQ domain if the controller is 35 * interrupt-capable 36 * @reg_mask_xlate: (Optional) Translates base address and GPIO 37 * offset to a register/bitmask pair. If not 38 * given the default gpio_regmap_simple_xlate() 39 * is used. 40 * 41 * The ->reg_mask_xlate translates a given base address and GPIO offset to 42 * register and mask pair. The base address is one of the given register 43 * base addresses in this structure. 44 * 45 * Although all register base addresses are marked as optional, there are 46 * several rules: 47 * 1. if you only have @reg_dat_base set, then it is input-only 48 * 2. if you only have @reg_set_base set, then it is output-only 49 * 3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then 50 * you have to set both @reg_dat_base and @reg_set_base 51 * 4. if you have @reg_set_base set, you may also set @reg_clr_base to have 52 * two different registers for setting and clearing the output. This is 53 * also valid for the output-only case. 54 * 5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really 55 * hardware which has redundant registers? 56 * 57 * Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO 58 * which forces the address to the value 0. 59 */ 60 struct gpio_regmap_config { 61 struct device *parent; 62 struct regmap *regmap; 63 struct fwnode_handle *fwnode; 64 65 const char *label; 66 int ngpio; 67 const char *const *names; 68 69 unsigned int reg_dat_base; 70 unsigned int reg_set_base; 71 unsigned int reg_clr_base; 72 unsigned int reg_dir_in_base; 73 unsigned int reg_dir_out_base; 74 int reg_stride; 75 int ngpio_per_reg; 76 struct irq_domain *irq_domain; 77 78 int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base, 79 unsigned int offset, unsigned int *reg, 80 unsigned int *mask); 81 }; 82 83 struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config); 84 void gpio_regmap_unregister(struct gpio_regmap *gpio); 85 struct gpio_regmap *devm_gpio_regmap_register(struct device *dev, 86 const struct gpio_regmap_config *config); 87 void gpio_regmap_set_drvdata(struct gpio_regmap *gpio, void *data); 88 void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio); 89 90 #endif /* _LINUX_GPIO_REGMAP_H */ 91