1ebe36319SMichael Walle /* SPDX-License-Identifier: GPL-2.0-only */ 2ebe36319SMichael Walle 3ebe36319SMichael Walle #ifndef _LINUX_GPIO_REGMAP_H 4ebe36319SMichael Walle #define _LINUX_GPIO_REGMAP_H 5ebe36319SMichael Walle 6ebe36319SMichael Walle struct device; 7d46bf9ecSÁlvaro Fernández Rojas struct fwnode_handle; 8ebe36319SMichael Walle struct gpio_regmap; 9ebe36319SMichael Walle struct irq_domain; 10ebe36319SMichael Walle struct regmap; 11ebe36319SMichael Walle 12a070bdbbSMichael Walle #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1)) 13ebe36319SMichael Walle #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) 14ebe36319SMichael Walle 15ebe36319SMichael Walle /** 16ebe36319SMichael Walle * struct gpio_regmap_config - Description of a generic regmap gpio_chip. 17ebe36319SMichael Walle * @parent: The parent device 18ebe36319SMichael Walle * @regmap: The regmap used to access the registers 19ebe36319SMichael Walle * given, the name of the device is used 20d46bf9ecSÁlvaro Fernández Rojas * @fwnode: (Optional) The firmware node. 21d46bf9ecSÁlvaro Fernández Rojas * If not given, the fwnode of the parent is used. 22ebe36319SMichael Walle * @label: (Optional) Descriptive name for GPIO controller. 23ebe36319SMichael Walle * If not given, the name of the device is used. 24*db305161SAndy Shevchenko * @ngpio: (Optional) Number of GPIOs 25ebe36319SMichael Walle * @names: (Optional) Array of names for gpios 26ebe36319SMichael Walle * @reg_dat_base: (Optional) (in) register base address 27ebe36319SMichael Walle * @reg_set_base: (Optional) set register base address 28ebe36319SMichael Walle * @reg_clr_base: (Optional) clear register base address 29ebe36319SMichael Walle * @reg_dir_in_base: (Optional) in setting register base address 30ebe36319SMichael Walle * @reg_dir_out_base: (Optional) out setting register base address 31ebe36319SMichael Walle * @reg_stride: (Optional) May be set if the registers (of the 32ebe36319SMichael Walle * same type, dat, set, etc) are not consecutive. 3397673ea3SAndy Shevchenko * @ngpio_per_reg: (Optional) Number of GPIOs per register 34ebe36319SMichael Walle * @irq_domain: (Optional) IRQ domain if the controller is 35ebe36319SMichael Walle * interrupt-capable 36ebe36319SMichael Walle * @reg_mask_xlate: (Optional) Translates base address and GPIO 37ebe36319SMichael Walle * offset to a register/bitmask pair. If not 38ebe36319SMichael Walle * given the default gpio_regmap_simple_xlate() 39ebe36319SMichael Walle * is used. 409b3c47f1SMichael Walle * @drvdata: (Optional) Pointer to driver specific data which is 419b3c47f1SMichael Walle * not used by gpio-remap but is provided "as is" to the 429b3c47f1SMichael Walle * driver callback(s). 43ebe36319SMichael Walle * 44ebe36319SMichael Walle * The ->reg_mask_xlate translates a given base address and GPIO offset to 45ebe36319SMichael Walle * register and mask pair. The base address is one of the given register 46ebe36319SMichael Walle * base addresses in this structure. 47ebe36319SMichael Walle * 48ebe36319SMichael Walle * Although all register base addresses are marked as optional, there are 49ebe36319SMichael Walle * several rules: 50ebe36319SMichael Walle * 1. if you only have @reg_dat_base set, then it is input-only 51ebe36319SMichael Walle * 2. if you only have @reg_set_base set, then it is output-only 52ebe36319SMichael Walle * 3. if you have either @reg_dir_in_base or @reg_dir_out_base set, then 53ebe36319SMichael Walle * you have to set both @reg_dat_base and @reg_set_base 54ebe36319SMichael Walle * 4. if you have @reg_set_base set, you may also set @reg_clr_base to have 55ebe36319SMichael Walle * two different registers for setting and clearing the output. This is 56ebe36319SMichael Walle * also valid for the output-only case. 57ebe36319SMichael Walle * 5. @reg_dir_in_base and @reg_dir_out_base are exclusive; is there really 58ebe36319SMichael Walle * hardware which has redundant registers? 59ebe36319SMichael Walle * 60ebe36319SMichael Walle * Note: All base addresses may have the special value %GPIO_REGMAP_ADDR_ZERO 61ebe36319SMichael Walle * which forces the address to the value 0. 62ebe36319SMichael Walle */ 63ebe36319SMichael Walle struct gpio_regmap_config { 64ebe36319SMichael Walle struct device *parent; 65ebe36319SMichael Walle struct regmap *regmap; 66d46bf9ecSÁlvaro Fernández Rojas struct fwnode_handle *fwnode; 67ebe36319SMichael Walle 68ebe36319SMichael Walle const char *label; 69ebe36319SMichael Walle int ngpio; 70ebe36319SMichael Walle const char *const *names; 71ebe36319SMichael Walle 72ebe36319SMichael Walle unsigned int reg_dat_base; 73ebe36319SMichael Walle unsigned int reg_set_base; 74ebe36319SMichael Walle unsigned int reg_clr_base; 75ebe36319SMichael Walle unsigned int reg_dir_in_base; 76ebe36319SMichael Walle unsigned int reg_dir_out_base; 77ebe36319SMichael Walle int reg_stride; 78ebe36319SMichael Walle int ngpio_per_reg; 79ebe36319SMichael Walle struct irq_domain *irq_domain; 80ebe36319SMichael Walle 81ebe36319SMichael Walle int (*reg_mask_xlate)(struct gpio_regmap *gpio, unsigned int base, 82ebe36319SMichael Walle unsigned int offset, unsigned int *reg, 83ebe36319SMichael Walle unsigned int *mask); 849b3c47f1SMichael Walle 859b3c47f1SMichael Walle void *drvdata; 86ebe36319SMichael Walle }; 87ebe36319SMichael Walle 88ebe36319SMichael Walle struct gpio_regmap *gpio_regmap_register(const struct gpio_regmap_config *config); 89ebe36319SMichael Walle void gpio_regmap_unregister(struct gpio_regmap *gpio); 90ebe36319SMichael Walle struct gpio_regmap *devm_gpio_regmap_register(struct device *dev, 91ebe36319SMichael Walle const struct gpio_regmap_config *config); 92ebe36319SMichael Walle void *gpio_regmap_get_drvdata(struct gpio_regmap *gpio); 93ebe36319SMichael Walle 94ebe36319SMichael Walle #endif /* _LINUX_GPIO_REGMAP_H */ 95