1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2006, Intel Corporation. 4 * 5 * Copyright (C) Ashok Raj <[email protected]> 6 * Copyright (C) Shaohua Li <[email protected]> 7 */ 8 9 #ifndef __DMAR_H__ 10 #define __DMAR_H__ 11 12 #include <linux/acpi.h> 13 #include <linux/types.h> 14 #include <linux/msi.h> 15 #include <linux/irqreturn.h> 16 #include <linux/rwsem.h> 17 #include <linux/rculist.h> 18 19 struct acpi_dmar_header; 20 21 #ifdef CONFIG_X86 22 # define DMAR_UNITS_SUPPORTED MAX_IO_APICS 23 #else 24 # define DMAR_UNITS_SUPPORTED 64 25 #endif 26 27 /* DMAR Flags */ 28 #define DMAR_INTR_REMAP 0x1 29 #define DMAR_X2APIC_OPT_OUT 0x2 30 #define DMAR_PLATFORM_OPT_IN 0x4 31 32 struct intel_iommu; 33 34 struct dmar_dev_scope { 35 struct device __rcu *dev; 36 u8 bus; 37 u8 devfn; 38 }; 39 40 #ifdef CONFIG_DMAR_TABLE 41 extern struct acpi_table_header *dmar_tbl; 42 struct dmar_drhd_unit { 43 struct list_head list; /* list of drhd units */ 44 struct acpi_dmar_header *hdr; /* ACPI header */ 45 u64 reg_base_addr; /* register base address*/ 46 struct dmar_dev_scope *devices;/* target device array */ 47 int devices_cnt; /* target device count */ 48 u16 segment; /* PCI domain */ 49 u8 ignored:1; /* ignore drhd */ 50 u8 include_all:1; 51 struct intel_iommu *iommu; 52 }; 53 54 struct dmar_pci_path { 55 u8 bus; 56 u8 device; 57 u8 function; 58 }; 59 60 struct dmar_pci_notify_info { 61 struct pci_dev *dev; 62 unsigned long event; 63 int bus; 64 u16 seg; 65 u16 level; 66 struct dmar_pci_path path[]; 67 } __attribute__((packed)); 68 69 extern struct rw_semaphore dmar_global_lock; 70 extern struct list_head dmar_drhd_units; 71 72 #define for_each_drhd_unit(drhd) \ 73 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) 74 75 #define for_each_active_drhd_unit(drhd) \ 76 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \ 77 if (drhd->ignored) {} else 78 79 #define for_each_active_iommu(i, drhd) \ 80 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \ 81 if (i=drhd->iommu, drhd->ignored) {} else 82 83 #define for_each_iommu(i, drhd) \ 84 list_for_each_entry_rcu(drhd, &dmar_drhd_units, list) \ 85 if (i=drhd->iommu, 0) {} else 86 87 static inline bool dmar_rcu_check(void) 88 { 89 return rwsem_is_locked(&dmar_global_lock) || 90 system_state == SYSTEM_BOOTING; 91 } 92 93 #define dmar_rcu_dereference(p) rcu_dereference_check((p), dmar_rcu_check()) 94 95 #define for_each_dev_scope(a, c, p, d) \ 96 for ((p) = 0; ((d) = (p) < (c) ? dmar_rcu_dereference((a)[(p)].dev) : \ 97 NULL, (p) < (c)); (p)++) 98 99 #define for_each_active_dev_scope(a, c, p, d) \ 100 for_each_dev_scope((a), (c), (p), (d)) if (!(d)) { continue; } else 101 102 extern int dmar_table_init(void); 103 extern int dmar_dev_scope_init(void); 104 extern void dmar_register_bus_notifier(void); 105 extern int dmar_parse_dev_scope(void *start, void *end, int *cnt, 106 struct dmar_dev_scope **devices, u16 segment); 107 extern void *dmar_alloc_dev_scope(void *start, void *end, int *cnt); 108 extern void dmar_free_dev_scope(struct dmar_dev_scope **devices, int *cnt); 109 extern int dmar_insert_dev_scope(struct dmar_pci_notify_info *info, 110 void *start, void*end, u16 segment, 111 struct dmar_dev_scope *devices, 112 int devices_cnt); 113 extern int dmar_remove_dev_scope(struct dmar_pci_notify_info *info, 114 u16 segment, struct dmar_dev_scope *devices, 115 int count); 116 /* Intel IOMMU detection */ 117 extern int detect_intel_iommu(void); 118 extern int enable_drhd_fault_handling(void); 119 extern int dmar_device_add(acpi_handle handle); 120 extern int dmar_device_remove(acpi_handle handle); 121 122 static inline int dmar_res_noop(struct acpi_dmar_header *hdr, void *arg) 123 { 124 return 0; 125 } 126 127 #ifdef CONFIG_INTEL_IOMMU 128 extern int iommu_detected, no_iommu; 129 extern int intel_iommu_init(void); 130 extern int dmar_parse_one_rmrr(struct acpi_dmar_header *header, void *arg); 131 extern int dmar_parse_one_atsr(struct acpi_dmar_header *header, void *arg); 132 extern int dmar_check_one_atsr(struct acpi_dmar_header *hdr, void *arg); 133 extern int dmar_release_one_atsr(struct acpi_dmar_header *hdr, void *arg); 134 extern int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert); 135 extern int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info); 136 #else /* !CONFIG_INTEL_IOMMU: */ 137 static inline int intel_iommu_init(void) { return -ENODEV; } 138 139 #define dmar_parse_one_rmrr dmar_res_noop 140 #define dmar_parse_one_atsr dmar_res_noop 141 #define dmar_check_one_atsr dmar_res_noop 142 #define dmar_release_one_atsr dmar_res_noop 143 144 static inline int dmar_iommu_notify_scope_dev(struct dmar_pci_notify_info *info) 145 { 146 return 0; 147 } 148 149 static inline int dmar_iommu_hotplug(struct dmar_drhd_unit *dmaru, bool insert) 150 { 151 return 0; 152 } 153 #endif /* CONFIG_INTEL_IOMMU */ 154 155 #ifdef CONFIG_IRQ_REMAP 156 extern int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert); 157 #else /* CONFIG_IRQ_REMAP */ 158 static inline int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert) 159 { return 0; } 160 #endif /* CONFIG_IRQ_REMAP */ 161 162 extern bool dmar_platform_optin(void); 163 164 #else /* CONFIG_DMAR_TABLE */ 165 166 static inline int dmar_device_add(void *handle) 167 { 168 return 0; 169 } 170 171 static inline int dmar_device_remove(void *handle) 172 { 173 return 0; 174 } 175 176 static inline bool dmar_platform_optin(void) 177 { 178 return false; 179 } 180 181 #endif /* CONFIG_DMAR_TABLE */ 182 183 struct irte { 184 union { 185 /* Shared between remapped and posted mode*/ 186 struct { 187 __u64 present : 1, /* 0 */ 188 fpd : 1, /* 1 */ 189 __res0 : 6, /* 2 - 6 */ 190 avail : 4, /* 8 - 11 */ 191 __res1 : 3, /* 12 - 14 */ 192 pst : 1, /* 15 */ 193 vector : 8, /* 16 - 23 */ 194 __res2 : 40; /* 24 - 63 */ 195 }; 196 197 /* Remapped mode */ 198 struct { 199 __u64 r_present : 1, /* 0 */ 200 r_fpd : 1, /* 1 */ 201 dst_mode : 1, /* 2 */ 202 redir_hint : 1, /* 3 */ 203 trigger_mode : 1, /* 4 */ 204 dlvry_mode : 3, /* 5 - 7 */ 205 r_avail : 4, /* 8 - 11 */ 206 r_res0 : 4, /* 12 - 15 */ 207 r_vector : 8, /* 16 - 23 */ 208 r_res1 : 8, /* 24 - 31 */ 209 dest_id : 32; /* 32 - 63 */ 210 }; 211 212 /* Posted mode */ 213 struct { 214 __u64 p_present : 1, /* 0 */ 215 p_fpd : 1, /* 1 */ 216 p_res0 : 6, /* 2 - 7 */ 217 p_avail : 4, /* 8 - 11 */ 218 p_res1 : 2, /* 12 - 13 */ 219 p_urgent : 1, /* 14 */ 220 p_pst : 1, /* 15 */ 221 p_vector : 8, /* 16 - 23 */ 222 p_res2 : 14, /* 24 - 37 */ 223 pda_l : 26; /* 38 - 63 */ 224 }; 225 __u64 low; 226 }; 227 228 union { 229 /* Shared between remapped and posted mode*/ 230 struct { 231 __u64 sid : 16, /* 64 - 79 */ 232 sq : 2, /* 80 - 81 */ 233 svt : 2, /* 82 - 83 */ 234 __res3 : 44; /* 84 - 127 */ 235 }; 236 237 /* Posted mode*/ 238 struct { 239 __u64 p_sid : 16, /* 64 - 79 */ 240 p_sq : 2, /* 80 - 81 */ 241 p_svt : 2, /* 82 - 83 */ 242 p_res3 : 12, /* 84 - 95 */ 243 pda_h : 32; /* 96 - 127 */ 244 }; 245 __u64 high; 246 }; 247 }; 248 249 static inline void dmar_copy_shared_irte(struct irte *dst, struct irte *src) 250 { 251 dst->present = src->present; 252 dst->fpd = src->fpd; 253 dst->avail = src->avail; 254 dst->pst = src->pst; 255 dst->vector = src->vector; 256 dst->sid = src->sid; 257 dst->sq = src->sq; 258 dst->svt = src->svt; 259 } 260 261 #define PDA_LOW_BIT 26 262 #define PDA_HIGH_BIT 32 263 264 /* Can't use the common MSI interrupt functions 265 * since DMAR is not a pci device 266 */ 267 struct irq_data; 268 extern void dmar_msi_unmask(struct irq_data *data); 269 extern void dmar_msi_mask(struct irq_data *data); 270 extern void dmar_msi_read(int irq, struct msi_msg *msg); 271 extern void dmar_msi_write(int irq, struct msi_msg *msg); 272 extern int dmar_set_interrupt(struct intel_iommu *iommu); 273 extern irqreturn_t dmar_fault(int irq, void *dev_id); 274 extern int dmar_alloc_hwirq(int id, int node, void *arg); 275 extern void dmar_free_hwirq(int irq); 276 277 #endif /* __DMAR_H__ */ 278