xref: /linux-6.15/include/linux/dma/hsu.h (revision 3ca9760f)
1 /*
2  * Driver for the High Speed UART DMA
3  *
4  * Copyright (C) 2015 Intel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #ifndef _DMA_HSU_H
12 #define _DMA_HSU_H
13 
14 #include <linux/device.h>
15 #include <linux/interrupt.h>
16 
17 #include <linux/platform_data/dma-hsu.h>
18 
19 struct hsu_dma;
20 
21 /**
22  * struct hsu_dma_chip - representation of HSU DMA hardware
23  * @dev:		 struct device of the DMA controller
24  * @irq:		 irq line
25  * @regs:		 memory mapped I/O space
26  * @length:		 I/O space length
27  * @offset:		 offset of the I/O space where registers are located
28  * @hsu:		 struct hsu_dma that is filed by ->probe()
29  * @pdata:		 platform data for the DMA controller if provided
30  */
31 struct hsu_dma_chip {
32 	struct device			*dev;
33 	int				irq;
34 	void __iomem			*regs;
35 	unsigned int			length;
36 	unsigned int			offset;
37 	struct hsu_dma			*hsu;
38 };
39 
40 #if IS_ENABLED(CONFIG_HSU_DMA)
41 /* Export to the internal users */
42 int hsu_dma_get_status(struct hsu_dma_chip *chip, unsigned short nr,
43 		       u32 *status);
44 irqreturn_t hsu_dma_do_irq(struct hsu_dma_chip *chip, unsigned short nr,
45 			   u32 status);
46 
47 /* Export to the platform drivers */
48 int hsu_dma_probe(struct hsu_dma_chip *chip);
49 int hsu_dma_remove(struct hsu_dma_chip *chip);
50 #else
51 static inline int hsu_dma_get_status(struct hsu_dma_chip *chip,
52 				     unsigned short nr, u32 *status)
53 {
54 	return 0;
55 }
56 static inline irqreturn_t hsu_dma_do_irq(struct hsu_dma_chip *chip,
57 					 unsigned short nr, u32 status)
58 {
59 	return IRQ_NONE;
60 }
61 static inline int hsu_dma_probe(struct hsu_dma_chip *chip) { return -ENODEV; }
62 static inline int hsu_dma_remove(struct hsu_dma_chip *chip) { return 0; }
63 #endif /* CONFIG_HSU_DMA */
64 
65 #endif /* _DMA_HSU_H */
66