1*b466a37fSAndy Shevchenko /* SPDX-License-Identifier: GPL-2.0 */ 23d588f83SAndy Shevchenko /* 33d588f83SAndy Shevchenko * Driver for the Synopsys DesignWare DMA Controller 43d588f83SAndy Shevchenko * 53d588f83SAndy Shevchenko * Copyright (C) 2007 Atmel Corporation 63d588f83SAndy Shevchenko * Copyright (C) 2010-2011 ST Microelectronics 72a52f6e4SAndy Shevchenko * Copyright (C) 2014 Intel Corporation 83d588f83SAndy Shevchenko */ 93d588f83SAndy Shevchenko #ifndef _DMA_DW_H 103d588f83SAndy Shevchenko #define _DMA_DW_H 113d588f83SAndy Shevchenko 122a52f6e4SAndy Shevchenko #include <linux/clk.h> 132a52f6e4SAndy Shevchenko #include <linux/device.h> 143d588f83SAndy Shevchenko #include <linux/dmaengine.h> 153d588f83SAndy Shevchenko 162a52f6e4SAndy Shevchenko #include <linux/platform_data/dma-dw.h> 172a52f6e4SAndy Shevchenko 182a52f6e4SAndy Shevchenko struct dw_dma; 192a52f6e4SAndy Shevchenko 202a52f6e4SAndy Shevchenko /** 212a52f6e4SAndy Shevchenko * struct dw_dma_chip - representation of DesignWare DMA controller hardware 222a52f6e4SAndy Shevchenko * @dev: struct device of the DMA controller 2308d62f58SAndy Shevchenko * @id: instance ID 242a52f6e4SAndy Shevchenko * @irq: irq line 252a52f6e4SAndy Shevchenko * @regs: memory mapped I/O space 262a52f6e4SAndy Shevchenko * @clk: hclk clock 272a52f6e4SAndy Shevchenko * @dw: struct dw_dma that is filed by dw_dma_probe() 283a14c66dSAndy Shevchenko * @pdata: pointer to platform data 292a52f6e4SAndy Shevchenko */ 302a52f6e4SAndy Shevchenko struct dw_dma_chip { 312a52f6e4SAndy Shevchenko struct device *dev; 3208d62f58SAndy Shevchenko int id; 332a52f6e4SAndy Shevchenko int irq; 342a52f6e4SAndy Shevchenko void __iomem *regs; 352a52f6e4SAndy Shevchenko struct clk *clk; 362a52f6e4SAndy Shevchenko struct dw_dma *dw; 373a14c66dSAndy Shevchenko 383a14c66dSAndy Shevchenko const struct dw_dma_platform_data *pdata; 392a52f6e4SAndy Shevchenko }; 402a52f6e4SAndy Shevchenko 412a52f6e4SAndy Shevchenko /* Export to the platform drivers */ 4219d82910SAndy Shevchenko #if IS_ENABLED(CONFIG_DW_DMAC_CORE) 433a14c66dSAndy Shevchenko int dw_dma_probe(struct dw_dma_chip *chip); 442a52f6e4SAndy Shevchenko int dw_dma_remove(struct dw_dma_chip *chip); 4569da8be9SAndy Shevchenko int idma32_dma_probe(struct dw_dma_chip *chip); 4669da8be9SAndy Shevchenko int idma32_dma_remove(struct dw_dma_chip *chip); 4719d82910SAndy Shevchenko #else dw_dma_probe(struct dw_dma_chip * chip)4819d82910SAndy Shevchenkostatic inline int dw_dma_probe(struct dw_dma_chip *chip) { return -ENODEV; } dw_dma_remove(struct dw_dma_chip * chip)4919d82910SAndy Shevchenkostatic inline int dw_dma_remove(struct dw_dma_chip *chip) { return 0; } idma32_dma_probe(struct dw_dma_chip * chip)5069da8be9SAndy Shevchenkostatic inline int idma32_dma_probe(struct dw_dma_chip *chip) { return -ENODEV; } idma32_dma_remove(struct dw_dma_chip * chip)5169da8be9SAndy Shevchenkostatic inline int idma32_dma_remove(struct dw_dma_chip *chip) { return 0; } 5219d82910SAndy Shevchenko #endif /* CONFIG_DW_DMAC_CORE */ 532a52f6e4SAndy Shevchenko 543d588f83SAndy Shevchenko #endif /* _DMA_DW_H */ 55