1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_DMA_MAPPING_H 3 #define _LINUX_DMA_MAPPING_H 4 5 #include <linux/sizes.h> 6 #include <linux/string.h> 7 #include <linux/device.h> 8 #include <linux/err.h> 9 #include <linux/dma-debug.h> 10 #include <linux/dma-direction.h> 11 #include <linux/scatterlist.h> 12 #include <linux/bug.h> 13 #include <linux/mem_encrypt.h> 14 15 /** 16 * List of possible attributes associated with a DMA mapping. The semantics 17 * of each attribute should be defined in Documentation/DMA-attributes.txt. 18 * 19 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute 20 * forces all pending DMA writes to complete. 21 */ 22 #define DMA_ATTR_WRITE_BARRIER (1UL << 0) 23 /* 24 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping 25 * may be weakly ordered, that is that reads and writes may pass each other. 26 */ 27 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) 28 /* 29 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be 30 * buffered to improve performance. 31 */ 32 #define DMA_ATTR_WRITE_COMBINE (1UL << 2) 33 /* 34 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either 35 * consistent or non-consistent memory as it sees fit. 36 */ 37 #define DMA_ATTR_NON_CONSISTENT (1UL << 3) 38 /* 39 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel 40 * virtual mapping for the allocated buffer. 41 */ 42 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) 43 /* 44 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of 45 * the CPU cache for the given buffer assuming that it has been already 46 * transferred to 'device' domain. 47 */ 48 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) 49 /* 50 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer 51 * in physical memory. 52 */ 53 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) 54 /* 55 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem 56 * that it's probably not worth the time to try to allocate memory to in a way 57 * that gives better TLB efficiency. 58 */ 59 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) 60 /* 61 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress 62 * allocation failure reports (similarly to __GFP_NOWARN). 63 */ 64 #define DMA_ATTR_NO_WARN (1UL << 8) 65 66 /* 67 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully 68 * accessible at an elevated privilege level (and ideally inaccessible or 69 * at least read-only at lesser-privileged levels). 70 */ 71 #define DMA_ATTR_PRIVILEGED (1UL << 9) 72 73 /* 74 * A dma_addr_t can hold any valid DMA or bus address for the platform. 75 * It can be given to a device to use as a DMA source or target. A CPU cannot 76 * reference a dma_addr_t directly because there may be translation between 77 * its physical address space and the bus address space. 78 */ 79 struct dma_map_ops { 80 void* (*alloc)(struct device *dev, size_t size, 81 dma_addr_t *dma_handle, gfp_t gfp, 82 unsigned long attrs); 83 void (*free)(struct device *dev, size_t size, 84 void *vaddr, dma_addr_t dma_handle, 85 unsigned long attrs); 86 int (*mmap)(struct device *, struct vm_area_struct *, 87 void *, dma_addr_t, size_t, 88 unsigned long attrs); 89 90 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, 91 dma_addr_t, size_t, unsigned long attrs); 92 93 dma_addr_t (*map_page)(struct device *dev, struct page *page, 94 unsigned long offset, size_t size, 95 enum dma_data_direction dir, 96 unsigned long attrs); 97 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 98 size_t size, enum dma_data_direction dir, 99 unsigned long attrs); 100 /* 101 * map_sg returns 0 on error and a value > 0 on success. 102 * It should never return a value < 0. 103 */ 104 int (*map_sg)(struct device *dev, struct scatterlist *sg, 105 int nents, enum dma_data_direction dir, 106 unsigned long attrs); 107 void (*unmap_sg)(struct device *dev, 108 struct scatterlist *sg, int nents, 109 enum dma_data_direction dir, 110 unsigned long attrs); 111 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, 112 size_t size, enum dma_data_direction dir, 113 unsigned long attrs); 114 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, 115 size_t size, enum dma_data_direction dir, 116 unsigned long attrs); 117 void (*sync_single_for_cpu)(struct device *dev, 118 dma_addr_t dma_handle, size_t size, 119 enum dma_data_direction dir); 120 void (*sync_single_for_device)(struct device *dev, 121 dma_addr_t dma_handle, size_t size, 122 enum dma_data_direction dir); 123 void (*sync_sg_for_cpu)(struct device *dev, 124 struct scatterlist *sg, int nents, 125 enum dma_data_direction dir); 126 void (*sync_sg_for_device)(struct device *dev, 127 struct scatterlist *sg, int nents, 128 enum dma_data_direction dir); 129 void (*cache_sync)(struct device *dev, void *vaddr, size_t size, 130 enum dma_data_direction direction); 131 int (*dma_supported)(struct device *dev, u64 mask); 132 u64 (*get_required_mask)(struct device *dev); 133 size_t (*max_mapping_size)(struct device *dev); 134 }; 135 136 #define DMA_MAPPING_ERROR (~(dma_addr_t)0) 137 138 extern const struct dma_map_ops dma_virt_ops; 139 extern const struct dma_map_ops dma_dummy_ops; 140 141 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 142 143 #define DMA_MASK_NONE 0x0ULL 144 145 static inline int valid_dma_direction(int dma_direction) 146 { 147 return ((dma_direction == DMA_BIDIRECTIONAL) || 148 (dma_direction == DMA_TO_DEVICE) || 149 (dma_direction == DMA_FROM_DEVICE)); 150 } 151 152 #ifdef CONFIG_DMA_DECLARE_COHERENT 153 /* 154 * These three functions are only for dma allocator. 155 * Don't use them in device drivers. 156 */ 157 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, 158 dma_addr_t *dma_handle, void **ret); 159 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); 160 161 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, 162 void *cpu_addr, size_t size, int *ret); 163 164 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle); 165 int dma_release_from_global_coherent(int order, void *vaddr); 166 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, 167 size_t size, int *ret); 168 169 #else 170 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) 171 #define dma_release_from_dev_coherent(dev, order, vaddr) (0) 172 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) 173 174 static inline void *dma_alloc_from_global_coherent(ssize_t size, 175 dma_addr_t *dma_handle) 176 { 177 return NULL; 178 } 179 180 static inline int dma_release_from_global_coherent(int order, void *vaddr) 181 { 182 return 0; 183 } 184 185 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, 186 void *cpu_addr, size_t size, 187 int *ret) 188 { 189 return 0; 190 } 191 #endif /* CONFIG_DMA_DECLARE_COHERENT */ 192 193 static inline bool dma_is_direct(const struct dma_map_ops *ops) 194 { 195 return likely(!ops); 196 } 197 198 /* 199 * All the dma_direct_* declarations are here just for the indirect call bypass, 200 * and must not be used directly drivers! 201 */ 202 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, 203 unsigned long offset, size_t size, enum dma_data_direction dir, 204 unsigned long attrs); 205 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 206 enum dma_data_direction dir, unsigned long attrs); 207 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr, 208 size_t size, enum dma_data_direction dir, unsigned long attrs); 209 210 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ 211 defined(CONFIG_SWIOTLB) 212 void dma_direct_sync_single_for_device(struct device *dev, 213 dma_addr_t addr, size_t size, enum dma_data_direction dir); 214 void dma_direct_sync_sg_for_device(struct device *dev, 215 struct scatterlist *sgl, int nents, enum dma_data_direction dir); 216 #else 217 static inline void dma_direct_sync_single_for_device(struct device *dev, 218 dma_addr_t addr, size_t size, enum dma_data_direction dir) 219 { 220 } 221 static inline void dma_direct_sync_sg_for_device(struct device *dev, 222 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 223 { 224 } 225 #endif 226 227 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ 228 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \ 229 defined(CONFIG_SWIOTLB) 230 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 231 size_t size, enum dma_data_direction dir, unsigned long attrs); 232 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, 233 int nents, enum dma_data_direction dir, unsigned long attrs); 234 void dma_direct_sync_single_for_cpu(struct device *dev, 235 dma_addr_t addr, size_t size, enum dma_data_direction dir); 236 void dma_direct_sync_sg_for_cpu(struct device *dev, 237 struct scatterlist *sgl, int nents, enum dma_data_direction dir); 238 #else 239 static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 240 size_t size, enum dma_data_direction dir, unsigned long attrs) 241 { 242 } 243 static inline void dma_direct_unmap_sg(struct device *dev, 244 struct scatterlist *sgl, int nents, enum dma_data_direction dir, 245 unsigned long attrs) 246 { 247 } 248 static inline void dma_direct_sync_single_for_cpu(struct device *dev, 249 dma_addr_t addr, size_t size, enum dma_data_direction dir) 250 { 251 } 252 static inline void dma_direct_sync_sg_for_cpu(struct device *dev, 253 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 254 { 255 } 256 #endif 257 258 size_t dma_direct_max_mapping_size(struct device *dev); 259 260 #ifdef CONFIG_HAS_DMA 261 #include <asm/dma-mapping.h> 262 263 static inline const struct dma_map_ops *get_dma_ops(struct device *dev) 264 { 265 if (dev->dma_ops) 266 return dev->dma_ops; 267 return get_arch_dma_ops(dev->bus); 268 } 269 270 static inline void set_dma_ops(struct device *dev, 271 const struct dma_map_ops *dma_ops) 272 { 273 dev->dma_ops = dma_ops; 274 } 275 276 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 277 struct page *page, size_t offset, size_t size, 278 enum dma_data_direction dir, unsigned long attrs) 279 { 280 const struct dma_map_ops *ops = get_dma_ops(dev); 281 dma_addr_t addr; 282 283 BUG_ON(!valid_dma_direction(dir)); 284 if (dma_is_direct(ops)) 285 addr = dma_direct_map_page(dev, page, offset, size, dir, attrs); 286 else 287 addr = ops->map_page(dev, page, offset, size, dir, attrs); 288 debug_dma_map_page(dev, page, offset, size, dir, addr); 289 290 return addr; 291 } 292 293 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 294 size_t size, enum dma_data_direction dir, unsigned long attrs) 295 { 296 const struct dma_map_ops *ops = get_dma_ops(dev); 297 298 BUG_ON(!valid_dma_direction(dir)); 299 if (dma_is_direct(ops)) 300 dma_direct_unmap_page(dev, addr, size, dir, attrs); 301 else if (ops->unmap_page) 302 ops->unmap_page(dev, addr, size, dir, attrs); 303 debug_dma_unmap_page(dev, addr, size, dir); 304 } 305 306 /* 307 * dma_maps_sg_attrs returns 0 on error and > 0 on success. 308 * It should never return a value < 0. 309 */ 310 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 311 int nents, enum dma_data_direction dir, 312 unsigned long attrs) 313 { 314 const struct dma_map_ops *ops = get_dma_ops(dev); 315 int ents; 316 317 BUG_ON(!valid_dma_direction(dir)); 318 if (dma_is_direct(ops)) 319 ents = dma_direct_map_sg(dev, sg, nents, dir, attrs); 320 else 321 ents = ops->map_sg(dev, sg, nents, dir, attrs); 322 BUG_ON(ents < 0); 323 debug_dma_map_sg(dev, sg, nents, ents, dir); 324 325 return ents; 326 } 327 328 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, 329 int nents, enum dma_data_direction dir, 330 unsigned long attrs) 331 { 332 const struct dma_map_ops *ops = get_dma_ops(dev); 333 334 BUG_ON(!valid_dma_direction(dir)); 335 debug_dma_unmap_sg(dev, sg, nents, dir); 336 if (dma_is_direct(ops)) 337 dma_direct_unmap_sg(dev, sg, nents, dir, attrs); 338 else if (ops->unmap_sg) 339 ops->unmap_sg(dev, sg, nents, dir, attrs); 340 } 341 342 static inline dma_addr_t dma_map_resource(struct device *dev, 343 phys_addr_t phys_addr, 344 size_t size, 345 enum dma_data_direction dir, 346 unsigned long attrs) 347 { 348 const struct dma_map_ops *ops = get_dma_ops(dev); 349 dma_addr_t addr = DMA_MAPPING_ERROR; 350 351 BUG_ON(!valid_dma_direction(dir)); 352 353 /* Don't allow RAM to be mapped */ 354 if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr)))) 355 return DMA_MAPPING_ERROR; 356 357 if (dma_is_direct(ops)) 358 addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs); 359 else if (ops->map_resource) 360 addr = ops->map_resource(dev, phys_addr, size, dir, attrs); 361 362 debug_dma_map_resource(dev, phys_addr, size, dir, addr); 363 return addr; 364 } 365 366 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 367 size_t size, enum dma_data_direction dir, 368 unsigned long attrs) 369 { 370 const struct dma_map_ops *ops = get_dma_ops(dev); 371 372 BUG_ON(!valid_dma_direction(dir)); 373 if (!dma_is_direct(ops) && ops->unmap_resource) 374 ops->unmap_resource(dev, addr, size, dir, attrs); 375 debug_dma_unmap_resource(dev, addr, size, dir); 376 } 377 378 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 379 size_t size, 380 enum dma_data_direction dir) 381 { 382 const struct dma_map_ops *ops = get_dma_ops(dev); 383 384 BUG_ON(!valid_dma_direction(dir)); 385 if (dma_is_direct(ops)) 386 dma_direct_sync_single_for_cpu(dev, addr, size, dir); 387 else if (ops->sync_single_for_cpu) 388 ops->sync_single_for_cpu(dev, addr, size, dir); 389 debug_dma_sync_single_for_cpu(dev, addr, size, dir); 390 } 391 392 static inline void dma_sync_single_for_device(struct device *dev, 393 dma_addr_t addr, size_t size, 394 enum dma_data_direction dir) 395 { 396 const struct dma_map_ops *ops = get_dma_ops(dev); 397 398 BUG_ON(!valid_dma_direction(dir)); 399 if (dma_is_direct(ops)) 400 dma_direct_sync_single_for_device(dev, addr, size, dir); 401 else if (ops->sync_single_for_device) 402 ops->sync_single_for_device(dev, addr, size, dir); 403 debug_dma_sync_single_for_device(dev, addr, size, dir); 404 } 405 406 static inline void 407 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 408 int nelems, enum dma_data_direction dir) 409 { 410 const struct dma_map_ops *ops = get_dma_ops(dev); 411 412 BUG_ON(!valid_dma_direction(dir)); 413 if (dma_is_direct(ops)) 414 dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir); 415 else if (ops->sync_sg_for_cpu) 416 ops->sync_sg_for_cpu(dev, sg, nelems, dir); 417 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); 418 } 419 420 static inline void 421 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 422 int nelems, enum dma_data_direction dir) 423 { 424 const struct dma_map_ops *ops = get_dma_ops(dev); 425 426 BUG_ON(!valid_dma_direction(dir)); 427 if (dma_is_direct(ops)) 428 dma_direct_sync_sg_for_device(dev, sg, nelems, dir); 429 else if (ops->sync_sg_for_device) 430 ops->sync_sg_for_device(dev, sg, nelems, dir); 431 debug_dma_sync_sg_for_device(dev, sg, nelems, dir); 432 433 } 434 435 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 436 { 437 debug_dma_mapping_error(dev, dma_addr); 438 439 if (dma_addr == DMA_MAPPING_ERROR) 440 return -ENOMEM; 441 return 0; 442 } 443 444 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 445 gfp_t flag, unsigned long attrs); 446 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 447 dma_addr_t dma_handle, unsigned long attrs); 448 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 449 gfp_t gfp, unsigned long attrs); 450 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 451 dma_addr_t dma_handle); 452 void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 453 enum dma_data_direction dir); 454 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 455 void *cpu_addr, dma_addr_t dma_addr, size_t size, 456 unsigned long attrs); 457 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 458 void *cpu_addr, dma_addr_t dma_addr, size_t size, 459 unsigned long attrs); 460 int dma_supported(struct device *dev, u64 mask); 461 int dma_set_mask(struct device *dev, u64 mask); 462 int dma_set_coherent_mask(struct device *dev, u64 mask); 463 u64 dma_get_required_mask(struct device *dev); 464 size_t dma_max_mapping_size(struct device *dev); 465 #else /* CONFIG_HAS_DMA */ 466 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 467 struct page *page, size_t offset, size_t size, 468 enum dma_data_direction dir, unsigned long attrs) 469 { 470 return DMA_MAPPING_ERROR; 471 } 472 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 473 size_t size, enum dma_data_direction dir, unsigned long attrs) 474 { 475 } 476 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 477 int nents, enum dma_data_direction dir, unsigned long attrs) 478 { 479 return 0; 480 } 481 static inline void dma_unmap_sg_attrs(struct device *dev, 482 struct scatterlist *sg, int nents, enum dma_data_direction dir, 483 unsigned long attrs) 484 { 485 } 486 static inline dma_addr_t dma_map_resource(struct device *dev, 487 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, 488 unsigned long attrs) 489 { 490 return DMA_MAPPING_ERROR; 491 } 492 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 493 size_t size, enum dma_data_direction dir, unsigned long attrs) 494 { 495 } 496 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 497 size_t size, enum dma_data_direction dir) 498 { 499 } 500 static inline void dma_sync_single_for_device(struct device *dev, 501 dma_addr_t addr, size_t size, enum dma_data_direction dir) 502 { 503 } 504 static inline void dma_sync_sg_for_cpu(struct device *dev, 505 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 506 { 507 } 508 static inline void dma_sync_sg_for_device(struct device *dev, 509 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 510 { 511 } 512 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 513 { 514 return -ENOMEM; 515 } 516 static inline void *dma_alloc_attrs(struct device *dev, size_t size, 517 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) 518 { 519 return NULL; 520 } 521 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 522 dma_addr_t dma_handle, unsigned long attrs) 523 { 524 } 525 static inline void *dmam_alloc_attrs(struct device *dev, size_t size, 526 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 527 { 528 return NULL; 529 } 530 static inline void dmam_free_coherent(struct device *dev, size_t size, 531 void *vaddr, dma_addr_t dma_handle) 532 { 533 } 534 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 535 enum dma_data_direction dir) 536 { 537 } 538 static inline int dma_get_sgtable_attrs(struct device *dev, 539 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, 540 size_t size, unsigned long attrs) 541 { 542 return -ENXIO; 543 } 544 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 545 void *cpu_addr, dma_addr_t dma_addr, size_t size, 546 unsigned long attrs) 547 { 548 return -ENXIO; 549 } 550 static inline int dma_supported(struct device *dev, u64 mask) 551 { 552 return 0; 553 } 554 static inline int dma_set_mask(struct device *dev, u64 mask) 555 { 556 return -EIO; 557 } 558 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 559 { 560 return -EIO; 561 } 562 static inline u64 dma_get_required_mask(struct device *dev) 563 { 564 return 0; 565 } 566 static inline size_t dma_max_mapping_size(struct device *dev) 567 { 568 return 0; 569 } 570 #endif /* CONFIG_HAS_DMA */ 571 572 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, 573 size_t size, enum dma_data_direction dir, unsigned long attrs) 574 { 575 debug_dma_map_single(dev, ptr, size); 576 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), 577 size, dir, attrs); 578 } 579 580 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, 581 size_t size, enum dma_data_direction dir, unsigned long attrs) 582 { 583 return dma_unmap_page_attrs(dev, addr, size, dir, attrs); 584 } 585 586 static inline void dma_sync_single_range_for_cpu(struct device *dev, 587 dma_addr_t addr, unsigned long offset, size_t size, 588 enum dma_data_direction dir) 589 { 590 return dma_sync_single_for_cpu(dev, addr + offset, size, dir); 591 } 592 593 static inline void dma_sync_single_range_for_device(struct device *dev, 594 dma_addr_t addr, unsigned long offset, size_t size, 595 enum dma_data_direction dir) 596 { 597 return dma_sync_single_for_device(dev, addr + offset, size, dir); 598 } 599 600 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) 601 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) 602 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) 603 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) 604 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 605 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 606 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 607 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 608 609 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, 610 void *cpu_addr, dma_addr_t dma_addr, size_t size, 611 unsigned long attrs); 612 613 void *dma_common_contiguous_remap(struct page *page, size_t size, 614 unsigned long vm_flags, 615 pgprot_t prot, const void *caller); 616 617 void *dma_common_pages_remap(struct page **pages, size_t size, 618 unsigned long vm_flags, pgprot_t prot, 619 const void *caller); 620 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags); 621 622 int __init dma_atomic_pool_init(gfp_t gfp, pgprot_t prot); 623 bool dma_in_atomic_pool(void *start, size_t size); 624 void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags); 625 bool dma_free_from_pool(void *start, size_t size); 626 627 int 628 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr, 629 dma_addr_t dma_addr, size_t size, unsigned long attrs); 630 631 static inline void *dma_alloc_coherent(struct device *dev, size_t size, 632 dma_addr_t *dma_handle, gfp_t gfp) 633 { 634 635 return dma_alloc_attrs(dev, size, dma_handle, gfp, 636 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 637 } 638 639 static inline void dma_free_coherent(struct device *dev, size_t size, 640 void *cpu_addr, dma_addr_t dma_handle) 641 { 642 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); 643 } 644 645 646 static inline u64 dma_get_mask(struct device *dev) 647 { 648 if (dev->dma_mask && *dev->dma_mask) 649 return *dev->dma_mask; 650 return DMA_BIT_MASK(32); 651 } 652 653 /* 654 * Set both the DMA mask and the coherent DMA mask to the same thing. 655 * Note that we don't check the return value from dma_set_coherent_mask() 656 * as the DMA API guarantees that the coherent DMA mask can be set to 657 * the same or smaller than the streaming DMA mask. 658 */ 659 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 660 { 661 int rc = dma_set_mask(dev, mask); 662 if (rc == 0) 663 dma_set_coherent_mask(dev, mask); 664 return rc; 665 } 666 667 /* 668 * Similar to the above, except it deals with the case where the device 669 * does not have dev->dma_mask appropriately setup. 670 */ 671 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 672 { 673 dev->dma_mask = &dev->coherent_dma_mask; 674 return dma_set_mask_and_coherent(dev, mask); 675 } 676 677 /** 678 * dma_addressing_limited - return if the device is addressing limited 679 * @dev: device to check 680 * 681 * Return %true if the devices DMA mask is too small to address all memory in 682 * the system, else %false. Lack of addressing bits is the prime reason for 683 * bounce buffering, but might not be the only one. 684 */ 685 static inline bool dma_addressing_limited(struct device *dev) 686 { 687 return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) < 688 dma_get_required_mask(dev); 689 } 690 691 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS 692 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 693 const struct iommu_ops *iommu, bool coherent); 694 #else 695 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, 696 u64 size, const struct iommu_ops *iommu, bool coherent) 697 { 698 } 699 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */ 700 701 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS 702 void arch_teardown_dma_ops(struct device *dev); 703 #else 704 static inline void arch_teardown_dma_ops(struct device *dev) 705 { 706 } 707 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */ 708 709 static inline unsigned int dma_get_max_seg_size(struct device *dev) 710 { 711 if (dev->dma_parms && dev->dma_parms->max_segment_size) 712 return dev->dma_parms->max_segment_size; 713 return SZ_64K; 714 } 715 716 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) 717 { 718 if (dev->dma_parms) { 719 dev->dma_parms->max_segment_size = size; 720 return 0; 721 } 722 return -EIO; 723 } 724 725 static inline unsigned long dma_get_seg_boundary(struct device *dev) 726 { 727 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) 728 return dev->dma_parms->segment_boundary_mask; 729 return DMA_BIT_MASK(32); 730 } 731 732 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 733 { 734 if (dev->dma_parms) { 735 dev->dma_parms->segment_boundary_mask = mask; 736 return 0; 737 } 738 return -EIO; 739 } 740 741 static inline int dma_get_cache_alignment(void) 742 { 743 #ifdef ARCH_DMA_MINALIGN 744 return ARCH_DMA_MINALIGN; 745 #endif 746 return 1; 747 } 748 749 #ifdef CONFIG_DMA_DECLARE_COHERENT 750 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 751 dma_addr_t device_addr, size_t size); 752 void dma_release_declared_memory(struct device *dev); 753 #else 754 static inline int 755 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 756 dma_addr_t device_addr, size_t size) 757 { 758 return -ENOSYS; 759 } 760 761 static inline void 762 dma_release_declared_memory(struct device *dev) 763 { 764 } 765 #endif /* CONFIG_DMA_DECLARE_COHERENT */ 766 767 static inline void *dmam_alloc_coherent(struct device *dev, size_t size, 768 dma_addr_t *dma_handle, gfp_t gfp) 769 { 770 return dmam_alloc_attrs(dev, size, dma_handle, gfp, 771 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 772 } 773 774 static inline void *dma_alloc_wc(struct device *dev, size_t size, 775 dma_addr_t *dma_addr, gfp_t gfp) 776 { 777 unsigned long attrs = DMA_ATTR_WRITE_COMBINE; 778 779 if (gfp & __GFP_NOWARN) 780 attrs |= DMA_ATTR_NO_WARN; 781 782 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); 783 } 784 #ifndef dma_alloc_writecombine 785 #define dma_alloc_writecombine dma_alloc_wc 786 #endif 787 788 static inline void dma_free_wc(struct device *dev, size_t size, 789 void *cpu_addr, dma_addr_t dma_addr) 790 { 791 return dma_free_attrs(dev, size, cpu_addr, dma_addr, 792 DMA_ATTR_WRITE_COMBINE); 793 } 794 #ifndef dma_free_writecombine 795 #define dma_free_writecombine dma_free_wc 796 #endif 797 798 static inline int dma_mmap_wc(struct device *dev, 799 struct vm_area_struct *vma, 800 void *cpu_addr, dma_addr_t dma_addr, 801 size_t size) 802 { 803 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, 804 DMA_ATTR_WRITE_COMBINE); 805 } 806 #ifndef dma_mmap_writecombine 807 #define dma_mmap_writecombine dma_mmap_wc 808 #endif 809 810 #ifdef CONFIG_NEED_DMA_MAP_STATE 811 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 812 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 813 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 814 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 815 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 816 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 817 #else 818 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 819 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 820 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 821 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 822 #define dma_unmap_len(PTR, LEN_NAME) (0) 823 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 824 #endif 825 826 #endif 827