1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef _LINUX_DMA_MAPPING_H 3 #define _LINUX_DMA_MAPPING_H 4 5 #include <linux/sizes.h> 6 #include <linux/string.h> 7 #include <linux/device.h> 8 #include <linux/err.h> 9 #include <linux/dma-debug.h> 10 #include <linux/dma-direction.h> 11 #include <linux/scatterlist.h> 12 #include <linux/bug.h> 13 #include <linux/mem_encrypt.h> 14 15 /** 16 * List of possible attributes associated with a DMA mapping. The semantics 17 * of each attribute should be defined in Documentation/DMA-attributes.txt. 18 * 19 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute 20 * forces all pending DMA writes to complete. 21 */ 22 #define DMA_ATTR_WRITE_BARRIER (1UL << 0) 23 /* 24 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping 25 * may be weakly ordered, that is that reads and writes may pass each other. 26 */ 27 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) 28 /* 29 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be 30 * buffered to improve performance. 31 */ 32 #define DMA_ATTR_WRITE_COMBINE (1UL << 2) 33 /* 34 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either 35 * consistent or non-consistent memory as it sees fit. 36 */ 37 #define DMA_ATTR_NON_CONSISTENT (1UL << 3) 38 /* 39 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel 40 * virtual mapping for the allocated buffer. 41 */ 42 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) 43 /* 44 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of 45 * the CPU cache for the given buffer assuming that it has been already 46 * transferred to 'device' domain. 47 */ 48 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) 49 /* 50 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer 51 * in physical memory. 52 */ 53 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) 54 /* 55 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem 56 * that it's probably not worth the time to try to allocate memory to in a way 57 * that gives better TLB efficiency. 58 */ 59 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) 60 /* 61 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress 62 * allocation failure reports (similarly to __GFP_NOWARN). 63 */ 64 #define DMA_ATTR_NO_WARN (1UL << 8) 65 66 /* 67 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully 68 * accessible at an elevated privilege level (and ideally inaccessible or 69 * at least read-only at lesser-privileged levels). 70 */ 71 #define DMA_ATTR_PRIVILEGED (1UL << 9) 72 73 /* 74 * A dma_addr_t can hold any valid DMA or bus address for the platform. 75 * It can be given to a device to use as a DMA source or target. A CPU cannot 76 * reference a dma_addr_t directly because there may be translation between 77 * its physical address space and the bus address space. 78 */ 79 struct dma_map_ops { 80 void* (*alloc)(struct device *dev, size_t size, 81 dma_addr_t *dma_handle, gfp_t gfp, 82 unsigned long attrs); 83 void (*free)(struct device *dev, size_t size, 84 void *vaddr, dma_addr_t dma_handle, 85 unsigned long attrs); 86 int (*mmap)(struct device *, struct vm_area_struct *, 87 void *, dma_addr_t, size_t, 88 unsigned long attrs); 89 90 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, 91 dma_addr_t, size_t, unsigned long attrs); 92 93 dma_addr_t (*map_page)(struct device *dev, struct page *page, 94 unsigned long offset, size_t size, 95 enum dma_data_direction dir, 96 unsigned long attrs); 97 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 98 size_t size, enum dma_data_direction dir, 99 unsigned long attrs); 100 /* 101 * map_sg returns 0 on error and a value > 0 on success. 102 * It should never return a value < 0. 103 */ 104 int (*map_sg)(struct device *dev, struct scatterlist *sg, 105 int nents, enum dma_data_direction dir, 106 unsigned long attrs); 107 void (*unmap_sg)(struct device *dev, 108 struct scatterlist *sg, int nents, 109 enum dma_data_direction dir, 110 unsigned long attrs); 111 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, 112 size_t size, enum dma_data_direction dir, 113 unsigned long attrs); 114 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, 115 size_t size, enum dma_data_direction dir, 116 unsigned long attrs); 117 void (*sync_single_for_cpu)(struct device *dev, 118 dma_addr_t dma_handle, size_t size, 119 enum dma_data_direction dir); 120 void (*sync_single_for_device)(struct device *dev, 121 dma_addr_t dma_handle, size_t size, 122 enum dma_data_direction dir); 123 void (*sync_sg_for_cpu)(struct device *dev, 124 struct scatterlist *sg, int nents, 125 enum dma_data_direction dir); 126 void (*sync_sg_for_device)(struct device *dev, 127 struct scatterlist *sg, int nents, 128 enum dma_data_direction dir); 129 void (*cache_sync)(struct device *dev, void *vaddr, size_t size, 130 enum dma_data_direction direction); 131 int (*dma_supported)(struct device *dev, u64 mask); 132 u64 (*get_required_mask)(struct device *dev); 133 size_t (*max_mapping_size)(struct device *dev); 134 unsigned long (*get_merge_boundary)(struct device *dev); 135 }; 136 137 #define DMA_MAPPING_ERROR (~(dma_addr_t)0) 138 139 extern const struct dma_map_ops dma_virt_ops; 140 extern const struct dma_map_ops dma_dummy_ops; 141 142 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 143 144 #define DMA_MASK_NONE 0x0ULL 145 146 static inline int valid_dma_direction(int dma_direction) 147 { 148 return ((dma_direction == DMA_BIDIRECTIONAL) || 149 (dma_direction == DMA_TO_DEVICE) || 150 (dma_direction == DMA_FROM_DEVICE)); 151 } 152 153 static inline int is_device_dma_capable(struct device *dev) 154 { 155 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; 156 } 157 158 #ifdef CONFIG_DMA_DECLARE_COHERENT 159 /* 160 * These three functions are only for dma allocator. 161 * Don't use them in device drivers. 162 */ 163 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, 164 dma_addr_t *dma_handle, void **ret); 165 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); 166 167 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, 168 void *cpu_addr, size_t size, int *ret); 169 170 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle); 171 int dma_release_from_global_coherent(int order, void *vaddr); 172 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, 173 size_t size, int *ret); 174 175 #else 176 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) 177 #define dma_release_from_dev_coherent(dev, order, vaddr) (0) 178 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) 179 180 static inline void *dma_alloc_from_global_coherent(ssize_t size, 181 dma_addr_t *dma_handle) 182 { 183 return NULL; 184 } 185 186 static inline int dma_release_from_global_coherent(int order, void *vaddr) 187 { 188 return 0; 189 } 190 191 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, 192 void *cpu_addr, size_t size, 193 int *ret) 194 { 195 return 0; 196 } 197 #endif /* CONFIG_DMA_DECLARE_COHERENT */ 198 199 static inline bool dma_is_direct(const struct dma_map_ops *ops) 200 { 201 return likely(!ops); 202 } 203 204 /* 205 * All the dma_direct_* declarations are here just for the indirect call bypass, 206 * and must not be used directly drivers! 207 */ 208 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, 209 unsigned long offset, size_t size, enum dma_data_direction dir, 210 unsigned long attrs); 211 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 212 enum dma_data_direction dir, unsigned long attrs); 213 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr, 214 size_t size, enum dma_data_direction dir, unsigned long attrs); 215 216 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ 217 defined(CONFIG_SWIOTLB) 218 void dma_direct_sync_single_for_device(struct device *dev, 219 dma_addr_t addr, size_t size, enum dma_data_direction dir); 220 void dma_direct_sync_sg_for_device(struct device *dev, 221 struct scatterlist *sgl, int nents, enum dma_data_direction dir); 222 #else 223 static inline void dma_direct_sync_single_for_device(struct device *dev, 224 dma_addr_t addr, size_t size, enum dma_data_direction dir) 225 { 226 } 227 static inline void dma_direct_sync_sg_for_device(struct device *dev, 228 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 229 { 230 } 231 #endif 232 233 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ 234 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \ 235 defined(CONFIG_SWIOTLB) 236 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 237 size_t size, enum dma_data_direction dir, unsigned long attrs); 238 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, 239 int nents, enum dma_data_direction dir, unsigned long attrs); 240 void dma_direct_sync_single_for_cpu(struct device *dev, 241 dma_addr_t addr, size_t size, enum dma_data_direction dir); 242 void dma_direct_sync_sg_for_cpu(struct device *dev, 243 struct scatterlist *sgl, int nents, enum dma_data_direction dir); 244 #else 245 static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 246 size_t size, enum dma_data_direction dir, unsigned long attrs) 247 { 248 } 249 static inline void dma_direct_unmap_sg(struct device *dev, 250 struct scatterlist *sgl, int nents, enum dma_data_direction dir, 251 unsigned long attrs) 252 { 253 } 254 static inline void dma_direct_sync_single_for_cpu(struct device *dev, 255 dma_addr_t addr, size_t size, enum dma_data_direction dir) 256 { 257 } 258 static inline void dma_direct_sync_sg_for_cpu(struct device *dev, 259 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 260 { 261 } 262 #endif 263 264 size_t dma_direct_max_mapping_size(struct device *dev); 265 266 #ifdef CONFIG_HAS_DMA 267 #include <asm/dma-mapping.h> 268 269 static inline const struct dma_map_ops *get_dma_ops(struct device *dev) 270 { 271 if (dev->dma_ops) 272 return dev->dma_ops; 273 return get_arch_dma_ops(dev->bus); 274 } 275 276 static inline void set_dma_ops(struct device *dev, 277 const struct dma_map_ops *dma_ops) 278 { 279 dev->dma_ops = dma_ops; 280 } 281 282 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 283 struct page *page, size_t offset, size_t size, 284 enum dma_data_direction dir, unsigned long attrs) 285 { 286 const struct dma_map_ops *ops = get_dma_ops(dev); 287 dma_addr_t addr; 288 289 BUG_ON(!valid_dma_direction(dir)); 290 if (dma_is_direct(ops)) 291 addr = dma_direct_map_page(dev, page, offset, size, dir, attrs); 292 else 293 addr = ops->map_page(dev, page, offset, size, dir, attrs); 294 debug_dma_map_page(dev, page, offset, size, dir, addr); 295 296 return addr; 297 } 298 299 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 300 size_t size, enum dma_data_direction dir, unsigned long attrs) 301 { 302 const struct dma_map_ops *ops = get_dma_ops(dev); 303 304 BUG_ON(!valid_dma_direction(dir)); 305 if (dma_is_direct(ops)) 306 dma_direct_unmap_page(dev, addr, size, dir, attrs); 307 else if (ops->unmap_page) 308 ops->unmap_page(dev, addr, size, dir, attrs); 309 debug_dma_unmap_page(dev, addr, size, dir); 310 } 311 312 /* 313 * dma_maps_sg_attrs returns 0 on error and > 0 on success. 314 * It should never return a value < 0. 315 */ 316 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 317 int nents, enum dma_data_direction dir, 318 unsigned long attrs) 319 { 320 const struct dma_map_ops *ops = get_dma_ops(dev); 321 int ents; 322 323 BUG_ON(!valid_dma_direction(dir)); 324 if (dma_is_direct(ops)) 325 ents = dma_direct_map_sg(dev, sg, nents, dir, attrs); 326 else 327 ents = ops->map_sg(dev, sg, nents, dir, attrs); 328 BUG_ON(ents < 0); 329 debug_dma_map_sg(dev, sg, nents, ents, dir); 330 331 return ents; 332 } 333 334 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, 335 int nents, enum dma_data_direction dir, 336 unsigned long attrs) 337 { 338 const struct dma_map_ops *ops = get_dma_ops(dev); 339 340 BUG_ON(!valid_dma_direction(dir)); 341 debug_dma_unmap_sg(dev, sg, nents, dir); 342 if (dma_is_direct(ops)) 343 dma_direct_unmap_sg(dev, sg, nents, dir, attrs); 344 else if (ops->unmap_sg) 345 ops->unmap_sg(dev, sg, nents, dir, attrs); 346 } 347 348 static inline dma_addr_t dma_map_resource(struct device *dev, 349 phys_addr_t phys_addr, 350 size_t size, 351 enum dma_data_direction dir, 352 unsigned long attrs) 353 { 354 const struct dma_map_ops *ops = get_dma_ops(dev); 355 dma_addr_t addr = DMA_MAPPING_ERROR; 356 357 BUG_ON(!valid_dma_direction(dir)); 358 359 /* Don't allow RAM to be mapped */ 360 if (WARN_ON_ONCE(pfn_valid(PHYS_PFN(phys_addr)))) 361 return DMA_MAPPING_ERROR; 362 363 if (dma_is_direct(ops)) 364 addr = dma_direct_map_resource(dev, phys_addr, size, dir, attrs); 365 else if (ops->map_resource) 366 addr = ops->map_resource(dev, phys_addr, size, dir, attrs); 367 368 debug_dma_map_resource(dev, phys_addr, size, dir, addr); 369 return addr; 370 } 371 372 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 373 size_t size, enum dma_data_direction dir, 374 unsigned long attrs) 375 { 376 const struct dma_map_ops *ops = get_dma_ops(dev); 377 378 BUG_ON(!valid_dma_direction(dir)); 379 if (!dma_is_direct(ops) && ops->unmap_resource) 380 ops->unmap_resource(dev, addr, size, dir, attrs); 381 debug_dma_unmap_resource(dev, addr, size, dir); 382 } 383 384 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 385 size_t size, 386 enum dma_data_direction dir) 387 { 388 const struct dma_map_ops *ops = get_dma_ops(dev); 389 390 BUG_ON(!valid_dma_direction(dir)); 391 if (dma_is_direct(ops)) 392 dma_direct_sync_single_for_cpu(dev, addr, size, dir); 393 else if (ops->sync_single_for_cpu) 394 ops->sync_single_for_cpu(dev, addr, size, dir); 395 debug_dma_sync_single_for_cpu(dev, addr, size, dir); 396 } 397 398 static inline void dma_sync_single_for_device(struct device *dev, 399 dma_addr_t addr, size_t size, 400 enum dma_data_direction dir) 401 { 402 const struct dma_map_ops *ops = get_dma_ops(dev); 403 404 BUG_ON(!valid_dma_direction(dir)); 405 if (dma_is_direct(ops)) 406 dma_direct_sync_single_for_device(dev, addr, size, dir); 407 else if (ops->sync_single_for_device) 408 ops->sync_single_for_device(dev, addr, size, dir); 409 debug_dma_sync_single_for_device(dev, addr, size, dir); 410 } 411 412 static inline void 413 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 414 int nelems, enum dma_data_direction dir) 415 { 416 const struct dma_map_ops *ops = get_dma_ops(dev); 417 418 BUG_ON(!valid_dma_direction(dir)); 419 if (dma_is_direct(ops)) 420 dma_direct_sync_sg_for_cpu(dev, sg, nelems, dir); 421 else if (ops->sync_sg_for_cpu) 422 ops->sync_sg_for_cpu(dev, sg, nelems, dir); 423 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); 424 } 425 426 static inline void 427 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 428 int nelems, enum dma_data_direction dir) 429 { 430 const struct dma_map_ops *ops = get_dma_ops(dev); 431 432 BUG_ON(!valid_dma_direction(dir)); 433 if (dma_is_direct(ops)) 434 dma_direct_sync_sg_for_device(dev, sg, nelems, dir); 435 else if (ops->sync_sg_for_device) 436 ops->sync_sg_for_device(dev, sg, nelems, dir); 437 debug_dma_sync_sg_for_device(dev, sg, nelems, dir); 438 439 } 440 441 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 442 { 443 debug_dma_mapping_error(dev, dma_addr); 444 445 if (dma_addr == DMA_MAPPING_ERROR) 446 return -ENOMEM; 447 return 0; 448 } 449 450 void *dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 451 gfp_t flag, unsigned long attrs); 452 void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 453 dma_addr_t dma_handle, unsigned long attrs); 454 void *dmam_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, 455 gfp_t gfp, unsigned long attrs); 456 void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 457 dma_addr_t dma_handle); 458 void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 459 enum dma_data_direction dir); 460 int dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, 461 void *cpu_addr, dma_addr_t dma_addr, size_t size, 462 unsigned long attrs); 463 int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 464 void *cpu_addr, dma_addr_t dma_addr, size_t size, 465 unsigned long attrs); 466 bool dma_can_mmap(struct device *dev); 467 int dma_supported(struct device *dev, u64 mask); 468 int dma_set_mask(struct device *dev, u64 mask); 469 int dma_set_coherent_mask(struct device *dev, u64 mask); 470 u64 dma_get_required_mask(struct device *dev); 471 size_t dma_max_mapping_size(struct device *dev); 472 unsigned long dma_get_merge_boundary(struct device *dev); 473 #else /* CONFIG_HAS_DMA */ 474 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 475 struct page *page, size_t offset, size_t size, 476 enum dma_data_direction dir, unsigned long attrs) 477 { 478 return DMA_MAPPING_ERROR; 479 } 480 static inline void dma_unmap_page_attrs(struct device *dev, dma_addr_t addr, 481 size_t size, enum dma_data_direction dir, unsigned long attrs) 482 { 483 } 484 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 485 int nents, enum dma_data_direction dir, unsigned long attrs) 486 { 487 return 0; 488 } 489 static inline void dma_unmap_sg_attrs(struct device *dev, 490 struct scatterlist *sg, int nents, enum dma_data_direction dir, 491 unsigned long attrs) 492 { 493 } 494 static inline dma_addr_t dma_map_resource(struct device *dev, 495 phys_addr_t phys_addr, size_t size, enum dma_data_direction dir, 496 unsigned long attrs) 497 { 498 return DMA_MAPPING_ERROR; 499 } 500 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 501 size_t size, enum dma_data_direction dir, unsigned long attrs) 502 { 503 } 504 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 505 size_t size, enum dma_data_direction dir) 506 { 507 } 508 static inline void dma_sync_single_for_device(struct device *dev, 509 dma_addr_t addr, size_t size, enum dma_data_direction dir) 510 { 511 } 512 static inline void dma_sync_sg_for_cpu(struct device *dev, 513 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 514 { 515 } 516 static inline void dma_sync_sg_for_device(struct device *dev, 517 struct scatterlist *sg, int nelems, enum dma_data_direction dir) 518 { 519 } 520 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 521 { 522 return -ENOMEM; 523 } 524 static inline void *dma_alloc_attrs(struct device *dev, size_t size, 525 dma_addr_t *dma_handle, gfp_t flag, unsigned long attrs) 526 { 527 return NULL; 528 } 529 static void dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, 530 dma_addr_t dma_handle, unsigned long attrs) 531 { 532 } 533 static inline void *dmam_alloc_attrs(struct device *dev, size_t size, 534 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs) 535 { 536 return NULL; 537 } 538 static inline void dmam_free_coherent(struct device *dev, size_t size, 539 void *vaddr, dma_addr_t dma_handle) 540 { 541 } 542 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 543 enum dma_data_direction dir) 544 { 545 } 546 static inline int dma_get_sgtable_attrs(struct device *dev, 547 struct sg_table *sgt, void *cpu_addr, dma_addr_t dma_addr, 548 size_t size, unsigned long attrs) 549 { 550 return -ENXIO; 551 } 552 static inline int dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, 553 void *cpu_addr, dma_addr_t dma_addr, size_t size, 554 unsigned long attrs) 555 { 556 return -ENXIO; 557 } 558 static inline bool dma_can_mmap(struct device *dev) 559 { 560 return false; 561 } 562 static inline int dma_supported(struct device *dev, u64 mask) 563 { 564 return 0; 565 } 566 static inline int dma_set_mask(struct device *dev, u64 mask) 567 { 568 return -EIO; 569 } 570 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 571 { 572 return -EIO; 573 } 574 static inline u64 dma_get_required_mask(struct device *dev) 575 { 576 return 0; 577 } 578 static inline size_t dma_max_mapping_size(struct device *dev) 579 { 580 return 0; 581 } 582 static inline unsigned long dma_get_merge_boundary(struct device *dev) 583 { 584 return 0; 585 } 586 #endif /* CONFIG_HAS_DMA */ 587 588 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, 589 size_t size, enum dma_data_direction dir, unsigned long attrs) 590 { 591 debug_dma_map_single(dev, ptr, size); 592 return dma_map_page_attrs(dev, virt_to_page(ptr), offset_in_page(ptr), 593 size, dir, attrs); 594 } 595 596 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, 597 size_t size, enum dma_data_direction dir, unsigned long attrs) 598 { 599 return dma_unmap_page_attrs(dev, addr, size, dir, attrs); 600 } 601 602 static inline void dma_sync_single_range_for_cpu(struct device *dev, 603 dma_addr_t addr, unsigned long offset, size_t size, 604 enum dma_data_direction dir) 605 { 606 return dma_sync_single_for_cpu(dev, addr + offset, size, dir); 607 } 608 609 static inline void dma_sync_single_range_for_device(struct device *dev, 610 dma_addr_t addr, unsigned long offset, size_t size, 611 enum dma_data_direction dir) 612 { 613 return dma_sync_single_for_device(dev, addr + offset, size, dir); 614 } 615 616 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) 617 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) 618 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) 619 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) 620 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 621 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 622 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 623 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 624 625 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, 626 void *cpu_addr, dma_addr_t dma_addr, size_t size, 627 unsigned long attrs); 628 629 struct page **dma_common_find_pages(void *cpu_addr); 630 void *dma_common_contiguous_remap(struct page *page, size_t size, 631 pgprot_t prot, const void *caller); 632 633 void *dma_common_pages_remap(struct page **pages, size_t size, 634 pgprot_t prot, const void *caller); 635 void dma_common_free_remap(void *cpu_addr, size_t size); 636 637 bool dma_in_atomic_pool(void *start, size_t size); 638 void *dma_alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags); 639 bool dma_free_from_pool(void *start, size_t size); 640 641 int 642 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, void *cpu_addr, 643 dma_addr_t dma_addr, size_t size, unsigned long attrs); 644 645 static inline void *dma_alloc_coherent(struct device *dev, size_t size, 646 dma_addr_t *dma_handle, gfp_t gfp) 647 { 648 649 return dma_alloc_attrs(dev, size, dma_handle, gfp, 650 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 651 } 652 653 static inline void dma_free_coherent(struct device *dev, size_t size, 654 void *cpu_addr, dma_addr_t dma_handle) 655 { 656 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); 657 } 658 659 660 static inline u64 dma_get_mask(struct device *dev) 661 { 662 if (dev->dma_mask && *dev->dma_mask) 663 return *dev->dma_mask; 664 return DMA_BIT_MASK(32); 665 } 666 667 /* 668 * Set both the DMA mask and the coherent DMA mask to the same thing. 669 * Note that we don't check the return value from dma_set_coherent_mask() 670 * as the DMA API guarantees that the coherent DMA mask can be set to 671 * the same or smaller than the streaming DMA mask. 672 */ 673 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 674 { 675 int rc = dma_set_mask(dev, mask); 676 if (rc == 0) 677 dma_set_coherent_mask(dev, mask); 678 return rc; 679 } 680 681 /* 682 * Similar to the above, except it deals with the case where the device 683 * does not have dev->dma_mask appropriately setup. 684 */ 685 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 686 { 687 dev->dma_mask = &dev->coherent_dma_mask; 688 return dma_set_mask_and_coherent(dev, mask); 689 } 690 691 /** 692 * dma_addressing_limited - return if the device is addressing limited 693 * @dev: device to check 694 * 695 * Return %true if the devices DMA mask is too small to address all memory in 696 * the system, else %false. Lack of addressing bits is the prime reason for 697 * bounce buffering, but might not be the only one. 698 */ 699 static inline bool dma_addressing_limited(struct device *dev) 700 { 701 return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) < 702 dma_get_required_mask(dev); 703 } 704 705 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS 706 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 707 const struct iommu_ops *iommu, bool coherent); 708 #else 709 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, 710 u64 size, const struct iommu_ops *iommu, bool coherent) 711 { 712 } 713 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */ 714 715 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS 716 void arch_teardown_dma_ops(struct device *dev); 717 #else 718 static inline void arch_teardown_dma_ops(struct device *dev) 719 { 720 } 721 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */ 722 723 static inline unsigned int dma_get_max_seg_size(struct device *dev) 724 { 725 if (dev->dma_parms && dev->dma_parms->max_segment_size) 726 return dev->dma_parms->max_segment_size; 727 return SZ_64K; 728 } 729 730 static inline int dma_set_max_seg_size(struct device *dev, unsigned int size) 731 { 732 if (dev->dma_parms) { 733 dev->dma_parms->max_segment_size = size; 734 return 0; 735 } 736 return -EIO; 737 } 738 739 static inline unsigned long dma_get_seg_boundary(struct device *dev) 740 { 741 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) 742 return dev->dma_parms->segment_boundary_mask; 743 return DMA_BIT_MASK(32); 744 } 745 746 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 747 { 748 if (dev->dma_parms) { 749 dev->dma_parms->segment_boundary_mask = mask; 750 return 0; 751 } 752 return -EIO; 753 } 754 755 static inline int dma_get_cache_alignment(void) 756 { 757 #ifdef ARCH_DMA_MINALIGN 758 return ARCH_DMA_MINALIGN; 759 #endif 760 return 1; 761 } 762 763 #ifdef CONFIG_DMA_DECLARE_COHERENT 764 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 765 dma_addr_t device_addr, size_t size); 766 #else 767 static inline int 768 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 769 dma_addr_t device_addr, size_t size) 770 { 771 return -ENOSYS; 772 } 773 #endif /* CONFIG_DMA_DECLARE_COHERENT */ 774 775 static inline void *dmam_alloc_coherent(struct device *dev, size_t size, 776 dma_addr_t *dma_handle, gfp_t gfp) 777 { 778 return dmam_alloc_attrs(dev, size, dma_handle, gfp, 779 (gfp & __GFP_NOWARN) ? DMA_ATTR_NO_WARN : 0); 780 } 781 782 static inline void *dma_alloc_wc(struct device *dev, size_t size, 783 dma_addr_t *dma_addr, gfp_t gfp) 784 { 785 unsigned long attrs = DMA_ATTR_WRITE_COMBINE; 786 787 if (gfp & __GFP_NOWARN) 788 attrs |= DMA_ATTR_NO_WARN; 789 790 return dma_alloc_attrs(dev, size, dma_addr, gfp, attrs); 791 } 792 793 static inline void dma_free_wc(struct device *dev, size_t size, 794 void *cpu_addr, dma_addr_t dma_addr) 795 { 796 return dma_free_attrs(dev, size, cpu_addr, dma_addr, 797 DMA_ATTR_WRITE_COMBINE); 798 } 799 800 static inline int dma_mmap_wc(struct device *dev, 801 struct vm_area_struct *vma, 802 void *cpu_addr, dma_addr_t dma_addr, 803 size_t size) 804 { 805 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, 806 DMA_ATTR_WRITE_COMBINE); 807 } 808 809 #ifdef CONFIG_NEED_DMA_MAP_STATE 810 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 811 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 812 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 813 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 814 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 815 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 816 #else 817 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 818 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 819 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 820 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 821 #define dma_unmap_len(PTR, LEN_NAME) (0) 822 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 823 #endif 824 825 #endif 826