1 #ifndef _LINUX_DMA_MAPPING_H 2 #define _LINUX_DMA_MAPPING_H 3 4 #include <linux/sizes.h> 5 #include <linux/string.h> 6 #include <linux/device.h> 7 #include <linux/err.h> 8 #include <linux/dma-debug.h> 9 #include <linux/dma-direction.h> 10 #include <linux/scatterlist.h> 11 #include <linux/kmemcheck.h> 12 #include <linux/bug.h> 13 #include <linux/mem_encrypt.h> 14 15 /** 16 * List of possible attributes associated with a DMA mapping. The semantics 17 * of each attribute should be defined in Documentation/DMA-attributes.txt. 18 * 19 * DMA_ATTR_WRITE_BARRIER: DMA to a memory region with this attribute 20 * forces all pending DMA writes to complete. 21 */ 22 #define DMA_ATTR_WRITE_BARRIER (1UL << 0) 23 /* 24 * DMA_ATTR_WEAK_ORDERING: Specifies that reads and writes to the mapping 25 * may be weakly ordered, that is that reads and writes may pass each other. 26 */ 27 #define DMA_ATTR_WEAK_ORDERING (1UL << 1) 28 /* 29 * DMA_ATTR_WRITE_COMBINE: Specifies that writes to the mapping may be 30 * buffered to improve performance. 31 */ 32 #define DMA_ATTR_WRITE_COMBINE (1UL << 2) 33 /* 34 * DMA_ATTR_NON_CONSISTENT: Lets the platform to choose to return either 35 * consistent or non-consistent memory as it sees fit. 36 */ 37 #define DMA_ATTR_NON_CONSISTENT (1UL << 3) 38 /* 39 * DMA_ATTR_NO_KERNEL_MAPPING: Lets the platform to avoid creating a kernel 40 * virtual mapping for the allocated buffer. 41 */ 42 #define DMA_ATTR_NO_KERNEL_MAPPING (1UL << 4) 43 /* 44 * DMA_ATTR_SKIP_CPU_SYNC: Allows platform code to skip synchronization of 45 * the CPU cache for the given buffer assuming that it has been already 46 * transferred to 'device' domain. 47 */ 48 #define DMA_ATTR_SKIP_CPU_SYNC (1UL << 5) 49 /* 50 * DMA_ATTR_FORCE_CONTIGUOUS: Forces contiguous allocation of the buffer 51 * in physical memory. 52 */ 53 #define DMA_ATTR_FORCE_CONTIGUOUS (1UL << 6) 54 /* 55 * DMA_ATTR_ALLOC_SINGLE_PAGES: This is a hint to the DMA-mapping subsystem 56 * that it's probably not worth the time to try to allocate memory to in a way 57 * that gives better TLB efficiency. 58 */ 59 #define DMA_ATTR_ALLOC_SINGLE_PAGES (1UL << 7) 60 /* 61 * DMA_ATTR_NO_WARN: This tells the DMA-mapping subsystem to suppress 62 * allocation failure reports (similarly to __GFP_NOWARN). 63 */ 64 #define DMA_ATTR_NO_WARN (1UL << 8) 65 66 /* 67 * DMA_ATTR_PRIVILEGED: used to indicate that the buffer is fully 68 * accessible at an elevated privilege level (and ideally inaccessible or 69 * at least read-only at lesser-privileged levels). 70 */ 71 #define DMA_ATTR_PRIVILEGED (1UL << 9) 72 73 /* 74 * A dma_addr_t can hold any valid DMA or bus address for the platform. 75 * It can be given to a device to use as a DMA source or target. A CPU cannot 76 * reference a dma_addr_t directly because there may be translation between 77 * its physical address space and the bus address space. 78 */ 79 struct dma_map_ops { 80 void* (*alloc)(struct device *dev, size_t size, 81 dma_addr_t *dma_handle, gfp_t gfp, 82 unsigned long attrs); 83 void (*free)(struct device *dev, size_t size, 84 void *vaddr, dma_addr_t dma_handle, 85 unsigned long attrs); 86 int (*mmap)(struct device *, struct vm_area_struct *, 87 void *, dma_addr_t, size_t, 88 unsigned long attrs); 89 90 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, 91 dma_addr_t, size_t, unsigned long attrs); 92 93 dma_addr_t (*map_page)(struct device *dev, struct page *page, 94 unsigned long offset, size_t size, 95 enum dma_data_direction dir, 96 unsigned long attrs); 97 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 98 size_t size, enum dma_data_direction dir, 99 unsigned long attrs); 100 /* 101 * map_sg returns 0 on error and a value > 0 on success. 102 * It should never return a value < 0. 103 */ 104 int (*map_sg)(struct device *dev, struct scatterlist *sg, 105 int nents, enum dma_data_direction dir, 106 unsigned long attrs); 107 void (*unmap_sg)(struct device *dev, 108 struct scatterlist *sg, int nents, 109 enum dma_data_direction dir, 110 unsigned long attrs); 111 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, 112 size_t size, enum dma_data_direction dir, 113 unsigned long attrs); 114 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, 115 size_t size, enum dma_data_direction dir, 116 unsigned long attrs); 117 void (*sync_single_for_cpu)(struct device *dev, 118 dma_addr_t dma_handle, size_t size, 119 enum dma_data_direction dir); 120 void (*sync_single_for_device)(struct device *dev, 121 dma_addr_t dma_handle, size_t size, 122 enum dma_data_direction dir); 123 void (*sync_sg_for_cpu)(struct device *dev, 124 struct scatterlist *sg, int nents, 125 enum dma_data_direction dir); 126 void (*sync_sg_for_device)(struct device *dev, 127 struct scatterlist *sg, int nents, 128 enum dma_data_direction dir); 129 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); 130 int (*dma_supported)(struct device *dev, u64 mask); 131 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK 132 u64 (*get_required_mask)(struct device *dev); 133 #endif 134 int is_phys; 135 }; 136 137 extern const struct dma_map_ops dma_noop_ops; 138 extern const struct dma_map_ops dma_virt_ops; 139 140 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 141 142 #define DMA_MASK_NONE 0x0ULL 143 144 static inline int valid_dma_direction(int dma_direction) 145 { 146 return ((dma_direction == DMA_BIDIRECTIONAL) || 147 (dma_direction == DMA_TO_DEVICE) || 148 (dma_direction == DMA_FROM_DEVICE)); 149 } 150 151 static inline int is_device_dma_capable(struct device *dev) 152 { 153 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; 154 } 155 156 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT 157 /* 158 * These three functions are only for dma allocator. 159 * Don't use them in device drivers. 160 */ 161 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, 162 dma_addr_t *dma_handle, void **ret); 163 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); 164 165 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, 166 void *cpu_addr, size_t size, int *ret); 167 168 void *dma_alloc_from_global_coherent(ssize_t size, dma_addr_t *dma_handle); 169 int dma_release_from_global_coherent(int order, void *vaddr); 170 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, 171 size_t size, int *ret); 172 173 #else 174 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) 175 #define dma_release_from_dev_coherent(dev, order, vaddr) (0) 176 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) 177 178 static inline void *dma_alloc_from_global_coherent(ssize_t size, 179 dma_addr_t *dma_handle) 180 { 181 return NULL; 182 } 183 184 static inline int dma_release_from_global_coherent(int order, void *vaddr) 185 { 186 return 0; 187 } 188 189 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, 190 void *cpu_addr, size_t size, 191 int *ret) 192 { 193 return 0; 194 } 195 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ 196 197 #ifdef CONFIG_HAS_DMA 198 #include <asm/dma-mapping.h> 199 static inline const struct dma_map_ops *get_dma_ops(struct device *dev) 200 { 201 if (dev && dev->dma_ops) 202 return dev->dma_ops; 203 return get_arch_dma_ops(dev ? dev->bus : NULL); 204 } 205 206 static inline void set_dma_ops(struct device *dev, 207 const struct dma_map_ops *dma_ops) 208 { 209 dev->dma_ops = dma_ops; 210 } 211 #else 212 /* 213 * Define the dma api to allow compilation but not linking of 214 * dma dependent code. Code that depends on the dma-mapping 215 * API needs to set 'depends on HAS_DMA' in its Kconfig 216 */ 217 extern const struct dma_map_ops bad_dma_ops; 218 static inline const struct dma_map_ops *get_dma_ops(struct device *dev) 219 { 220 return &bad_dma_ops; 221 } 222 #endif 223 224 static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr, 225 size_t size, 226 enum dma_data_direction dir, 227 unsigned long attrs) 228 { 229 const struct dma_map_ops *ops = get_dma_ops(dev); 230 dma_addr_t addr; 231 232 kmemcheck_mark_initialized(ptr, size); 233 BUG_ON(!valid_dma_direction(dir)); 234 addr = ops->map_page(dev, virt_to_page(ptr), 235 offset_in_page(ptr), size, 236 dir, attrs); 237 debug_dma_map_page(dev, virt_to_page(ptr), 238 offset_in_page(ptr), size, 239 dir, addr, true); 240 return addr; 241 } 242 243 static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr, 244 size_t size, 245 enum dma_data_direction dir, 246 unsigned long attrs) 247 { 248 const struct dma_map_ops *ops = get_dma_ops(dev); 249 250 BUG_ON(!valid_dma_direction(dir)); 251 if (ops->unmap_page) 252 ops->unmap_page(dev, addr, size, dir, attrs); 253 debug_dma_unmap_page(dev, addr, size, dir, true); 254 } 255 256 /* 257 * dma_maps_sg_attrs returns 0 on error and > 0 on success. 258 * It should never return a value < 0. 259 */ 260 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg, 261 int nents, enum dma_data_direction dir, 262 unsigned long attrs) 263 { 264 const struct dma_map_ops *ops = get_dma_ops(dev); 265 int i, ents; 266 struct scatterlist *s; 267 268 for_each_sg(sg, s, nents, i) 269 kmemcheck_mark_initialized(sg_virt(s), s->length); 270 BUG_ON(!valid_dma_direction(dir)); 271 ents = ops->map_sg(dev, sg, nents, dir, attrs); 272 BUG_ON(ents < 0); 273 debug_dma_map_sg(dev, sg, nents, ents, dir); 274 275 return ents; 276 } 277 278 static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg, 279 int nents, enum dma_data_direction dir, 280 unsigned long attrs) 281 { 282 const struct dma_map_ops *ops = get_dma_ops(dev); 283 284 BUG_ON(!valid_dma_direction(dir)); 285 debug_dma_unmap_sg(dev, sg, nents, dir); 286 if (ops->unmap_sg) 287 ops->unmap_sg(dev, sg, nents, dir, attrs); 288 } 289 290 static inline dma_addr_t dma_map_page_attrs(struct device *dev, 291 struct page *page, 292 size_t offset, size_t size, 293 enum dma_data_direction dir, 294 unsigned long attrs) 295 { 296 const struct dma_map_ops *ops = get_dma_ops(dev); 297 dma_addr_t addr; 298 299 kmemcheck_mark_initialized(page_address(page) + offset, size); 300 BUG_ON(!valid_dma_direction(dir)); 301 addr = ops->map_page(dev, page, offset, size, dir, attrs); 302 debug_dma_map_page(dev, page, offset, size, dir, addr, false); 303 304 return addr; 305 } 306 307 static inline void dma_unmap_page_attrs(struct device *dev, 308 dma_addr_t addr, size_t size, 309 enum dma_data_direction dir, 310 unsigned long attrs) 311 { 312 const struct dma_map_ops *ops = get_dma_ops(dev); 313 314 BUG_ON(!valid_dma_direction(dir)); 315 if (ops->unmap_page) 316 ops->unmap_page(dev, addr, size, dir, attrs); 317 debug_dma_unmap_page(dev, addr, size, dir, false); 318 } 319 320 static inline dma_addr_t dma_map_resource(struct device *dev, 321 phys_addr_t phys_addr, 322 size_t size, 323 enum dma_data_direction dir, 324 unsigned long attrs) 325 { 326 const struct dma_map_ops *ops = get_dma_ops(dev); 327 dma_addr_t addr; 328 329 BUG_ON(!valid_dma_direction(dir)); 330 331 /* Don't allow RAM to be mapped */ 332 BUG_ON(pfn_valid(PHYS_PFN(phys_addr))); 333 334 addr = phys_addr; 335 if (ops->map_resource) 336 addr = ops->map_resource(dev, phys_addr, size, dir, attrs); 337 338 debug_dma_map_resource(dev, phys_addr, size, dir, addr); 339 340 return addr; 341 } 342 343 static inline void dma_unmap_resource(struct device *dev, dma_addr_t addr, 344 size_t size, enum dma_data_direction dir, 345 unsigned long attrs) 346 { 347 const struct dma_map_ops *ops = get_dma_ops(dev); 348 349 BUG_ON(!valid_dma_direction(dir)); 350 if (ops->unmap_resource) 351 ops->unmap_resource(dev, addr, size, dir, attrs); 352 debug_dma_unmap_resource(dev, addr, size, dir); 353 } 354 355 static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr, 356 size_t size, 357 enum dma_data_direction dir) 358 { 359 const struct dma_map_ops *ops = get_dma_ops(dev); 360 361 BUG_ON(!valid_dma_direction(dir)); 362 if (ops->sync_single_for_cpu) 363 ops->sync_single_for_cpu(dev, addr, size, dir); 364 debug_dma_sync_single_for_cpu(dev, addr, size, dir); 365 } 366 367 static inline void dma_sync_single_for_device(struct device *dev, 368 dma_addr_t addr, size_t size, 369 enum dma_data_direction dir) 370 { 371 const struct dma_map_ops *ops = get_dma_ops(dev); 372 373 BUG_ON(!valid_dma_direction(dir)); 374 if (ops->sync_single_for_device) 375 ops->sync_single_for_device(dev, addr, size, dir); 376 debug_dma_sync_single_for_device(dev, addr, size, dir); 377 } 378 379 static inline void dma_sync_single_range_for_cpu(struct device *dev, 380 dma_addr_t addr, 381 unsigned long offset, 382 size_t size, 383 enum dma_data_direction dir) 384 { 385 const struct dma_map_ops *ops = get_dma_ops(dev); 386 387 BUG_ON(!valid_dma_direction(dir)); 388 if (ops->sync_single_for_cpu) 389 ops->sync_single_for_cpu(dev, addr + offset, size, dir); 390 debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir); 391 } 392 393 static inline void dma_sync_single_range_for_device(struct device *dev, 394 dma_addr_t addr, 395 unsigned long offset, 396 size_t size, 397 enum dma_data_direction dir) 398 { 399 const struct dma_map_ops *ops = get_dma_ops(dev); 400 401 BUG_ON(!valid_dma_direction(dir)); 402 if (ops->sync_single_for_device) 403 ops->sync_single_for_device(dev, addr + offset, size, dir); 404 debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir); 405 } 406 407 static inline void 408 dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, 409 int nelems, enum dma_data_direction dir) 410 { 411 const struct dma_map_ops *ops = get_dma_ops(dev); 412 413 BUG_ON(!valid_dma_direction(dir)); 414 if (ops->sync_sg_for_cpu) 415 ops->sync_sg_for_cpu(dev, sg, nelems, dir); 416 debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir); 417 } 418 419 static inline void 420 dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, 421 int nelems, enum dma_data_direction dir) 422 { 423 const struct dma_map_ops *ops = get_dma_ops(dev); 424 425 BUG_ON(!valid_dma_direction(dir)); 426 if (ops->sync_sg_for_device) 427 ops->sync_sg_for_device(dev, sg, nelems, dir); 428 debug_dma_sync_sg_for_device(dev, sg, nelems, dir); 429 430 } 431 432 #define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, 0) 433 #define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, 0) 434 #define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, 0) 435 #define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, 0) 436 #define dma_map_page(d, p, o, s, r) dma_map_page_attrs(d, p, o, s, r, 0) 437 #define dma_unmap_page(d, a, s, r) dma_unmap_page_attrs(d, a, s, r, 0) 438 439 extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, 440 void *cpu_addr, dma_addr_t dma_addr, size_t size); 441 442 void *dma_common_contiguous_remap(struct page *page, size_t size, 443 unsigned long vm_flags, 444 pgprot_t prot, const void *caller); 445 446 void *dma_common_pages_remap(struct page **pages, size_t size, 447 unsigned long vm_flags, pgprot_t prot, 448 const void *caller); 449 void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags); 450 451 /** 452 * dma_mmap_attrs - map a coherent DMA allocation into user space 453 * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices 454 * @vma: vm_area_struct describing requested user mapping 455 * @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs 456 * @handle: device-view address returned from dma_alloc_attrs 457 * @size: size of memory originally requested in dma_alloc_attrs 458 * @attrs: attributes of mapping properties requested in dma_alloc_attrs 459 * 460 * Map a coherent DMA buffer previously allocated by dma_alloc_attrs 461 * into user space. The coherent DMA buffer must not be freed by the 462 * driver until the user space mapping has been released. 463 */ 464 static inline int 465 dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr, 466 dma_addr_t dma_addr, size_t size, unsigned long attrs) 467 { 468 const struct dma_map_ops *ops = get_dma_ops(dev); 469 BUG_ON(!ops); 470 if (ops->mmap) 471 return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs); 472 return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size); 473 } 474 475 #define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, 0) 476 477 int 478 dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, 479 void *cpu_addr, dma_addr_t dma_addr, size_t size); 480 481 static inline int 482 dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr, 483 dma_addr_t dma_addr, size_t size, 484 unsigned long attrs) 485 { 486 const struct dma_map_ops *ops = get_dma_ops(dev); 487 BUG_ON(!ops); 488 if (ops->get_sgtable) 489 return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size, 490 attrs); 491 return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size); 492 } 493 494 #define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, 0) 495 496 #ifndef arch_dma_alloc_attrs 497 #define arch_dma_alloc_attrs(dev, flag) (true) 498 #endif 499 500 static inline void *dma_alloc_attrs(struct device *dev, size_t size, 501 dma_addr_t *dma_handle, gfp_t flag, 502 unsigned long attrs) 503 { 504 const struct dma_map_ops *ops = get_dma_ops(dev); 505 void *cpu_addr; 506 507 BUG_ON(!ops); 508 509 if (dma_alloc_from_dev_coherent(dev, size, dma_handle, &cpu_addr)) 510 return cpu_addr; 511 512 if (!arch_dma_alloc_attrs(&dev, &flag)) 513 return NULL; 514 if (!ops->alloc) 515 return NULL; 516 517 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); 518 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr); 519 return cpu_addr; 520 } 521 522 static inline void dma_free_attrs(struct device *dev, size_t size, 523 void *cpu_addr, dma_addr_t dma_handle, 524 unsigned long attrs) 525 { 526 const struct dma_map_ops *ops = get_dma_ops(dev); 527 528 BUG_ON(!ops); 529 WARN_ON(irqs_disabled()); 530 531 if (dma_release_from_dev_coherent(dev, get_order(size), cpu_addr)) 532 return; 533 534 if (!ops->free || !cpu_addr) 535 return; 536 537 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); 538 ops->free(dev, size, cpu_addr, dma_handle, attrs); 539 } 540 541 static inline void *dma_alloc_coherent(struct device *dev, size_t size, 542 dma_addr_t *dma_handle, gfp_t flag) 543 { 544 return dma_alloc_attrs(dev, size, dma_handle, flag, 0); 545 } 546 547 static inline void dma_free_coherent(struct device *dev, size_t size, 548 void *cpu_addr, dma_addr_t dma_handle) 549 { 550 return dma_free_attrs(dev, size, cpu_addr, dma_handle, 0); 551 } 552 553 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr) 554 { 555 const struct dma_map_ops *ops = get_dma_ops(dev); 556 557 debug_dma_mapping_error(dev, dma_addr); 558 if (ops->mapping_error) 559 return ops->mapping_error(dev, dma_addr); 560 return 0; 561 } 562 563 static inline void dma_check_mask(struct device *dev, u64 mask) 564 { 565 if (sme_active() && (mask < (((u64)sme_get_me_mask() << 1) - 1))) 566 dev_warn(dev, "SME is active, device will require DMA bounce buffers\n"); 567 } 568 569 static inline int dma_supported(struct device *dev, u64 mask) 570 { 571 const struct dma_map_ops *ops = get_dma_ops(dev); 572 573 if (!ops) 574 return 0; 575 if (!ops->dma_supported) 576 return 1; 577 return ops->dma_supported(dev, mask); 578 } 579 580 #ifndef HAVE_ARCH_DMA_SET_MASK 581 static inline int dma_set_mask(struct device *dev, u64 mask) 582 { 583 if (!dev->dma_mask || !dma_supported(dev, mask)) 584 return -EIO; 585 586 dma_check_mask(dev, mask); 587 588 *dev->dma_mask = mask; 589 return 0; 590 } 591 #endif 592 593 static inline u64 dma_get_mask(struct device *dev) 594 { 595 if (dev && dev->dma_mask && *dev->dma_mask) 596 return *dev->dma_mask; 597 return DMA_BIT_MASK(32); 598 } 599 600 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK 601 int dma_set_coherent_mask(struct device *dev, u64 mask); 602 #else 603 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 604 { 605 if (!dma_supported(dev, mask)) 606 return -EIO; 607 608 dma_check_mask(dev, mask); 609 610 dev->coherent_dma_mask = mask; 611 return 0; 612 } 613 #endif 614 615 /* 616 * Set both the DMA mask and the coherent DMA mask to the same thing. 617 * Note that we don't check the return value from dma_set_coherent_mask() 618 * as the DMA API guarantees that the coherent DMA mask can be set to 619 * the same or smaller than the streaming DMA mask. 620 */ 621 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 622 { 623 int rc = dma_set_mask(dev, mask); 624 if (rc == 0) 625 dma_set_coherent_mask(dev, mask); 626 return rc; 627 } 628 629 /* 630 * Similar to the above, except it deals with the case where the device 631 * does not have dev->dma_mask appropriately setup. 632 */ 633 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 634 { 635 dev->dma_mask = &dev->coherent_dma_mask; 636 return dma_set_mask_and_coherent(dev, mask); 637 } 638 639 extern u64 dma_get_required_mask(struct device *dev); 640 641 #ifndef arch_setup_dma_ops 642 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, 643 u64 size, const struct iommu_ops *iommu, 644 bool coherent) { } 645 #endif 646 647 #ifndef arch_teardown_dma_ops 648 static inline void arch_teardown_dma_ops(struct device *dev) { } 649 #endif 650 651 static inline unsigned int dma_get_max_seg_size(struct device *dev) 652 { 653 if (dev->dma_parms && dev->dma_parms->max_segment_size) 654 return dev->dma_parms->max_segment_size; 655 return SZ_64K; 656 } 657 658 static inline unsigned int dma_set_max_seg_size(struct device *dev, 659 unsigned int size) 660 { 661 if (dev->dma_parms) { 662 dev->dma_parms->max_segment_size = size; 663 return 0; 664 } 665 return -EIO; 666 } 667 668 static inline unsigned long dma_get_seg_boundary(struct device *dev) 669 { 670 if (dev->dma_parms && dev->dma_parms->segment_boundary_mask) 671 return dev->dma_parms->segment_boundary_mask; 672 return DMA_BIT_MASK(32); 673 } 674 675 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 676 { 677 if (dev->dma_parms) { 678 dev->dma_parms->segment_boundary_mask = mask; 679 return 0; 680 } 681 return -EIO; 682 } 683 684 #ifndef dma_max_pfn 685 static inline unsigned long dma_max_pfn(struct device *dev) 686 { 687 return *dev->dma_mask >> PAGE_SHIFT; 688 } 689 #endif 690 691 static inline void *dma_zalloc_coherent(struct device *dev, size_t size, 692 dma_addr_t *dma_handle, gfp_t flag) 693 { 694 void *ret = dma_alloc_coherent(dev, size, dma_handle, 695 flag | __GFP_ZERO); 696 return ret; 697 } 698 699 #ifdef CONFIG_HAS_DMA 700 static inline int dma_get_cache_alignment(void) 701 { 702 #ifdef ARCH_DMA_MINALIGN 703 return ARCH_DMA_MINALIGN; 704 #endif 705 return 1; 706 } 707 #endif 708 709 /* flags for the coherent memory api */ 710 #define DMA_MEMORY_EXCLUSIVE 0x01 711 712 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT 713 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 714 dma_addr_t device_addr, size_t size, int flags); 715 void dma_release_declared_memory(struct device *dev); 716 void *dma_mark_declared_memory_occupied(struct device *dev, 717 dma_addr_t device_addr, size_t size); 718 #else 719 static inline int 720 dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 721 dma_addr_t device_addr, size_t size, int flags) 722 { 723 return -ENOSYS; 724 } 725 726 static inline void 727 dma_release_declared_memory(struct device *dev) 728 { 729 } 730 731 static inline void * 732 dma_mark_declared_memory_occupied(struct device *dev, 733 dma_addr_t device_addr, size_t size) 734 { 735 return ERR_PTR(-EBUSY); 736 } 737 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ 738 739 #ifdef CONFIG_HAS_DMA 740 int dma_configure(struct device *dev); 741 void dma_deconfigure(struct device *dev); 742 #else 743 static inline int dma_configure(struct device *dev) 744 { 745 return 0; 746 } 747 748 static inline void dma_deconfigure(struct device *dev) {} 749 #endif 750 751 /* 752 * Managed DMA API 753 */ 754 extern void *dmam_alloc_coherent(struct device *dev, size_t size, 755 dma_addr_t *dma_handle, gfp_t gfp); 756 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 757 dma_addr_t dma_handle); 758 extern void *dmam_alloc_attrs(struct device *dev, size_t size, 759 dma_addr_t *dma_handle, gfp_t gfp, 760 unsigned long attrs); 761 #ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT 762 extern int dmam_declare_coherent_memory(struct device *dev, 763 phys_addr_t phys_addr, 764 dma_addr_t device_addr, size_t size, 765 int flags); 766 extern void dmam_release_declared_memory(struct device *dev); 767 #else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ 768 static inline int dmam_declare_coherent_memory(struct device *dev, 769 phys_addr_t phys_addr, dma_addr_t device_addr, 770 size_t size, gfp_t gfp) 771 { 772 return 0; 773 } 774 775 static inline void dmam_release_declared_memory(struct device *dev) 776 { 777 } 778 #endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */ 779 780 static inline void *dma_alloc_wc(struct device *dev, size_t size, 781 dma_addr_t *dma_addr, gfp_t gfp) 782 { 783 return dma_alloc_attrs(dev, size, dma_addr, gfp, 784 DMA_ATTR_WRITE_COMBINE); 785 } 786 #ifndef dma_alloc_writecombine 787 #define dma_alloc_writecombine dma_alloc_wc 788 #endif 789 790 static inline void dma_free_wc(struct device *dev, size_t size, 791 void *cpu_addr, dma_addr_t dma_addr) 792 { 793 return dma_free_attrs(dev, size, cpu_addr, dma_addr, 794 DMA_ATTR_WRITE_COMBINE); 795 } 796 #ifndef dma_free_writecombine 797 #define dma_free_writecombine dma_free_wc 798 #endif 799 800 static inline int dma_mmap_wc(struct device *dev, 801 struct vm_area_struct *vma, 802 void *cpu_addr, dma_addr_t dma_addr, 803 size_t size) 804 { 805 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, 806 DMA_ATTR_WRITE_COMBINE); 807 } 808 #ifndef dma_mmap_writecombine 809 #define dma_mmap_writecombine dma_mmap_wc 810 #endif 811 812 #if defined(CONFIG_NEED_DMA_MAP_STATE) || defined(CONFIG_DMA_API_DEBUG) 813 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 814 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 815 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 816 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 817 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 818 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 819 #else 820 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 821 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 822 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 823 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 824 #define dma_unmap_len(PTR, LEN_NAME) (0) 825 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 826 #endif 827 828 #endif 829