1 #ifndef _LINUX_DMA_MAPPING_H 2 #define _LINUX_DMA_MAPPING_H 3 4 #include <linux/string.h> 5 #include <linux/device.h> 6 #include <linux/err.h> 7 #include <linux/dma-attrs.h> 8 #include <linux/dma-direction.h> 9 #include <linux/scatterlist.h> 10 11 struct dma_map_ops { 12 void* (*alloc)(struct device *dev, size_t size, 13 dma_addr_t *dma_handle, gfp_t gfp, 14 struct dma_attrs *attrs); 15 void (*free)(struct device *dev, size_t size, 16 void *vaddr, dma_addr_t dma_handle, 17 struct dma_attrs *attrs); 18 int (*mmap)(struct device *, struct vm_area_struct *, 19 void *, dma_addr_t, size_t, struct dma_attrs *attrs); 20 21 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *, 22 dma_addr_t, size_t, struct dma_attrs *attrs); 23 24 dma_addr_t (*map_page)(struct device *dev, struct page *page, 25 unsigned long offset, size_t size, 26 enum dma_data_direction dir, 27 struct dma_attrs *attrs); 28 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 29 size_t size, enum dma_data_direction dir, 30 struct dma_attrs *attrs); 31 int (*map_sg)(struct device *dev, struct scatterlist *sg, 32 int nents, enum dma_data_direction dir, 33 struct dma_attrs *attrs); 34 void (*unmap_sg)(struct device *dev, 35 struct scatterlist *sg, int nents, 36 enum dma_data_direction dir, 37 struct dma_attrs *attrs); 38 void (*sync_single_for_cpu)(struct device *dev, 39 dma_addr_t dma_handle, size_t size, 40 enum dma_data_direction dir); 41 void (*sync_single_for_device)(struct device *dev, 42 dma_addr_t dma_handle, size_t size, 43 enum dma_data_direction dir); 44 void (*sync_sg_for_cpu)(struct device *dev, 45 struct scatterlist *sg, int nents, 46 enum dma_data_direction dir); 47 void (*sync_sg_for_device)(struct device *dev, 48 struct scatterlist *sg, int nents, 49 enum dma_data_direction dir); 50 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); 51 int (*dma_supported)(struct device *dev, u64 mask); 52 int (*set_dma_mask)(struct device *dev, u64 mask); 53 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK 54 u64 (*get_required_mask)(struct device *dev); 55 #endif 56 int is_phys; 57 }; 58 59 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 60 61 #define DMA_MASK_NONE 0x0ULL 62 63 static inline int valid_dma_direction(int dma_direction) 64 { 65 return ((dma_direction == DMA_BIDIRECTIONAL) || 66 (dma_direction == DMA_TO_DEVICE) || 67 (dma_direction == DMA_FROM_DEVICE)); 68 } 69 70 static inline int is_device_dma_capable(struct device *dev) 71 { 72 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; 73 } 74 75 #ifdef CONFIG_HAS_DMA 76 #include <asm/dma-mapping.h> 77 #else 78 #include <asm-generic/dma-mapping-broken.h> 79 #endif 80 81 static inline u64 dma_get_mask(struct device *dev) 82 { 83 if (dev && dev->dma_mask && *dev->dma_mask) 84 return *dev->dma_mask; 85 return DMA_BIT_MASK(32); 86 } 87 88 #ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK 89 int dma_set_coherent_mask(struct device *dev, u64 mask); 90 #else 91 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 92 { 93 if (!dma_supported(dev, mask)) 94 return -EIO; 95 dev->coherent_dma_mask = mask; 96 return 0; 97 } 98 #endif 99 100 /* 101 * Set both the DMA mask and the coherent DMA mask to the same thing. 102 * Note that we don't check the return value from dma_set_coherent_mask() 103 * as the DMA API guarantees that the coherent DMA mask can be set to 104 * the same or smaller than the streaming DMA mask. 105 */ 106 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) 107 { 108 int rc = dma_set_mask(dev, mask); 109 if (rc == 0) 110 dma_set_coherent_mask(dev, mask); 111 return rc; 112 } 113 114 /* 115 * Similar to the above, except it deals with the case where the device 116 * does not have dev->dma_mask appropriately setup. 117 */ 118 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) 119 { 120 dev->dma_mask = &dev->coherent_dma_mask; 121 return dma_set_mask_and_coherent(dev, mask); 122 } 123 124 extern u64 dma_get_required_mask(struct device *dev); 125 126 static inline unsigned int dma_get_max_seg_size(struct device *dev) 127 { 128 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536; 129 } 130 131 static inline unsigned int dma_set_max_seg_size(struct device *dev, 132 unsigned int size) 133 { 134 if (dev->dma_parms) { 135 dev->dma_parms->max_segment_size = size; 136 return 0; 137 } else 138 return -EIO; 139 } 140 141 static inline unsigned long dma_get_seg_boundary(struct device *dev) 142 { 143 return dev->dma_parms ? 144 dev->dma_parms->segment_boundary_mask : 0xffffffff; 145 } 146 147 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 148 { 149 if (dev->dma_parms) { 150 dev->dma_parms->segment_boundary_mask = mask; 151 return 0; 152 } else 153 return -EIO; 154 } 155 156 #ifndef dma_max_pfn 157 static inline unsigned long dma_max_pfn(struct device *dev) 158 { 159 return *dev->dma_mask >> PAGE_SHIFT; 160 } 161 #endif 162 163 static inline void *dma_zalloc_coherent(struct device *dev, size_t size, 164 dma_addr_t *dma_handle, gfp_t flag) 165 { 166 void *ret = dma_alloc_coherent(dev, size, dma_handle, 167 flag | __GFP_ZERO); 168 return ret; 169 } 170 171 #ifdef CONFIG_HAS_DMA 172 static inline int dma_get_cache_alignment(void) 173 { 174 #ifdef ARCH_DMA_MINALIGN 175 return ARCH_DMA_MINALIGN; 176 #endif 177 return 1; 178 } 179 #endif 180 181 /* flags for the coherent memory api */ 182 #define DMA_MEMORY_MAP 0x01 183 #define DMA_MEMORY_IO 0x02 184 #define DMA_MEMORY_INCLUDES_CHILDREN 0x04 185 #define DMA_MEMORY_EXCLUSIVE 0x08 186 187 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 188 static inline int 189 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 190 dma_addr_t device_addr, size_t size, int flags) 191 { 192 return 0; 193 } 194 195 static inline void 196 dma_release_declared_memory(struct device *dev) 197 { 198 } 199 200 static inline void * 201 dma_mark_declared_memory_occupied(struct device *dev, 202 dma_addr_t device_addr, size_t size) 203 { 204 return ERR_PTR(-EBUSY); 205 } 206 #endif 207 208 /* 209 * Managed DMA API 210 */ 211 extern void *dmam_alloc_coherent(struct device *dev, size_t size, 212 dma_addr_t *dma_handle, gfp_t gfp); 213 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 214 dma_addr_t dma_handle); 215 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size, 216 dma_addr_t *dma_handle, gfp_t gfp); 217 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr, 218 dma_addr_t dma_handle); 219 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 220 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 221 dma_addr_t device_addr, size_t size, 222 int flags); 223 extern void dmam_release_declared_memory(struct device *dev); 224 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ 225 static inline int dmam_declare_coherent_memory(struct device *dev, 226 dma_addr_t bus_addr, dma_addr_t device_addr, 227 size_t size, gfp_t gfp) 228 { 229 return 0; 230 } 231 232 static inline void dmam_release_declared_memory(struct device *dev) 233 { 234 } 235 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ 236 237 #ifndef CONFIG_HAVE_DMA_ATTRS 238 struct dma_attrs; 239 240 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \ 241 dma_map_single(dev, cpu_addr, size, dir) 242 243 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \ 244 dma_unmap_single(dev, dma_addr, size, dir) 245 246 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \ 247 dma_map_sg(dev, sgl, nents, dir) 248 249 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \ 250 dma_unmap_sg(dev, sgl, nents, dir) 251 252 #endif /* CONFIG_HAVE_DMA_ATTRS */ 253 254 #ifdef CONFIG_NEED_DMA_MAP_STATE 255 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 256 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 257 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 258 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 259 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 260 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 261 #else 262 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 263 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 264 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 265 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 266 #define dma_unmap_len(PTR, LEN_NAME) (0) 267 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 268 #endif 269 270 #endif 271