1 #ifndef _LINUX_DMA_MAPPING_H 2 #define _LINUX_DMA_MAPPING_H 3 4 #include <linux/string.h> 5 #include <linux/device.h> 6 #include <linux/err.h> 7 #include <linux/dma-attrs.h> 8 #include <linux/dma-direction.h> 9 #include <linux/scatterlist.h> 10 11 struct dma_map_ops { 12 void* (*alloc_coherent)(struct device *dev, size_t size, 13 dma_addr_t *dma_handle, gfp_t gfp); 14 void (*free_coherent)(struct device *dev, size_t size, 15 void *vaddr, dma_addr_t dma_handle); 16 dma_addr_t (*map_page)(struct device *dev, struct page *page, 17 unsigned long offset, size_t size, 18 enum dma_data_direction dir, 19 struct dma_attrs *attrs); 20 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 21 size_t size, enum dma_data_direction dir, 22 struct dma_attrs *attrs); 23 int (*map_sg)(struct device *dev, struct scatterlist *sg, 24 int nents, enum dma_data_direction dir, 25 struct dma_attrs *attrs); 26 void (*unmap_sg)(struct device *dev, 27 struct scatterlist *sg, int nents, 28 enum dma_data_direction dir, 29 struct dma_attrs *attrs); 30 void (*sync_single_for_cpu)(struct device *dev, 31 dma_addr_t dma_handle, size_t size, 32 enum dma_data_direction dir); 33 void (*sync_single_for_device)(struct device *dev, 34 dma_addr_t dma_handle, size_t size, 35 enum dma_data_direction dir); 36 void (*sync_sg_for_cpu)(struct device *dev, 37 struct scatterlist *sg, int nents, 38 enum dma_data_direction dir); 39 void (*sync_sg_for_device)(struct device *dev, 40 struct scatterlist *sg, int nents, 41 enum dma_data_direction dir); 42 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); 43 int (*dma_supported)(struct device *dev, u64 mask); 44 int (*set_dma_mask)(struct device *dev, u64 mask); 45 #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK 46 u64 (*get_required_mask)(struct device *dev); 47 #endif 48 int is_phys; 49 }; 50 51 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 52 53 #define DMA_MASK_NONE 0x0ULL 54 55 static inline int valid_dma_direction(int dma_direction) 56 { 57 return ((dma_direction == DMA_BIDIRECTIONAL) || 58 (dma_direction == DMA_TO_DEVICE) || 59 (dma_direction == DMA_FROM_DEVICE)); 60 } 61 62 static inline int is_device_dma_capable(struct device *dev) 63 { 64 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; 65 } 66 67 #ifdef CONFIG_HAS_DMA 68 #include <asm/dma-mapping.h> 69 #else 70 #include <asm-generic/dma-mapping-broken.h> 71 #endif 72 73 static inline u64 dma_get_mask(struct device *dev) 74 { 75 if (dev && dev->dma_mask && *dev->dma_mask) 76 return *dev->dma_mask; 77 return DMA_BIT_MASK(32); 78 } 79 80 #ifdef ARCH_HAS_DMA_SET_COHERENT_MASK 81 int dma_set_coherent_mask(struct device *dev, u64 mask); 82 #else 83 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 84 { 85 if (!dma_supported(dev, mask)) 86 return -EIO; 87 dev->coherent_dma_mask = mask; 88 return 0; 89 } 90 #endif 91 92 extern u64 dma_get_required_mask(struct device *dev); 93 94 static inline unsigned int dma_get_max_seg_size(struct device *dev) 95 { 96 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536; 97 } 98 99 static inline unsigned int dma_set_max_seg_size(struct device *dev, 100 unsigned int size) 101 { 102 if (dev->dma_parms) { 103 dev->dma_parms->max_segment_size = size; 104 return 0; 105 } else 106 return -EIO; 107 } 108 109 static inline unsigned long dma_get_seg_boundary(struct device *dev) 110 { 111 return dev->dma_parms ? 112 dev->dma_parms->segment_boundary_mask : 0xffffffff; 113 } 114 115 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 116 { 117 if (dev->dma_parms) { 118 dev->dma_parms->segment_boundary_mask = mask; 119 return 0; 120 } else 121 return -EIO; 122 } 123 124 static inline void *dma_zalloc_coherent(struct device *dev, size_t size, 125 dma_addr_t *dma_handle, gfp_t flag) 126 { 127 void *ret = dma_alloc_coherent(dev, size, dma_handle, flag); 128 if (ret) 129 memset(ret, 0, size); 130 return ret; 131 } 132 133 #ifdef CONFIG_HAS_DMA 134 static inline int dma_get_cache_alignment(void) 135 { 136 #ifdef ARCH_DMA_MINALIGN 137 return ARCH_DMA_MINALIGN; 138 #endif 139 return 1; 140 } 141 #endif 142 143 /* flags for the coherent memory api */ 144 #define DMA_MEMORY_MAP 0x01 145 #define DMA_MEMORY_IO 0x02 146 #define DMA_MEMORY_INCLUDES_CHILDREN 0x04 147 #define DMA_MEMORY_EXCLUSIVE 0x08 148 149 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 150 static inline int 151 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 152 dma_addr_t device_addr, size_t size, int flags) 153 { 154 return 0; 155 } 156 157 static inline void 158 dma_release_declared_memory(struct device *dev) 159 { 160 } 161 162 static inline void * 163 dma_mark_declared_memory_occupied(struct device *dev, 164 dma_addr_t device_addr, size_t size) 165 { 166 return ERR_PTR(-EBUSY); 167 } 168 #endif 169 170 /* 171 * Managed DMA API 172 */ 173 extern void *dmam_alloc_coherent(struct device *dev, size_t size, 174 dma_addr_t *dma_handle, gfp_t gfp); 175 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 176 dma_addr_t dma_handle); 177 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size, 178 dma_addr_t *dma_handle, gfp_t gfp); 179 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr, 180 dma_addr_t dma_handle); 181 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 182 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 183 dma_addr_t device_addr, size_t size, 184 int flags); 185 extern void dmam_release_declared_memory(struct device *dev); 186 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ 187 static inline int dmam_declare_coherent_memory(struct device *dev, 188 dma_addr_t bus_addr, dma_addr_t device_addr, 189 size_t size, gfp_t gfp) 190 { 191 return 0; 192 } 193 194 static inline void dmam_release_declared_memory(struct device *dev) 195 { 196 } 197 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ 198 199 #ifndef CONFIG_HAVE_DMA_ATTRS 200 struct dma_attrs; 201 202 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \ 203 dma_map_single(dev, cpu_addr, size, dir) 204 205 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \ 206 dma_unmap_single(dev, dma_addr, size, dir) 207 208 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \ 209 dma_map_sg(dev, sgl, nents, dir) 210 211 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \ 212 dma_unmap_sg(dev, sgl, nents, dir) 213 214 #endif /* CONFIG_HAVE_DMA_ATTRS */ 215 216 #ifdef CONFIG_NEED_DMA_MAP_STATE 217 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 218 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 219 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 220 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 221 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 222 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 223 #else 224 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 225 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 226 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 227 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 228 #define dma_unmap_len(PTR, LEN_NAME) (0) 229 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 230 #endif 231 232 #endif 233