1 #ifndef _LINUX_DMA_MAPPING_H 2 #define _LINUX_DMA_MAPPING_H 3 4 #include <linux/device.h> 5 #include <linux/err.h> 6 #include <linux/dma-attrs.h> 7 #include <linux/dma-direction.h> 8 #include <linux/scatterlist.h> 9 10 struct dma_map_ops { 11 void* (*alloc_coherent)(struct device *dev, size_t size, 12 dma_addr_t *dma_handle, gfp_t gfp); 13 void (*free_coherent)(struct device *dev, size_t size, 14 void *vaddr, dma_addr_t dma_handle); 15 dma_addr_t (*map_page)(struct device *dev, struct page *page, 16 unsigned long offset, size_t size, 17 enum dma_data_direction dir, 18 struct dma_attrs *attrs); 19 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 20 size_t size, enum dma_data_direction dir, 21 struct dma_attrs *attrs); 22 int (*map_sg)(struct device *dev, struct scatterlist *sg, 23 int nents, enum dma_data_direction dir, 24 struct dma_attrs *attrs); 25 void (*unmap_sg)(struct device *dev, 26 struct scatterlist *sg, int nents, 27 enum dma_data_direction dir, 28 struct dma_attrs *attrs); 29 void (*sync_single_for_cpu)(struct device *dev, 30 dma_addr_t dma_handle, size_t size, 31 enum dma_data_direction dir); 32 void (*sync_single_for_device)(struct device *dev, 33 dma_addr_t dma_handle, size_t size, 34 enum dma_data_direction dir); 35 void (*sync_sg_for_cpu)(struct device *dev, 36 struct scatterlist *sg, int nents, 37 enum dma_data_direction dir); 38 void (*sync_sg_for_device)(struct device *dev, 39 struct scatterlist *sg, int nents, 40 enum dma_data_direction dir); 41 int (*mapping_error)(struct device *dev, dma_addr_t dma_addr); 42 int (*dma_supported)(struct device *dev, u64 mask); 43 int (*set_dma_mask)(struct device *dev, u64 mask); 44 int is_phys; 45 }; 46 47 #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) 48 49 #define DMA_MASK_NONE 0x0ULL 50 51 static inline int valid_dma_direction(int dma_direction) 52 { 53 return ((dma_direction == DMA_BIDIRECTIONAL) || 54 (dma_direction == DMA_TO_DEVICE) || 55 (dma_direction == DMA_FROM_DEVICE)); 56 } 57 58 static inline int is_device_dma_capable(struct device *dev) 59 { 60 return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE; 61 } 62 63 #ifdef CONFIG_HAS_DMA 64 #include <asm/dma-mapping.h> 65 #else 66 #include <asm-generic/dma-mapping-broken.h> 67 #endif 68 69 static inline u64 dma_get_mask(struct device *dev) 70 { 71 if (dev && dev->dma_mask && *dev->dma_mask) 72 return *dev->dma_mask; 73 return DMA_BIT_MASK(32); 74 } 75 76 #ifdef ARCH_HAS_DMA_SET_COHERENT_MASK 77 int dma_set_coherent_mask(struct device *dev, u64 mask); 78 #else 79 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) 80 { 81 if (!dma_supported(dev, mask)) 82 return -EIO; 83 dev->coherent_dma_mask = mask; 84 return 0; 85 } 86 #endif 87 88 extern u64 dma_get_required_mask(struct device *dev); 89 90 static inline unsigned int dma_get_max_seg_size(struct device *dev) 91 { 92 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536; 93 } 94 95 static inline unsigned int dma_set_max_seg_size(struct device *dev, 96 unsigned int size) 97 { 98 if (dev->dma_parms) { 99 dev->dma_parms->max_segment_size = size; 100 return 0; 101 } else 102 return -EIO; 103 } 104 105 static inline unsigned long dma_get_seg_boundary(struct device *dev) 106 { 107 return dev->dma_parms ? 108 dev->dma_parms->segment_boundary_mask : 0xffffffff; 109 } 110 111 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) 112 { 113 if (dev->dma_parms) { 114 dev->dma_parms->segment_boundary_mask = mask; 115 return 0; 116 } else 117 return -EIO; 118 } 119 120 #ifdef CONFIG_HAS_DMA 121 static inline int dma_get_cache_alignment(void) 122 { 123 #ifdef ARCH_DMA_MINALIGN 124 return ARCH_DMA_MINALIGN; 125 #endif 126 return 1; 127 } 128 #endif 129 130 /* flags for the coherent memory api */ 131 #define DMA_MEMORY_MAP 0x01 132 #define DMA_MEMORY_IO 0x02 133 #define DMA_MEMORY_INCLUDES_CHILDREN 0x04 134 #define DMA_MEMORY_EXCLUSIVE 0x08 135 136 #ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 137 static inline int 138 dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 139 dma_addr_t device_addr, size_t size, int flags) 140 { 141 return 0; 142 } 143 144 static inline void 145 dma_release_declared_memory(struct device *dev) 146 { 147 } 148 149 static inline void * 150 dma_mark_declared_memory_occupied(struct device *dev, 151 dma_addr_t device_addr, size_t size) 152 { 153 return ERR_PTR(-EBUSY); 154 } 155 #endif 156 157 /* 158 * Managed DMA API 159 */ 160 extern void *dmam_alloc_coherent(struct device *dev, size_t size, 161 dma_addr_t *dma_handle, gfp_t gfp); 162 extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr, 163 dma_addr_t dma_handle); 164 extern void *dmam_alloc_noncoherent(struct device *dev, size_t size, 165 dma_addr_t *dma_handle, gfp_t gfp); 166 extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr, 167 dma_addr_t dma_handle); 168 #ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY 169 extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 170 dma_addr_t device_addr, size_t size, 171 int flags); 172 extern void dmam_release_declared_memory(struct device *dev); 173 #else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ 174 static inline int dmam_declare_coherent_memory(struct device *dev, 175 dma_addr_t bus_addr, dma_addr_t device_addr, 176 size_t size, gfp_t gfp) 177 { 178 return 0; 179 } 180 181 static inline void dmam_release_declared_memory(struct device *dev) 182 { 183 } 184 #endif /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */ 185 186 #ifndef CONFIG_HAVE_DMA_ATTRS 187 struct dma_attrs; 188 189 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \ 190 dma_map_single(dev, cpu_addr, size, dir) 191 192 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \ 193 dma_unmap_single(dev, dma_addr, size, dir) 194 195 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \ 196 dma_map_sg(dev, sgl, nents, dir) 197 198 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \ 199 dma_unmap_sg(dev, sgl, nents, dir) 200 201 #endif /* CONFIG_HAVE_DMA_ATTRS */ 202 203 #ifdef CONFIG_NEED_DMA_MAP_STATE 204 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME 205 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME 206 #define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) 207 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) 208 #define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) 209 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) 210 #else 211 #define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) 212 #define DEFINE_DMA_UNMAP_LEN(LEN_NAME) 213 #define dma_unmap_addr(PTR, ADDR_NAME) (0) 214 #define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) 215 #define dma_unmap_len(PTR, LEN_NAME) (0) 216 #define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) 217 #endif 218 219 #endif 220