1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * This header is for implementations of dma_map_ops and related code. 4 * It should not be included in drivers just using the DMA API. 5 */ 6 #ifndef _LINUX_DMA_MAP_OPS_H 7 #define _LINUX_DMA_MAP_OPS_H 8 9 #include <linux/dma-mapping.h> 10 #include <linux/pgtable.h> 11 12 struct cma; 13 14 struct dma_map_ops { 15 void *(*alloc)(struct device *dev, size_t size, 16 dma_addr_t *dma_handle, gfp_t gfp, 17 unsigned long attrs); 18 void (*free)(struct device *dev, size_t size, void *vaddr, 19 dma_addr_t dma_handle, unsigned long attrs); 20 struct page *(*alloc_pages)(struct device *dev, size_t size, 21 dma_addr_t *dma_handle, enum dma_data_direction dir, 22 gfp_t gfp); 23 void (*free_pages)(struct device *dev, size_t size, struct page *vaddr, 24 dma_addr_t dma_handle, enum dma_data_direction dir); 25 struct sg_table *(*alloc_noncontiguous)(struct device *dev, size_t size, 26 enum dma_data_direction dir, gfp_t gfp, 27 unsigned long attrs); 28 void (*free_noncontiguous)(struct device *dev, size_t size, 29 struct sg_table *sgt, enum dma_data_direction dir); 30 int (*mmap)(struct device *, struct vm_area_struct *, 31 void *, dma_addr_t, size_t, unsigned long attrs); 32 33 int (*get_sgtable)(struct device *dev, struct sg_table *sgt, 34 void *cpu_addr, dma_addr_t dma_addr, size_t size, 35 unsigned long attrs); 36 37 dma_addr_t (*map_page)(struct device *dev, struct page *page, 38 unsigned long offset, size_t size, 39 enum dma_data_direction dir, unsigned long attrs); 40 void (*unmap_page)(struct device *dev, dma_addr_t dma_handle, 41 size_t size, enum dma_data_direction dir, 42 unsigned long attrs); 43 /* 44 * map_sg should return a negative error code on error. See 45 * dma_map_sgtable() for a list of appropriate error codes 46 * and their meanings. 47 */ 48 int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, 49 enum dma_data_direction dir, unsigned long attrs); 50 void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents, 51 enum dma_data_direction dir, unsigned long attrs); 52 dma_addr_t (*map_resource)(struct device *dev, phys_addr_t phys_addr, 53 size_t size, enum dma_data_direction dir, 54 unsigned long attrs); 55 void (*unmap_resource)(struct device *dev, dma_addr_t dma_handle, 56 size_t size, enum dma_data_direction dir, 57 unsigned long attrs); 58 void (*sync_single_for_cpu)(struct device *dev, dma_addr_t dma_handle, 59 size_t size, enum dma_data_direction dir); 60 void (*sync_single_for_device)(struct device *dev, 61 dma_addr_t dma_handle, size_t size, 62 enum dma_data_direction dir); 63 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, 64 int nents, enum dma_data_direction dir); 65 void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg, 66 int nents, enum dma_data_direction dir); 67 void (*cache_sync)(struct device *dev, void *vaddr, size_t size, 68 enum dma_data_direction direction); 69 int (*dma_supported)(struct device *dev, u64 mask); 70 u64 (*get_required_mask)(struct device *dev); 71 size_t (*max_mapping_size)(struct device *dev); 72 size_t (*opt_mapping_size)(void); 73 unsigned long (*get_merge_boundary)(struct device *dev); 74 }; 75 76 #ifdef CONFIG_DMA_OPS 77 #include <asm/dma-mapping.h> 78 79 static inline const struct dma_map_ops *get_dma_ops(struct device *dev) 80 { 81 if (dev->dma_ops) 82 return dev->dma_ops; 83 return get_arch_dma_ops(dev->bus); 84 } 85 86 static inline void set_dma_ops(struct device *dev, 87 const struct dma_map_ops *dma_ops) 88 { 89 dev->dma_ops = dma_ops; 90 } 91 #else /* CONFIG_DMA_OPS */ 92 static inline const struct dma_map_ops *get_dma_ops(struct device *dev) 93 { 94 return NULL; 95 } 96 static inline void set_dma_ops(struct device *dev, 97 const struct dma_map_ops *dma_ops) 98 { 99 } 100 #endif /* CONFIG_DMA_OPS */ 101 102 #ifdef CONFIG_DMA_CMA 103 extern struct cma *dma_contiguous_default_area; 104 105 static inline struct cma *dev_get_cma_area(struct device *dev) 106 { 107 if (dev && dev->cma_area) 108 return dev->cma_area; 109 return dma_contiguous_default_area; 110 } 111 112 void dma_contiguous_reserve(phys_addr_t addr_limit); 113 int __init dma_contiguous_reserve_area(phys_addr_t size, phys_addr_t base, 114 phys_addr_t limit, struct cma **res_cma, bool fixed); 115 116 struct page *dma_alloc_from_contiguous(struct device *dev, size_t count, 117 unsigned int order, bool no_warn); 118 bool dma_release_from_contiguous(struct device *dev, struct page *pages, 119 int count); 120 struct page *dma_alloc_contiguous(struct device *dev, size_t size, gfp_t gfp); 121 void dma_free_contiguous(struct device *dev, struct page *page, size_t size); 122 123 void dma_contiguous_early_fixup(phys_addr_t base, unsigned long size); 124 #else /* CONFIG_DMA_CMA */ 125 static inline struct cma *dev_get_cma_area(struct device *dev) 126 { 127 return NULL; 128 } 129 static inline void dma_contiguous_reserve(phys_addr_t limit) 130 { 131 } 132 static inline int dma_contiguous_reserve_area(phys_addr_t size, 133 phys_addr_t base, phys_addr_t limit, struct cma **res_cma, 134 bool fixed) 135 { 136 return -ENOSYS; 137 } 138 static inline struct page *dma_alloc_from_contiguous(struct device *dev, 139 size_t count, unsigned int order, bool no_warn) 140 { 141 return NULL; 142 } 143 static inline bool dma_release_from_contiguous(struct device *dev, 144 struct page *pages, int count) 145 { 146 return false; 147 } 148 /* Use fallback alloc() and free() when CONFIG_DMA_CMA=n */ 149 static inline struct page *dma_alloc_contiguous(struct device *dev, size_t size, 150 gfp_t gfp) 151 { 152 return NULL; 153 } 154 static inline void dma_free_contiguous(struct device *dev, struct page *page, 155 size_t size) 156 { 157 __free_pages(page, get_order(size)); 158 } 159 #endif /* CONFIG_DMA_CMA*/ 160 161 #ifdef CONFIG_DMA_PERNUMA_CMA 162 void dma_pernuma_cma_reserve(void); 163 #else 164 static inline void dma_pernuma_cma_reserve(void) { } 165 #endif /* CONFIG_DMA_PERNUMA_CMA */ 166 167 #ifdef CONFIG_DMA_DECLARE_COHERENT 168 int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, 169 dma_addr_t device_addr, size_t size); 170 int dma_alloc_from_dev_coherent(struct device *dev, ssize_t size, 171 dma_addr_t *dma_handle, void **ret); 172 int dma_release_from_dev_coherent(struct device *dev, int order, void *vaddr); 173 int dma_mmap_from_dev_coherent(struct device *dev, struct vm_area_struct *vma, 174 void *cpu_addr, size_t size, int *ret); 175 #else 176 static inline int dma_declare_coherent_memory(struct device *dev, 177 phys_addr_t phys_addr, dma_addr_t device_addr, size_t size) 178 { 179 return -ENOSYS; 180 } 181 #define dma_alloc_from_dev_coherent(dev, size, handle, ret) (0) 182 #define dma_release_from_dev_coherent(dev, order, vaddr) (0) 183 #define dma_mmap_from_dev_coherent(dev, vma, vaddr, order, ret) (0) 184 #endif /* CONFIG_DMA_DECLARE_COHERENT */ 185 186 #ifdef CONFIG_DMA_GLOBAL_POOL 187 void *dma_alloc_from_global_coherent(struct device *dev, ssize_t size, 188 dma_addr_t *dma_handle); 189 int dma_release_from_global_coherent(int order, void *vaddr); 190 int dma_mmap_from_global_coherent(struct vm_area_struct *vma, void *cpu_addr, 191 size_t size, int *ret); 192 int dma_init_global_coherent(phys_addr_t phys_addr, size_t size); 193 #else 194 static inline void *dma_alloc_from_global_coherent(struct device *dev, 195 ssize_t size, dma_addr_t *dma_handle) 196 { 197 return NULL; 198 } 199 static inline int dma_release_from_global_coherent(int order, void *vaddr) 200 { 201 return 0; 202 } 203 static inline int dma_mmap_from_global_coherent(struct vm_area_struct *vma, 204 void *cpu_addr, size_t size, int *ret) 205 { 206 return 0; 207 } 208 #endif /* CONFIG_DMA_GLOBAL_POOL */ 209 210 /* 211 * This is the actual return value from the ->alloc_noncontiguous method. 212 * The users of the DMA API should only care about the sg_table, but to make 213 * the DMA-API internal vmaping and freeing easier we stash away the page 214 * array as well (except for the fallback case). This can go away any time, 215 * e.g. when a vmap-variant that takes a scatterlist comes along. 216 */ 217 struct dma_sgt_handle { 218 struct sg_table sgt; 219 struct page **pages; 220 }; 221 #define sgt_handle(sgt) \ 222 container_of((sgt), struct dma_sgt_handle, sgt) 223 224 int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt, 225 void *cpu_addr, dma_addr_t dma_addr, size_t size, 226 unsigned long attrs); 227 int dma_common_mmap(struct device *dev, struct vm_area_struct *vma, 228 void *cpu_addr, dma_addr_t dma_addr, size_t size, 229 unsigned long attrs); 230 struct page *dma_common_alloc_pages(struct device *dev, size_t size, 231 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); 232 void dma_common_free_pages(struct device *dev, size_t size, struct page *vaddr, 233 dma_addr_t dma_handle, enum dma_data_direction dir); 234 235 struct page **dma_common_find_pages(void *cpu_addr); 236 void *dma_common_contiguous_remap(struct page *page, size_t size, pgprot_t prot, 237 const void *caller); 238 void *dma_common_pages_remap(struct page **pages, size_t size, pgprot_t prot, 239 const void *caller); 240 void dma_common_free_remap(void *cpu_addr, size_t size); 241 242 struct page *dma_alloc_from_pool(struct device *dev, size_t size, 243 void **cpu_addr, gfp_t flags, 244 bool (*phys_addr_ok)(struct device *, phys_addr_t, size_t)); 245 bool dma_free_from_pool(struct device *dev, void *start, size_t size); 246 247 int dma_direct_set_offset(struct device *dev, phys_addr_t cpu_start, 248 dma_addr_t dma_start, u64 size); 249 250 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ 251 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ 252 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) 253 extern bool dma_default_coherent; 254 static inline bool dev_is_dma_coherent(struct device *dev) 255 { 256 return dev->dma_coherent; 257 } 258 #else 259 static inline bool dev_is_dma_coherent(struct device *dev) 260 { 261 return true; 262 } 263 #endif /* CONFIG_ARCH_HAS_DMA_COHERENCE_H */ 264 265 void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 266 gfp_t gfp, unsigned long attrs); 267 void arch_dma_free(struct device *dev, size_t size, void *cpu_addr, 268 dma_addr_t dma_addr, unsigned long attrs); 269 270 #ifdef CONFIG_MMU 271 /* 272 * Page protection so that devices that can't snoop CPU caches can use the 273 * memory coherently. We default to pgprot_noncached which is usually used 274 * for ioremap as a safe bet, but architectures can override this with less 275 * strict semantics if possible. 276 */ 277 #ifndef pgprot_dmacoherent 278 #define pgprot_dmacoherent(prot) pgprot_noncached(prot) 279 #endif 280 281 pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, unsigned long attrs); 282 #else 283 static inline pgprot_t dma_pgprot(struct device *dev, pgprot_t prot, 284 unsigned long attrs) 285 { 286 return prot; /* no protection bits supported without page tables */ 287 } 288 #endif /* CONFIG_MMU */ 289 290 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE 291 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, 292 enum dma_data_direction dir); 293 #else 294 static inline void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, 295 enum dma_data_direction dir) 296 { 297 } 298 #endif /* ARCH_HAS_SYNC_DMA_FOR_DEVICE */ 299 300 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU 301 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, 302 enum dma_data_direction dir); 303 #else 304 static inline void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, 305 enum dma_data_direction dir) 306 { 307 } 308 #endif /* ARCH_HAS_SYNC_DMA_FOR_CPU */ 309 310 #ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 311 void arch_sync_dma_for_cpu_all(void); 312 #else 313 static inline void arch_sync_dma_for_cpu_all(void) 314 { 315 } 316 #endif /* CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL */ 317 318 #ifdef CONFIG_ARCH_HAS_DMA_PREP_COHERENT 319 void arch_dma_prep_coherent(struct page *page, size_t size); 320 #else 321 static inline void arch_dma_prep_coherent(struct page *page, size_t size) 322 { 323 } 324 #endif /* CONFIG_ARCH_HAS_DMA_PREP_COHERENT */ 325 326 #ifdef CONFIG_ARCH_HAS_DMA_MARK_CLEAN 327 void arch_dma_mark_clean(phys_addr_t paddr, size_t size); 328 #else 329 static inline void arch_dma_mark_clean(phys_addr_t paddr, size_t size) 330 { 331 } 332 #endif /* ARCH_HAS_DMA_MARK_CLEAN */ 333 334 void *arch_dma_set_uncached(void *addr, size_t size); 335 void arch_dma_clear_uncached(void *addr, size_t size); 336 337 #ifdef CONFIG_ARCH_HAS_DMA_MAP_DIRECT 338 bool arch_dma_map_page_direct(struct device *dev, phys_addr_t addr); 339 bool arch_dma_unmap_page_direct(struct device *dev, dma_addr_t dma_handle); 340 bool arch_dma_map_sg_direct(struct device *dev, struct scatterlist *sg, 341 int nents); 342 bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg, 343 int nents); 344 #else 345 #define arch_dma_map_page_direct(d, a) (false) 346 #define arch_dma_unmap_page_direct(d, a) (false) 347 #define arch_dma_map_sg_direct(d, s, n) (false) 348 #define arch_dma_unmap_sg_direct(d, s, n) (false) 349 #endif 350 351 #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS 352 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 353 const struct iommu_ops *iommu, bool coherent); 354 #else 355 static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, 356 u64 size, const struct iommu_ops *iommu, bool coherent) 357 { 358 } 359 #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */ 360 361 #ifdef CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS 362 void arch_teardown_dma_ops(struct device *dev); 363 #else 364 static inline void arch_teardown_dma_ops(struct device *dev) 365 { 366 } 367 #endif /* CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS */ 368 369 #ifdef CONFIG_DMA_API_DEBUG 370 void dma_debug_add_bus(struct bus_type *bus); 371 void debug_dma_dump_mappings(struct device *dev); 372 #else 373 static inline void dma_debug_add_bus(struct bus_type *bus) 374 { 375 } 376 static inline void debug_dma_dump_mappings(struct device *dev) 377 { 378 } 379 #endif /* CONFIG_DMA_API_DEBUG */ 380 381 extern const struct dma_map_ops dma_dummy_ops; 382 383 enum pci_p2pdma_map_type { 384 /* 385 * PCI_P2PDMA_MAP_UNKNOWN: Used internally for indicating the mapping 386 * type hasn't been calculated yet. Functions that return this enum 387 * never return this value. 388 */ 389 PCI_P2PDMA_MAP_UNKNOWN = 0, 390 391 /* 392 * PCI_P2PDMA_MAP_NOT_SUPPORTED: Indicates the transaction will 393 * traverse the host bridge and the host bridge is not in the 394 * allowlist. DMA Mapping routines should return an error when 395 * this is returned. 396 */ 397 PCI_P2PDMA_MAP_NOT_SUPPORTED, 398 399 /* 400 * PCI_P2PDMA_BUS_ADDR: Indicates that two devices can talk to 401 * each other directly through a PCI switch and the transaction will 402 * not traverse the host bridge. Such a mapping should program 403 * the DMA engine with PCI bus addresses. 404 */ 405 PCI_P2PDMA_MAP_BUS_ADDR, 406 407 /* 408 * PCI_P2PDMA_MAP_THRU_HOST_BRIDGE: Indicates two devices can talk 409 * to each other, but the transaction traverses a host bridge on the 410 * allowlist. In this case, a normal mapping either with CPU physical 411 * addresses (in the case of dma-direct) or IOVA addresses (in the 412 * case of IOMMUs) should be used to program the DMA engine. 413 */ 414 PCI_P2PDMA_MAP_THRU_HOST_BRIDGE, 415 }; 416 417 struct pci_p2pdma_map_state { 418 struct dev_pagemap *pgmap; 419 int map; 420 u64 bus_off; 421 }; 422 423 #ifdef CONFIG_PCI_P2PDMA 424 enum pci_p2pdma_map_type 425 pci_p2pdma_map_segment(struct pci_p2pdma_map_state *state, struct device *dev, 426 struct scatterlist *sg); 427 #else /* CONFIG_PCI_P2PDMA */ 428 static inline enum pci_p2pdma_map_type 429 pci_p2pdma_map_segment(struct pci_p2pdma_map_state *state, struct device *dev, 430 struct scatterlist *sg) 431 { 432 return PCI_P2PDMA_MAP_NOT_SUPPORTED; 433 } 434 #endif /* CONFIG_PCI_P2PDMA */ 435 436 #endif /* _LINUX_DMA_MAP_OPS_H */ 437