1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Internals of the DMA direct mapping implementation. Only for use by the 4 * DMA mapping code and IOMMU drivers. 5 */ 6 #ifndef _LINUX_DMA_DIRECT_H 7 #define _LINUX_DMA_DIRECT_H 1 8 9 #include <linux/dma-mapping.h> 10 #include <linux/dma-noncoherent.h> 11 #include <linux/memblock.h> /* for min_low_pfn */ 12 #include <linux/mem_encrypt.h> 13 #include <linux/swiotlb.h> 14 15 extern unsigned int zone_dma_bits; 16 17 /* 18 * Record the mapping of CPU physical to DMA addresses for a given region. 19 */ 20 struct bus_dma_region { 21 phys_addr_t cpu_start; 22 dma_addr_t dma_start; 23 u64 size; 24 u64 offset; 25 }; 26 27 static inline dma_addr_t translate_phys_to_dma(struct device *dev, 28 phys_addr_t paddr) 29 { 30 const struct bus_dma_region *m; 31 32 for (m = dev->dma_range_map; m->size; m++) 33 if (paddr >= m->cpu_start && paddr - m->cpu_start < m->size) 34 return (dma_addr_t)paddr - m->offset; 35 36 /* make sure dma_capable fails when no translation is available */ 37 return DMA_MAPPING_ERROR; 38 } 39 40 static inline phys_addr_t translate_dma_to_phys(struct device *dev, 41 dma_addr_t dma_addr) 42 { 43 const struct bus_dma_region *m; 44 45 for (m = dev->dma_range_map; m->size; m++) 46 if (dma_addr >= m->dma_start && dma_addr - m->dma_start < m->size) 47 return (phys_addr_t)dma_addr + m->offset; 48 49 return (phys_addr_t)-1; 50 } 51 52 #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA 53 #include <asm/dma-direct.h> 54 #ifndef phys_to_dma_unencrypted 55 #define phys_to_dma_unencrypted phys_to_dma 56 #endif 57 #else 58 static inline dma_addr_t phys_to_dma_unencrypted(struct device *dev, 59 phys_addr_t paddr) 60 { 61 if (dev->dma_range_map) 62 return translate_phys_to_dma(dev, paddr); 63 return paddr; 64 } 65 66 /* 67 * If memory encryption is supported, phys_to_dma will set the memory encryption 68 * bit in the DMA address, and dma_to_phys will clear it. 69 * phys_to_dma_unencrypted is for use on special unencrypted memory like swiotlb 70 * buffers. 71 */ 72 static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) 73 { 74 return __sme_set(phys_to_dma_unencrypted(dev, paddr)); 75 } 76 77 static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dma_addr) 78 { 79 phys_addr_t paddr; 80 81 if (dev->dma_range_map) 82 paddr = translate_dma_to_phys(dev, dma_addr); 83 else 84 paddr = dma_addr; 85 86 return __sme_clr(paddr); 87 } 88 #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ 89 90 #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED 91 bool force_dma_unencrypted(struct device *dev); 92 #else 93 static inline bool force_dma_unencrypted(struct device *dev) 94 { 95 return false; 96 } 97 #endif /* CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED */ 98 99 static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size, 100 bool is_ram) 101 { 102 dma_addr_t end = addr + size - 1; 103 104 if (addr == DMA_MAPPING_ERROR) 105 return false; 106 if (is_ram && !IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && 107 min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) 108 return false; 109 110 return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit); 111 } 112 113 u64 dma_direct_get_required_mask(struct device *dev); 114 void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, 115 gfp_t gfp, unsigned long attrs); 116 void dma_direct_free(struct device *dev, size_t size, void *cpu_addr, 117 dma_addr_t dma_addr, unsigned long attrs); 118 struct page *dma_direct_alloc_pages(struct device *dev, size_t size, 119 dma_addr_t *dma_handle, enum dma_data_direction dir, gfp_t gfp); 120 void dma_direct_free_pages(struct device *dev, size_t size, 121 struct page *page, dma_addr_t dma_addr, 122 enum dma_data_direction dir); 123 int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt, 124 void *cpu_addr, dma_addr_t dma_addr, size_t size, 125 unsigned long attrs); 126 bool dma_direct_can_mmap(struct device *dev); 127 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma, 128 void *cpu_addr, dma_addr_t dma_addr, size_t size, 129 unsigned long attrs); 130 int dma_direct_supported(struct device *dev, u64 mask); 131 bool dma_direct_need_sync(struct device *dev, dma_addr_t dma_addr); 132 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, 133 enum dma_data_direction dir, unsigned long attrs); 134 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr, 135 size_t size, enum dma_data_direction dir, unsigned long attrs); 136 size_t dma_direct_max_mapping_size(struct device *dev); 137 138 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \ 139 defined(CONFIG_SWIOTLB) 140 void dma_direct_sync_sg_for_device(struct device *dev, struct scatterlist *sgl, 141 int nents, enum dma_data_direction dir); 142 #else 143 static inline void dma_direct_sync_sg_for_device(struct device *dev, 144 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 145 { 146 } 147 #endif 148 149 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \ 150 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \ 151 defined(CONFIG_SWIOTLB) 152 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl, 153 int nents, enum dma_data_direction dir, unsigned long attrs); 154 void dma_direct_sync_sg_for_cpu(struct device *dev, 155 struct scatterlist *sgl, int nents, enum dma_data_direction dir); 156 #else 157 static inline void dma_direct_unmap_sg(struct device *dev, 158 struct scatterlist *sgl, int nents, enum dma_data_direction dir, 159 unsigned long attrs) 160 { 161 } 162 static inline void dma_direct_sync_sg_for_cpu(struct device *dev, 163 struct scatterlist *sgl, int nents, enum dma_data_direction dir) 164 { 165 } 166 #endif 167 168 static inline void dma_direct_sync_single_for_device(struct device *dev, 169 dma_addr_t addr, size_t size, enum dma_data_direction dir) 170 { 171 phys_addr_t paddr = dma_to_phys(dev, addr); 172 173 if (unlikely(is_swiotlb_buffer(paddr))) 174 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE); 175 176 if (!dev_is_dma_coherent(dev)) 177 arch_sync_dma_for_device(paddr, size, dir); 178 } 179 180 static inline void dma_direct_sync_single_for_cpu(struct device *dev, 181 dma_addr_t addr, size_t size, enum dma_data_direction dir) 182 { 183 phys_addr_t paddr = dma_to_phys(dev, addr); 184 185 if (!dev_is_dma_coherent(dev)) { 186 arch_sync_dma_for_cpu(paddr, size, dir); 187 arch_sync_dma_for_cpu_all(); 188 } 189 190 if (unlikely(is_swiotlb_buffer(paddr))) 191 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU); 192 193 if (dir == DMA_FROM_DEVICE) 194 arch_dma_mark_clean(paddr, size); 195 } 196 197 static inline dma_addr_t dma_direct_map_page(struct device *dev, 198 struct page *page, unsigned long offset, size_t size, 199 enum dma_data_direction dir, unsigned long attrs) 200 { 201 phys_addr_t phys = page_to_phys(page) + offset; 202 dma_addr_t dma_addr = phys_to_dma(dev, phys); 203 204 if (unlikely(swiotlb_force == SWIOTLB_FORCE)) 205 return swiotlb_map(dev, phys, size, dir, attrs); 206 207 if (unlikely(!dma_capable(dev, dma_addr, size, true))) { 208 if (swiotlb_force != SWIOTLB_NO_FORCE) 209 return swiotlb_map(dev, phys, size, dir, attrs); 210 211 dev_WARN_ONCE(dev, 1, 212 "DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n", 213 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit); 214 return DMA_MAPPING_ERROR; 215 } 216 217 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 218 arch_sync_dma_for_device(phys, size, dir); 219 return dma_addr; 220 } 221 222 static inline void dma_direct_unmap_page(struct device *dev, dma_addr_t addr, 223 size_t size, enum dma_data_direction dir, unsigned long attrs) 224 { 225 phys_addr_t phys = dma_to_phys(dev, addr); 226 227 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC)) 228 dma_direct_sync_single_for_cpu(dev, addr, size, dir); 229 230 if (unlikely(is_swiotlb_buffer(phys))) 231 swiotlb_tbl_unmap_single(dev, phys, size, size, dir, attrs); 232 } 233 #endif /* _LINUX_DMA_DIRECT_H */ 234