1 /* 2 * UEFI Common Platform Error Record 3 * 4 * Copyright (C) 2010, Intel Corp. 5 * Author: Huang Ying <[email protected]> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License version 9 * 2 as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 */ 20 21 #ifndef LINUX_CPER_H 22 #define LINUX_CPER_H 23 24 #include <linux/uuid.h> 25 26 /* CPER record signature and the size */ 27 #define CPER_SIG_RECORD "CPER" 28 #define CPER_SIG_SIZE 4 29 /* Used in signature_end field in struct cper_record_header */ 30 #define CPER_SIG_END 0xffffffff 31 32 /* 33 * CPER record header revision, used in revision field in struct 34 * cper_record_header 35 */ 36 #define CPER_RECORD_REV 0x0100 37 38 /* 39 * CPER record length contains the CPER fields which are relevant for further 40 * handling of a memory error in userspace (we don't carry all the fields 41 * defined in the UEFI spec because some of them don't make any sense.) 42 * Currently, a length of 256 should be more than enough. 43 */ 44 #define CPER_REC_LEN 256 45 /* 46 * Severity difinition for error_severity in struct cper_record_header 47 * and section_severity in struct cper_section_descriptor 48 */ 49 enum { 50 CPER_SEV_RECOVERABLE, 51 CPER_SEV_FATAL, 52 CPER_SEV_CORRECTED, 53 CPER_SEV_INFORMATIONAL, 54 }; 55 56 /* 57 * Validation bits difinition for validation_bits in struct 58 * cper_record_header. If set, corresponding fields in struct 59 * cper_record_header contain valid information. 60 * 61 * corresponds platform_id 62 */ 63 #define CPER_VALID_PLATFORM_ID 0x0001 64 /* corresponds timestamp */ 65 #define CPER_VALID_TIMESTAMP 0x0002 66 /* corresponds partition_id */ 67 #define CPER_VALID_PARTITION_ID 0x0004 68 69 /* 70 * Notification type used to generate error record, used in 71 * notification_type in struct cper_record_header 72 * 73 * Corrected Machine Check 74 */ 75 #define CPER_NOTIFY_CMC \ 76 UUID_LE(0x2DCE8BB1, 0xBDD7, 0x450e, 0xB9, 0xAD, 0x9C, 0xF4, \ 77 0xEB, 0xD4, 0xF8, 0x90) 78 /* Corrected Platform Error */ 79 #define CPER_NOTIFY_CPE \ 80 UUID_LE(0x4E292F96, 0xD843, 0x4a55, 0xA8, 0xC2, 0xD4, 0x81, \ 81 0xF2, 0x7E, 0xBE, 0xEE) 82 /* Machine Check Exception */ 83 #define CPER_NOTIFY_MCE \ 84 UUID_LE(0xE8F56FFE, 0x919C, 0x4cc5, 0xBA, 0x88, 0x65, 0xAB, \ 85 0xE1, 0x49, 0x13, 0xBB) 86 /* PCI Express Error */ 87 #define CPER_NOTIFY_PCIE \ 88 UUID_LE(0xCF93C01F, 0x1A16, 0x4dfc, 0xB8, 0xBC, 0x9C, 0x4D, \ 89 0xAF, 0x67, 0xC1, 0x04) 90 /* INIT Record (for IPF) */ 91 #define CPER_NOTIFY_INIT \ 92 UUID_LE(0xCC5263E8, 0x9308, 0x454a, 0x89, 0xD0, 0x34, 0x0B, \ 93 0xD3, 0x9B, 0xC9, 0x8E) 94 /* Non-Maskable Interrupt */ 95 #define CPER_NOTIFY_NMI \ 96 UUID_LE(0x5BAD89FF, 0xB7E6, 0x42c9, 0x81, 0x4A, 0xCF, 0x24, \ 97 0x85, 0xD6, 0xE9, 0x8A) 98 /* BOOT Error Record */ 99 #define CPER_NOTIFY_BOOT \ 100 UUID_LE(0x3D61A466, 0xAB40, 0x409a, 0xA6, 0x98, 0xF3, 0x62, \ 101 0xD4, 0x64, 0xB3, 0x8F) 102 /* DMA Remapping Error */ 103 #define CPER_NOTIFY_DMAR \ 104 UUID_LE(0x667DD791, 0xC6B3, 0x4c27, 0x8A, 0x6B, 0x0F, 0x8E, \ 105 0x72, 0x2D, 0xEB, 0x41) 106 107 /* 108 * Flags bits definitions for flags in struct cper_record_header 109 * If set, the error has been recovered 110 */ 111 #define CPER_HW_ERROR_FLAGS_RECOVERED 0x1 112 /* If set, the error is for previous boot */ 113 #define CPER_HW_ERROR_FLAGS_PREVERR 0x2 114 /* If set, the error is injected for testing */ 115 #define CPER_HW_ERROR_FLAGS_SIMULATED 0x4 116 117 /* 118 * CPER section header revision, used in revision field in struct 119 * cper_section_descriptor 120 */ 121 #define CPER_SEC_REV 0x0100 122 123 /* 124 * Validation bits difinition for validation_bits in struct 125 * cper_section_descriptor. If set, corresponding fields in struct 126 * cper_section_descriptor contain valid information. 127 * 128 * corresponds fru_id 129 */ 130 #define CPER_SEC_VALID_FRU_ID 0x1 131 /* corresponds fru_text */ 132 #define CPER_SEC_VALID_FRU_TEXT 0x2 133 134 /* 135 * Flags bits definitions for flags in struct cper_section_descriptor 136 * 137 * If set, the section is associated with the error condition 138 * directly, and should be focused on 139 */ 140 #define CPER_SEC_PRIMARY 0x0001 141 /* 142 * If set, the error was not contained within the processor or memory 143 * hierarchy and the error may have propagated to persistent storage 144 * or network 145 */ 146 #define CPER_SEC_CONTAINMENT_WARNING 0x0002 147 /* If set, the component must be re-initialized or re-enabled prior to use */ 148 #define CPER_SEC_RESET 0x0004 149 /* If set, Linux may choose to discontinue use of the resource */ 150 #define CPER_SEC_ERROR_THRESHOLD_EXCEEDED 0x0008 151 /* 152 * If set, resource could not be queried for error information due to 153 * conflicts with other system software or resources. Some fields of 154 * the section will be invalid 155 */ 156 #define CPER_SEC_RESOURCE_NOT_ACCESSIBLE 0x0010 157 /* 158 * If set, action has been taken to ensure error containment (such as 159 * poisoning data), but the error has not been fully corrected and the 160 * data has not been consumed. Linux may choose to take further 161 * corrective action before the data is consumed 162 */ 163 #define CPER_SEC_LATENT_ERROR 0x0020 164 165 /* 166 * Section type definitions, used in section_type field in struct 167 * cper_section_descriptor 168 * 169 * Processor Generic 170 */ 171 #define CPER_SEC_PROC_GENERIC \ 172 UUID_LE(0x9876CCAD, 0x47B4, 0x4bdb, 0xB6, 0x5E, 0x16, 0xF1, \ 173 0x93, 0xC4, 0xF3, 0xDB) 174 /* Processor Specific: X86/X86_64 */ 175 #define CPER_SEC_PROC_IA \ 176 UUID_LE(0xDC3EA0B0, 0xA144, 0x4797, 0xB9, 0x5B, 0x53, 0xFA, \ 177 0x24, 0x2B, 0x6E, 0x1D) 178 /* Processor Specific: IA64 */ 179 #define CPER_SEC_PROC_IPF \ 180 UUID_LE(0xE429FAF1, 0x3CB7, 0x11D4, 0x0B, 0xCA, 0x07, 0x00, \ 181 0x80, 0xC7, 0x3C, 0x88, 0x81) 182 /* Platform Memory */ 183 #define CPER_SEC_PLATFORM_MEM \ 184 UUID_LE(0xA5BC1114, 0x6F64, 0x4EDE, 0xB8, 0x63, 0x3E, 0x83, \ 185 0xED, 0x7C, 0x83, 0xB1) 186 #define CPER_SEC_PCIE \ 187 UUID_LE(0xD995E954, 0xBBC1, 0x430F, 0xAD, 0x91, 0xB4, 0x4D, \ 188 0xCB, 0x3C, 0x6F, 0x35) 189 /* Firmware Error Record Reference */ 190 #define CPER_SEC_FW_ERR_REC_REF \ 191 UUID_LE(0x81212A96, 0x09ED, 0x4996, 0x94, 0x71, 0x8D, 0x72, \ 192 0x9C, 0x8E, 0x69, 0xED) 193 /* PCI/PCI-X Bus */ 194 #define CPER_SEC_PCI_X_BUS \ 195 UUID_LE(0xC5753963, 0x3B84, 0x4095, 0xBF, 0x78, 0xED, 0xDA, \ 196 0xD3, 0xF9, 0xC9, 0xDD) 197 /* PCI Component/Device */ 198 #define CPER_SEC_PCI_DEV \ 199 UUID_LE(0xEB5E4685, 0xCA66, 0x4769, 0xB6, 0xA2, 0x26, 0x06, \ 200 0x8B, 0x00, 0x13, 0x26) 201 #define CPER_SEC_DMAR_GENERIC \ 202 UUID_LE(0x5B51FEF7, 0xC79D, 0x4434, 0x8F, 0x1B, 0xAA, 0x62, \ 203 0xDE, 0x3E, 0x2C, 0x64) 204 /* Intel VT for Directed I/O specific DMAr */ 205 #define CPER_SEC_DMAR_VT \ 206 UUID_LE(0x71761D37, 0x32B2, 0x45cd, 0xA7, 0xD0, 0xB0, 0xFE, \ 207 0xDD, 0x93, 0xE8, 0xCF) 208 /* IOMMU specific DMAr */ 209 #define CPER_SEC_DMAR_IOMMU \ 210 UUID_LE(0x036F84E1, 0x7F37, 0x428c, 0xA7, 0x9E, 0x57, 0x5F, \ 211 0xDF, 0xAA, 0x84, 0xEC) 212 213 #define CPER_PROC_VALID_TYPE 0x0001 214 #define CPER_PROC_VALID_ISA 0x0002 215 #define CPER_PROC_VALID_ERROR_TYPE 0x0004 216 #define CPER_PROC_VALID_OPERATION 0x0008 217 #define CPER_PROC_VALID_FLAGS 0x0010 218 #define CPER_PROC_VALID_LEVEL 0x0020 219 #define CPER_PROC_VALID_VERSION 0x0040 220 #define CPER_PROC_VALID_BRAND_INFO 0x0080 221 #define CPER_PROC_VALID_ID 0x0100 222 #define CPER_PROC_VALID_TARGET_ADDRESS 0x0200 223 #define CPER_PROC_VALID_REQUESTOR_ID 0x0400 224 #define CPER_PROC_VALID_RESPONDER_ID 0x0800 225 #define CPER_PROC_VALID_IP 0x1000 226 227 #define CPER_MEM_VALID_ERROR_STATUS 0x0001 228 #define CPER_MEM_VALID_PA 0x0002 229 #define CPER_MEM_VALID_PA_MASK 0x0004 230 #define CPER_MEM_VALID_NODE 0x0008 231 #define CPER_MEM_VALID_CARD 0x0010 232 #define CPER_MEM_VALID_MODULE 0x0020 233 #define CPER_MEM_VALID_BANK 0x0040 234 #define CPER_MEM_VALID_DEVICE 0x0080 235 #define CPER_MEM_VALID_ROW 0x0100 236 #define CPER_MEM_VALID_COLUMN 0x0200 237 #define CPER_MEM_VALID_BIT_POSITION 0x0400 238 #define CPER_MEM_VALID_REQUESTOR_ID 0x0800 239 #define CPER_MEM_VALID_RESPONDER_ID 0x1000 240 #define CPER_MEM_VALID_TARGET_ID 0x2000 241 #define CPER_MEM_VALID_ERROR_TYPE 0x4000 242 #define CPER_MEM_VALID_RANK_NUMBER 0x8000 243 #define CPER_MEM_VALID_CARD_HANDLE 0x10000 244 #define CPER_MEM_VALID_MODULE_HANDLE 0x20000 245 246 #define CPER_PCIE_VALID_PORT_TYPE 0x0001 247 #define CPER_PCIE_VALID_VERSION 0x0002 248 #define CPER_PCIE_VALID_COMMAND_STATUS 0x0004 249 #define CPER_PCIE_VALID_DEVICE_ID 0x0008 250 #define CPER_PCIE_VALID_SERIAL_NUMBER 0x0010 251 #define CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS 0x0020 252 #define CPER_PCIE_VALID_CAPABILITY 0x0040 253 #define CPER_PCIE_VALID_AER_INFO 0x0080 254 255 #define CPER_PCIE_SLOT_SHIFT 3 256 257 /* 258 * All tables and structs must be byte-packed to match CPER 259 * specification, since the tables are provided by the system BIOS 260 */ 261 #pragma pack(1) 262 263 struct cper_record_header { 264 char signature[CPER_SIG_SIZE]; /* must be CPER_SIG_RECORD */ 265 __u16 revision; /* must be CPER_RECORD_REV */ 266 __u32 signature_end; /* must be CPER_SIG_END */ 267 __u16 section_count; 268 __u32 error_severity; 269 __u32 validation_bits; 270 __u32 record_length; 271 __u64 timestamp; 272 uuid_le platform_id; 273 uuid_le partition_id; 274 uuid_le creator_id; 275 uuid_le notification_type; 276 __u64 record_id; 277 __u32 flags; 278 __u64 persistence_information; 279 __u8 reserved[12]; /* must be zero */ 280 }; 281 282 struct cper_section_descriptor { 283 __u32 section_offset; /* Offset in bytes of the 284 * section body from the base 285 * of the record header */ 286 __u32 section_length; 287 __u16 revision; /* must be CPER_RECORD_REV */ 288 __u8 validation_bits; 289 __u8 reserved; /* must be zero */ 290 __u32 flags; 291 uuid_le section_type; 292 uuid_le fru_id; 293 __u32 section_severity; 294 __u8 fru_text[20]; 295 }; 296 297 /* Generic Processor Error Section */ 298 struct cper_sec_proc_generic { 299 __u64 validation_bits; 300 __u8 proc_type; 301 __u8 proc_isa; 302 __u8 proc_error_type; 303 __u8 operation; 304 __u8 flags; 305 __u8 level; 306 __u16 reserved; 307 __u64 cpu_version; 308 char cpu_brand[128]; 309 __u64 proc_id; 310 __u64 target_addr; 311 __u64 requestor_id; 312 __u64 responder_id; 313 __u64 ip; 314 }; 315 316 /* IA32/X64 Processor Error Section */ 317 struct cper_sec_proc_ia { 318 __u64 validation_bits; 319 __u8 lapic_id; 320 __u8 cpuid[48]; 321 }; 322 323 /* IA32/X64 Processor Error Information Structure */ 324 struct cper_ia_err_info { 325 uuid_le err_type; 326 __u64 validation_bits; 327 __u64 check_info; 328 __u64 target_id; 329 __u64 requestor_id; 330 __u64 responder_id; 331 __u64 ip; 332 }; 333 334 /* IA32/X64 Processor Context Information Structure */ 335 struct cper_ia_proc_ctx { 336 __u16 reg_ctx_type; 337 __u16 reg_arr_size; 338 __u32 msr_addr; 339 __u64 mm_reg_addr; 340 }; 341 342 /* Memory Error Section */ 343 struct cper_sec_mem_err { 344 __u64 validation_bits; 345 __u64 error_status; 346 __u64 physical_addr; 347 __u64 physical_addr_mask; 348 __u16 node; 349 __u16 card; 350 __u16 module; 351 __u16 bank; 352 __u16 device; 353 __u16 row; 354 __u16 column; 355 __u16 bit_pos; 356 __u64 requestor_id; 357 __u64 responder_id; 358 __u64 target_id; 359 __u8 error_type; 360 __u8 reserved; 361 __u16 rank; 362 __u16 mem_array_handle; /* card handle in UEFI 2.4 */ 363 __u16 mem_dev_handle; /* module handle in UEFI 2.4 */ 364 }; 365 366 struct cper_sec_pcie { 367 __u64 validation_bits; 368 __u32 port_type; 369 struct { 370 __u8 minor; 371 __u8 major; 372 __u8 reserved[2]; 373 } version; 374 __u16 command; 375 __u16 status; 376 __u32 reserved; 377 struct { 378 __u16 vendor_id; 379 __u16 device_id; 380 __u8 class_code[3]; 381 __u8 function; 382 __u8 device; 383 __u16 segment; 384 __u8 bus; 385 __u8 secondary_bus; 386 __u16 slot; 387 __u8 reserved; 388 } device_id; 389 struct { 390 __u32 lower; 391 __u32 upper; 392 } serial_number; 393 struct { 394 __u16 secondary_status; 395 __u16 control; 396 } bridge; 397 __u8 capability[60]; 398 __u8 aer_info[96]; 399 }; 400 401 /* Reset to default packing */ 402 #pragma pack() 403 404 u64 cper_next_record_id(void); 405 const char *cper_severity_str(unsigned int); 406 const char *cper_mem_err_type_str(unsigned int); 407 void cper_print_bits(const char *prefix, unsigned int bits, 408 const char * const strs[], unsigned int strs_size); 409 410 #endif 411