1ad0dfdfdSMathieu Poirier /* SPDX-License-Identifier: GPL-2.0 */ 2ad0dfdfdSMathieu Poirier /* 3ad0dfdfdSMathieu Poirier * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4a06ae860SPratik Patel */ 5a06ae860SPratik Patel 6a06ae860SPratik Patel #ifndef _LINUX_CORESIGHT_H 7a06ae860SPratik Patel #define _LINUX_CORESIGHT_H 8a06ae860SPratik Patel 9a06ae860SPratik Patel #include <linux/device.h> 10882d5e11SMathieu Poirier #include <linux/perf_event.h> 11ff63ec13SMark Brown #include <linux/sched.h> 12a06ae860SPratik Patel 13a06ae860SPratik Patel /* Peripheral id registers (0xFD0-0xFEC) */ 14a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR4 0xfd0 15a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR5 0xfd4 16a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR6 0xfd8 17a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR7 0xfdC 18a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR0 0xfe0 19a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR1 0xfe4 20a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR2 0xfe8 21a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR3 0xfeC 22a06ae860SPratik Patel /* Component id registers (0xFF0-0xFFC) */ 23a06ae860SPratik Patel #define CORESIGHT_COMPIDR0 0xff0 24a06ae860SPratik Patel #define CORESIGHT_COMPIDR1 0xff4 25a06ae860SPratik Patel #define CORESIGHT_COMPIDR2 0xff8 26a06ae860SPratik Patel #define CORESIGHT_COMPIDR3 0xffC 27a06ae860SPratik Patel 28a06ae860SPratik Patel #define ETM_ARCH_V3_3 0x23 29a06ae860SPratik Patel #define ETM_ARCH_V3_5 0x25 30a06ae860SPratik Patel #define PFT_ARCH_V1_0 0x30 31a06ae860SPratik Patel #define PFT_ARCH_V1_1 0x31 32a06ae860SPratik Patel 33a06ae860SPratik Patel #define CORESIGHT_UNLOCK 0xc5acce55 34a06ae860SPratik Patel 35a06ae860SPratik Patel extern struct bus_type coresight_bustype; 36a06ae860SPratik Patel 37a06ae860SPratik Patel enum coresight_dev_type { 38a06ae860SPratik Patel CORESIGHT_DEV_TYPE_NONE, 39a06ae860SPratik Patel CORESIGHT_DEV_TYPE_SINK, 40a06ae860SPratik Patel CORESIGHT_DEV_TYPE_LINK, 41a06ae860SPratik Patel CORESIGHT_DEV_TYPE_LINKSINK, 42a06ae860SPratik Patel CORESIGHT_DEV_TYPE_SOURCE, 43*8a091d84SSuzuki K Poulose CORESIGHT_DEV_TYPE_HELPER, 44a06ae860SPratik Patel }; 45a06ae860SPratik Patel 46a06ae860SPratik Patel enum coresight_dev_subtype_sink { 47a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SINK_NONE, 48a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SINK_PORT, 49a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, 50a06ae860SPratik Patel }; 51a06ae860SPratik Patel 52a06ae860SPratik Patel enum coresight_dev_subtype_link { 53a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_NONE, 54a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_MERG, 55a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_SPLIT, 56a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_FIFO, 57a06ae860SPratik Patel }; 58a06ae860SPratik Patel 59a06ae860SPratik Patel enum coresight_dev_subtype_source { 60a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_NONE, 61a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, 62a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, 63a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, 64a06ae860SPratik Patel }; 65a06ae860SPratik Patel 66*8a091d84SSuzuki K Poulose enum coresight_dev_subtype_helper { 67*8a091d84SSuzuki K Poulose CORESIGHT_DEV_SUBTYPE_HELPER_NONE, 68*8a091d84SSuzuki K Poulose }; 69*8a091d84SSuzuki K Poulose 70a06ae860SPratik Patel /** 7100b78e8bSSuzuki K Poulose * union coresight_dev_subtype - further characterisation of a type 72a06ae860SPratik Patel * @sink_subtype: type of sink this component is, as defined 7300b78e8bSSuzuki K Poulose * by @coresight_dev_subtype_sink. 74a06ae860SPratik Patel * @link_subtype: type of link this component is, as defined 7500b78e8bSSuzuki K Poulose * by @coresight_dev_subtype_link. 76a06ae860SPratik Patel * @source_subtype: type of source this component is, as defined 7700b78e8bSSuzuki K Poulose * by @coresight_dev_subtype_source. 78*8a091d84SSuzuki K Poulose * @helper_subtype: type of helper this component is, as defined 79*8a091d84SSuzuki K Poulose * by @coresight_dev_subtype_helper. 80a06ae860SPratik Patel */ 8100b78e8bSSuzuki K Poulose union coresight_dev_subtype { 8200b78e8bSSuzuki K Poulose /* We have some devices which acts as LINK and SINK */ 8300b78e8bSSuzuki K Poulose struct { 84a06ae860SPratik Patel enum coresight_dev_subtype_sink sink_subtype; 85a06ae860SPratik Patel enum coresight_dev_subtype_link link_subtype; 8600b78e8bSSuzuki K Poulose }; 87a06ae860SPratik Patel enum coresight_dev_subtype_source source_subtype; 88*8a091d84SSuzuki K Poulose enum coresight_dev_subtype_helper helper_subtype; 89a06ae860SPratik Patel }; 90a06ae860SPratik Patel 91a06ae860SPratik Patel /** 92a06ae860SPratik Patel * struct coresight_platform_data - data harvested from the DT specification 93a06ae860SPratik Patel * @cpu: the CPU a source belongs to. Only applicable for ETM/PTMs. 94a06ae860SPratik Patel * @name: name of the component as shown under sysfs. 95a06ae860SPratik Patel * @nr_inport: number of input ports for this component. 968ee885a9SPankaj Dubey * @outports: list of remote endpoint port number. 97a06ae860SPratik Patel * @child_names:name of all child components connected to this device. 98a06ae860SPratik Patel * @child_ports:child component port number the current component is 99a06ae860SPratik Patel connected to. 100a06ae860SPratik Patel * @nr_outport: number of output ports for this component. 101a06ae860SPratik Patel */ 102a06ae860SPratik Patel struct coresight_platform_data { 103a06ae860SPratik Patel int cpu; 104a06ae860SPratik Patel const char *name; 105a06ae860SPratik Patel int nr_inport; 106a06ae860SPratik Patel int *outports; 107a06ae860SPratik Patel const char **child_names; 108a06ae860SPratik Patel int *child_ports; 109a06ae860SPratik Patel int nr_outport; 110a06ae860SPratik Patel }; 111a06ae860SPratik Patel 112a06ae860SPratik Patel /** 113a06ae860SPratik Patel * struct coresight_desc - description of a component required from drivers 114a06ae860SPratik Patel * @type: as defined by @coresight_dev_type. 115a06ae860SPratik Patel * @subtype: as defined by @coresight_dev_subtype. 116a06ae860SPratik Patel * @ops: generic operations for this component, as defined 117a06ae860SPratik Patel by @coresight_ops. 118a06ae860SPratik Patel * @pdata: platform data collected from DT. 119a06ae860SPratik Patel * @dev: The device entity associated to this component. 120a06ae860SPratik Patel * @groups: operations specific to this component. These will end up 121a06ae860SPratik Patel in the component's sysfs sub-directory. 122a06ae860SPratik Patel */ 123a06ae860SPratik Patel struct coresight_desc { 124a06ae860SPratik Patel enum coresight_dev_type type; 12500b78e8bSSuzuki K Poulose union coresight_dev_subtype subtype; 126a06ae860SPratik Patel const struct coresight_ops *ops; 127a06ae860SPratik Patel struct coresight_platform_data *pdata; 128a06ae860SPratik Patel struct device *dev; 129a06ae860SPratik Patel const struct attribute_group **groups; 130a06ae860SPratik Patel }; 131a06ae860SPratik Patel 132a06ae860SPratik Patel /** 133a06ae860SPratik Patel * struct coresight_connection - representation of a single connection 134a06ae860SPratik Patel * @outport: a connection's output port number. 135a06ae860SPratik Patel * @chid_name: remote component's name. 136a06ae860SPratik Patel * @child_port: remote component's port number @output is connected to. 137a06ae860SPratik Patel * @child_dev: a @coresight_device representation of the component 138a06ae860SPratik Patel connected to @outport. 139a06ae860SPratik Patel */ 140a06ae860SPratik Patel struct coresight_connection { 141a06ae860SPratik Patel int outport; 142a06ae860SPratik Patel const char *child_name; 143a06ae860SPratik Patel int child_port; 144a06ae860SPratik Patel struct coresight_device *child_dev; 145a06ae860SPratik Patel }; 146a06ae860SPratik Patel 147a06ae860SPratik Patel /** 148a06ae860SPratik Patel * struct coresight_device - representation of a device as used by the framework 1498ee885a9SPankaj Dubey * @conns: array of coresight_connections associated to this component. 150a06ae860SPratik Patel * @nr_inport: number of input port associated to this component. 151a06ae860SPratik Patel * @nr_outport: number of output port associated to this component. 152a06ae860SPratik Patel * @type: as defined by @coresight_dev_type. 153a06ae860SPratik Patel * @subtype: as defined by @coresight_dev_subtype. 154a06ae860SPratik Patel * @ops: generic operations for this component, as defined 155a06ae860SPratik Patel by @coresight_ops. 156a06ae860SPratik Patel * @dev: The device entity associated to this component. 157a06ae860SPratik Patel * @refcnt: keep track of what is in use. 158a06ae860SPratik Patel * @orphan: true if the component has connections that haven't been linked. 159a06ae860SPratik Patel * @enable: 'true' if component is currently part of an active path. 160a06ae860SPratik Patel * @activated: 'true' only if a _sink_ has been activated. A sink can be 161a06ae860SPratik Patel activated but not yet enabled. Enabling for a _sink_ 162a06ae860SPratik Patel happens when a source has been selected for that it. 163a06ae860SPratik Patel */ 164a06ae860SPratik Patel struct coresight_device { 165a06ae860SPratik Patel struct coresight_connection *conns; 166a06ae860SPratik Patel int nr_inport; 167a06ae860SPratik Patel int nr_outport; 168a06ae860SPratik Patel enum coresight_dev_type type; 16900b78e8bSSuzuki K Poulose union coresight_dev_subtype subtype; 170a06ae860SPratik Patel const struct coresight_ops *ops; 171a06ae860SPratik Patel struct device dev; 172a06ae860SPratik Patel atomic_t *refcnt; 173a06ae860SPratik Patel bool orphan; 174a06ae860SPratik Patel bool enable; /* true only if configured as part of a path */ 175a06ae860SPratik Patel bool activated; /* true only if a sink is part of a path */ 176a06ae860SPratik Patel }; 177a06ae860SPratik Patel 178a06ae860SPratik Patel #define to_coresight_device(d) container_of(d, struct coresight_device, dev) 179a06ae860SPratik Patel 180a06ae860SPratik Patel #define source_ops(csdev) csdev->ops->source_ops 181a06ae860SPratik Patel #define sink_ops(csdev) csdev->ops->sink_ops 182a06ae860SPratik Patel #define link_ops(csdev) csdev->ops->link_ops 183*8a091d84SSuzuki K Poulose #define helper_ops(csdev) csdev->ops->helper_ops 184a06ae860SPratik Patel 185a06ae860SPratik Patel /** 186a06ae860SPratik Patel * struct coresight_ops_sink - basic operations for a sink 187a06ae860SPratik Patel * Operations available for sinks 188a06ae860SPratik Patel * @enable: enables the sink. 189a06ae860SPratik Patel * @disable: disables the sink. 1902997aa40SMathieu Poirier * @alloc_buffer: initialises perf's ring buffer for trace collection. 1912997aa40SMathieu Poirier * @free_buffer: release memory allocated in @get_config. 1922997aa40SMathieu Poirier * @set_buffer: initialises buffer mechanic before a trace session. 1932997aa40SMathieu Poirier * @reset_buffer: finalises buffer mechanic after a trace session. 1942997aa40SMathieu Poirier * @update_buffer: update buffer pointers after a trace session. 195a06ae860SPratik Patel */ 196a06ae860SPratik Patel struct coresight_ops_sink { 197e827d455SMathieu Poirier int (*enable)(struct coresight_device *csdev, u32 mode); 198a06ae860SPratik Patel void (*disable)(struct coresight_device *csdev); 1992997aa40SMathieu Poirier void *(*alloc_buffer)(struct coresight_device *csdev, int cpu, 2002997aa40SMathieu Poirier void **pages, int nr_pages, bool overwrite); 2012997aa40SMathieu Poirier void (*free_buffer)(void *config); 2022997aa40SMathieu Poirier int (*set_buffer)(struct coresight_device *csdev, 2032997aa40SMathieu Poirier struct perf_output_handle *handle, 2042997aa40SMathieu Poirier void *sink_config); 2052997aa40SMathieu Poirier unsigned long (*reset_buffer)(struct coresight_device *csdev, 2062997aa40SMathieu Poirier struct perf_output_handle *handle, 207f4c0b0aaSWill Deacon void *sink_config); 2082997aa40SMathieu Poirier void (*update_buffer)(struct coresight_device *csdev, 2092997aa40SMathieu Poirier struct perf_output_handle *handle, 2102997aa40SMathieu Poirier void *sink_config); 211a06ae860SPratik Patel }; 212a06ae860SPratik Patel 213a06ae860SPratik Patel /** 214a06ae860SPratik Patel * struct coresight_ops_link - basic operations for a link 215a06ae860SPratik Patel * Operations available for links. 216a06ae860SPratik Patel * @enable: enables flow between iport and oport. 217a06ae860SPratik Patel * @disable: disables flow between iport and oport. 218a06ae860SPratik Patel */ 219a06ae860SPratik Patel struct coresight_ops_link { 220a06ae860SPratik Patel int (*enable)(struct coresight_device *csdev, int iport, int oport); 221a06ae860SPratik Patel void (*disable)(struct coresight_device *csdev, int iport, int oport); 222a06ae860SPratik Patel }; 223a06ae860SPratik Patel 224a06ae860SPratik Patel /** 225a06ae860SPratik Patel * struct coresight_ops_source - basic operations for a source 226a06ae860SPratik Patel * Operations available for sources. 22752210c87SMathieu Poirier * @cpu_id: returns the value of the CPU number this component 22852210c87SMathieu Poirier * is associated to. 229a06ae860SPratik Patel * @trace_id: returns the value of the component's trace ID as known 230882d5e11SMathieu Poirier * to the HW. 2311d27ff5aSMathieu Poirier * @enable: enables tracing for a source. 232a06ae860SPratik Patel * @disable: disables tracing for a source. 233a06ae860SPratik Patel */ 234a06ae860SPratik Patel struct coresight_ops_source { 23552210c87SMathieu Poirier int (*cpu_id)(struct coresight_device *csdev); 236a06ae860SPratik Patel int (*trace_id)(struct coresight_device *csdev); 237882d5e11SMathieu Poirier int (*enable)(struct coresight_device *csdev, 23868905d73SMathieu Poirier struct perf_event *event, u32 mode); 23968905d73SMathieu Poirier void (*disable)(struct coresight_device *csdev, 24068905d73SMathieu Poirier struct perf_event *event); 241a06ae860SPratik Patel }; 242a06ae860SPratik Patel 243*8a091d84SSuzuki K Poulose /** 244*8a091d84SSuzuki K Poulose * struct coresight_ops_helper - Operations for a helper device. 245*8a091d84SSuzuki K Poulose * 246*8a091d84SSuzuki K Poulose * All operations could pass in a device specific data, which could 247*8a091d84SSuzuki K Poulose * help the helper device to determine what to do. 248*8a091d84SSuzuki K Poulose * 249*8a091d84SSuzuki K Poulose * @enable : Enable the device 250*8a091d84SSuzuki K Poulose * @disable : Disable the device 251*8a091d84SSuzuki K Poulose */ 252*8a091d84SSuzuki K Poulose struct coresight_ops_helper { 253*8a091d84SSuzuki K Poulose int (*enable)(struct coresight_device *csdev, void *data); 254*8a091d84SSuzuki K Poulose int (*disable)(struct coresight_device *csdev, void *data); 255*8a091d84SSuzuki K Poulose }; 256*8a091d84SSuzuki K Poulose 257a06ae860SPratik Patel struct coresight_ops { 258a06ae860SPratik Patel const struct coresight_ops_sink *sink_ops; 259a06ae860SPratik Patel const struct coresight_ops_link *link_ops; 260a06ae860SPratik Patel const struct coresight_ops_source *source_ops; 261*8a091d84SSuzuki K Poulose const struct coresight_ops_helper *helper_ops; 262a06ae860SPratik Patel }; 263a06ae860SPratik Patel 264a06ae860SPratik Patel #ifdef CONFIG_CORESIGHT 265a06ae860SPratik Patel extern struct coresight_device * 266a06ae860SPratik Patel coresight_register(struct coresight_desc *desc); 267a06ae860SPratik Patel extern void coresight_unregister(struct coresight_device *csdev); 268a06ae860SPratik Patel extern int coresight_enable(struct coresight_device *csdev); 269a06ae860SPratik Patel extern void coresight_disable(struct coresight_device *csdev); 270a06ae860SPratik Patel extern int coresight_timeout(void __iomem *addr, u32 offset, 271a06ae860SPratik Patel int position, int value); 272a06ae860SPratik Patel #else 273a06ae860SPratik Patel static inline struct coresight_device * 274a06ae860SPratik Patel coresight_register(struct coresight_desc *desc) { return NULL; } 275a06ae860SPratik Patel static inline void coresight_unregister(struct coresight_device *csdev) {} 276a06ae860SPratik Patel static inline int 277a06ae860SPratik Patel coresight_enable(struct coresight_device *csdev) { return -ENOSYS; } 278a06ae860SPratik Patel static inline void coresight_disable(struct coresight_device *csdev) {} 279a06ae860SPratik Patel static inline int coresight_timeout(void __iomem *addr, u32 offset, 280a06ae860SPratik Patel int position, int value) { return 1; } 281c61c4b5dSMathieu Poirier #endif 282c61c4b5dSMathieu Poirier 283a06ae860SPratik Patel #ifdef CONFIG_OF 284c56cdd7aSLeo Yan extern int of_coresight_get_cpu(const struct device_node *node); 285f42fe520SLeo Yan extern struct coresight_platform_data * 286f42fe520SLeo Yan of_get_coresight_platform_data(struct device *dev, 287f42fe520SLeo Yan const struct device_node *node); 288c61c4b5dSMathieu Poirier #else 289c56cdd7aSLeo Yan static inline int of_coresight_get_cpu(const struct device_node *node) 290c56cdd7aSLeo Yan { return 0; } 291a06ae860SPratik Patel static inline struct coresight_platform_data *of_get_coresight_platform_data( 292f42fe520SLeo Yan struct device *dev, const struct device_node *node) { return NULL; } 293a06ae860SPratik Patel #endif 294a06ae860SPratik Patel 295a06ae860SPratik Patel #endif 296