xref: /linux-6.15/include/linux/coresight.h (revision 52210c87)
1a06ae860SPratik Patel /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
2a06ae860SPratik Patel  *
3a06ae860SPratik Patel  * This program is free software; you can redistribute it and/or modify
4a06ae860SPratik Patel  * it under the terms of the GNU General Public License version 2 and
5a06ae860SPratik Patel  * only version 2 as published by the Free Software Foundation.
6a06ae860SPratik Patel  *
7a06ae860SPratik Patel  * This program is distributed in the hope that it will be useful,
8a06ae860SPratik Patel  * but WITHOUT ANY WARRANTY; without even the implied warranty of
9a06ae860SPratik Patel  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
10a06ae860SPratik Patel  * GNU General Public License for more details.
11a06ae860SPratik Patel  */
12a06ae860SPratik Patel 
13a06ae860SPratik Patel #ifndef _LINUX_CORESIGHT_H
14a06ae860SPratik Patel #define _LINUX_CORESIGHT_H
15a06ae860SPratik Patel 
16a06ae860SPratik Patel #include <linux/device.h>
17ff63ec13SMark Brown #include <linux/sched.h>
18a06ae860SPratik Patel 
19a06ae860SPratik Patel /* Peripheral id registers (0xFD0-0xFEC) */
20a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR4	0xfd0
21a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR5	0xfd4
22a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR6	0xfd8
23a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR7	0xfdC
24a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR0	0xfe0
25a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR1	0xfe4
26a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR2	0xfe8
27a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR3	0xfeC
28a06ae860SPratik Patel /* Component id registers (0xFF0-0xFFC) */
29a06ae860SPratik Patel #define CORESIGHT_COMPIDR0	0xff0
30a06ae860SPratik Patel #define CORESIGHT_COMPIDR1	0xff4
31a06ae860SPratik Patel #define CORESIGHT_COMPIDR2	0xff8
32a06ae860SPratik Patel #define CORESIGHT_COMPIDR3	0xffC
33a06ae860SPratik Patel 
34a06ae860SPratik Patel #define ETM_ARCH_V3_3		0x23
35a06ae860SPratik Patel #define ETM_ARCH_V3_5		0x25
36a06ae860SPratik Patel #define PFT_ARCH_V1_0		0x30
37a06ae860SPratik Patel #define PFT_ARCH_V1_1		0x31
38a06ae860SPratik Patel 
39a06ae860SPratik Patel #define CORESIGHT_UNLOCK	0xc5acce55
40a06ae860SPratik Patel 
41a06ae860SPratik Patel extern struct bus_type coresight_bustype;
42a06ae860SPratik Patel 
43a06ae860SPratik Patel enum coresight_dev_type {
44a06ae860SPratik Patel 	CORESIGHT_DEV_TYPE_NONE,
45a06ae860SPratik Patel 	CORESIGHT_DEV_TYPE_SINK,
46a06ae860SPratik Patel 	CORESIGHT_DEV_TYPE_LINK,
47a06ae860SPratik Patel 	CORESIGHT_DEV_TYPE_LINKSINK,
48a06ae860SPratik Patel 	CORESIGHT_DEV_TYPE_SOURCE,
49a06ae860SPratik Patel };
50a06ae860SPratik Patel 
51a06ae860SPratik Patel enum coresight_dev_subtype_sink {
52a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_SINK_NONE,
53a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_SINK_PORT,
54a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
55a06ae860SPratik Patel };
56a06ae860SPratik Patel 
57a06ae860SPratik Patel enum coresight_dev_subtype_link {
58a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_LINK_NONE,
59a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_LINK_MERG,
60a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_LINK_SPLIT,
61a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_LINK_FIFO,
62a06ae860SPratik Patel };
63a06ae860SPratik Patel 
64a06ae860SPratik Patel enum coresight_dev_subtype_source {
65a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_SOURCE_NONE,
66a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
67a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
68a06ae860SPratik Patel 	CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
69a06ae860SPratik Patel };
70a06ae860SPratik Patel 
71a06ae860SPratik Patel /**
72a06ae860SPratik Patel  * struct coresight_dev_subtype - further characterisation of a type
73a06ae860SPratik Patel  * @sink_subtype:	type of sink this component is, as defined
74a06ae860SPratik Patel 			by @coresight_dev_subtype_sink.
75a06ae860SPratik Patel  * @link_subtype:	type of link this component is, as defined
76a06ae860SPratik Patel 			by @coresight_dev_subtype_link.
77a06ae860SPratik Patel  * @source_subtype:	type of source this component is, as defined
78a06ae860SPratik Patel 			by @coresight_dev_subtype_source.
79a06ae860SPratik Patel  */
80a06ae860SPratik Patel struct coresight_dev_subtype {
81a06ae860SPratik Patel 	enum coresight_dev_subtype_sink sink_subtype;
82a06ae860SPratik Patel 	enum coresight_dev_subtype_link link_subtype;
83a06ae860SPratik Patel 	enum coresight_dev_subtype_source source_subtype;
84a06ae860SPratik Patel };
85a06ae860SPratik Patel 
86a06ae860SPratik Patel /**
87a06ae860SPratik Patel  * struct coresight_platform_data - data harvested from the DT specification
88a06ae860SPratik Patel  * @cpu:	the CPU a source belongs to. Only applicable for ETM/PTMs.
89a06ae860SPratik Patel  * @name:	name of the component as shown under sysfs.
90a06ae860SPratik Patel  * @nr_inport:	number of input ports for this component.
918ee885a9SPankaj Dubey  * @outports:	list of remote endpoint port number.
92a06ae860SPratik Patel  * @child_names:name of all child components connected to this device.
93a06ae860SPratik Patel  * @child_ports:child component port number the current component is
94a06ae860SPratik Patel 		connected  to.
95a06ae860SPratik Patel  * @nr_outport:	number of output ports for this component.
96a06ae860SPratik Patel  * @clk:	The clock this component is associated to.
97a06ae860SPratik Patel  */
98a06ae860SPratik Patel struct coresight_platform_data {
99a06ae860SPratik Patel 	int cpu;
100a06ae860SPratik Patel 	const char *name;
101a06ae860SPratik Patel 	int nr_inport;
102a06ae860SPratik Patel 	int *outports;
103a06ae860SPratik Patel 	const char **child_names;
104a06ae860SPratik Patel 	int *child_ports;
105a06ae860SPratik Patel 	int nr_outport;
106a06ae860SPratik Patel 	struct clk *clk;
107a06ae860SPratik Patel };
108a06ae860SPratik Patel 
109a06ae860SPratik Patel /**
110a06ae860SPratik Patel  * struct coresight_desc - description of a component required from drivers
111a06ae860SPratik Patel  * @type:	as defined by @coresight_dev_type.
112a06ae860SPratik Patel  * @subtype:	as defined by @coresight_dev_subtype.
113a06ae860SPratik Patel  * @ops:	generic operations for this component, as defined
114a06ae860SPratik Patel 		by @coresight_ops.
115a06ae860SPratik Patel  * @pdata:	platform data collected from DT.
116a06ae860SPratik Patel  * @dev:	The device entity associated to this component.
117a06ae860SPratik Patel  * @groups:	operations specific to this component. These will end up
118a06ae860SPratik Patel 		in the component's sysfs sub-directory.
119a06ae860SPratik Patel  */
120a06ae860SPratik Patel struct coresight_desc {
121a06ae860SPratik Patel 	enum coresight_dev_type type;
122a06ae860SPratik Patel 	struct coresight_dev_subtype subtype;
123a06ae860SPratik Patel 	const struct coresight_ops *ops;
124a06ae860SPratik Patel 	struct coresight_platform_data *pdata;
125a06ae860SPratik Patel 	struct device *dev;
126a06ae860SPratik Patel 	const struct attribute_group **groups;
127a06ae860SPratik Patel };
128a06ae860SPratik Patel 
129a06ae860SPratik Patel /**
130a06ae860SPratik Patel  * struct coresight_connection - representation of a single connection
131a06ae860SPratik Patel  * @outport:	a connection's output port number.
132a06ae860SPratik Patel  * @chid_name:	remote component's name.
133a06ae860SPratik Patel  * @child_port:	remote component's port number @output is connected to.
134a06ae860SPratik Patel  * @child_dev:	a @coresight_device representation of the component
135a06ae860SPratik Patel 		connected to @outport.
136a06ae860SPratik Patel  */
137a06ae860SPratik Patel struct coresight_connection {
138a06ae860SPratik Patel 	int outport;
139a06ae860SPratik Patel 	const char *child_name;
140a06ae860SPratik Patel 	int child_port;
141a06ae860SPratik Patel 	struct coresight_device *child_dev;
142a06ae860SPratik Patel };
143a06ae860SPratik Patel 
144a06ae860SPratik Patel /**
145a06ae860SPratik Patel  * struct coresight_device - representation of a device as used by the framework
1468ee885a9SPankaj Dubey  * @conns:	array of coresight_connections associated to this component.
147a06ae860SPratik Patel  * @nr_inport:	number of input port associated to this component.
148a06ae860SPratik Patel  * @nr_outport:	number of output port associated to this component.
149a06ae860SPratik Patel  * @type:	as defined by @coresight_dev_type.
150a06ae860SPratik Patel  * @subtype:	as defined by @coresight_dev_subtype.
151a06ae860SPratik Patel  * @ops:	generic operations for this component, as defined
152a06ae860SPratik Patel 		by @coresight_ops.
153a06ae860SPratik Patel  * @dev:	The device entity associated to this component.
154a06ae860SPratik Patel  * @refcnt:	keep track of what is in use.
155a06ae860SPratik Patel  * @path_link:	link of current component into the path being enabled.
156a06ae860SPratik Patel  * @orphan:	true if the component has connections that haven't been linked.
157a06ae860SPratik Patel  * @enable:	'true' if component is currently part of an active path.
158a06ae860SPratik Patel  * @activated:	'true' only if a _sink_ has been activated.  A sink can be
159a06ae860SPratik Patel 		activated but not yet enabled.  Enabling for a _sink_
160a06ae860SPratik Patel 		happens when a source has been selected for that it.
161a06ae860SPratik Patel  */
162a06ae860SPratik Patel struct coresight_device {
163a06ae860SPratik Patel 	struct coresight_connection *conns;
164a06ae860SPratik Patel 	int nr_inport;
165a06ae860SPratik Patel 	int nr_outport;
166a06ae860SPratik Patel 	enum coresight_dev_type type;
167a06ae860SPratik Patel 	struct coresight_dev_subtype subtype;
168a06ae860SPratik Patel 	const struct coresight_ops *ops;
169a06ae860SPratik Patel 	struct device dev;
170a06ae860SPratik Patel 	atomic_t *refcnt;
171a06ae860SPratik Patel 	struct list_head path_link;
172a06ae860SPratik Patel 	bool orphan;
173a06ae860SPratik Patel 	bool enable;	/* true only if configured as part of a path */
174a06ae860SPratik Patel 	bool activated;	/* true only if a sink is part of a path */
175a06ae860SPratik Patel };
176a06ae860SPratik Patel 
177a06ae860SPratik Patel #define to_coresight_device(d) container_of(d, struct coresight_device, dev)
178a06ae860SPratik Patel 
179a06ae860SPratik Patel #define source_ops(csdev)	csdev->ops->source_ops
180a06ae860SPratik Patel #define sink_ops(csdev)		csdev->ops->sink_ops
181a06ae860SPratik Patel #define link_ops(csdev)		csdev->ops->link_ops
182a06ae860SPratik Patel 
183a06ae860SPratik Patel /**
184a06ae860SPratik Patel  * struct coresight_ops_sink - basic operations for a sink
185a06ae860SPratik Patel  * Operations available for sinks
186a06ae860SPratik Patel  * @enable:	enables the sink.
187a06ae860SPratik Patel  * @disable:	disables the sink.
188a06ae860SPratik Patel  */
189a06ae860SPratik Patel struct coresight_ops_sink {
190a06ae860SPratik Patel 	int (*enable)(struct coresight_device *csdev);
191a06ae860SPratik Patel 	void (*disable)(struct coresight_device *csdev);
192a06ae860SPratik Patel };
193a06ae860SPratik Patel 
194a06ae860SPratik Patel /**
195a06ae860SPratik Patel  * struct coresight_ops_link - basic operations for a link
196a06ae860SPratik Patel  * Operations available for links.
197a06ae860SPratik Patel  * @enable:	enables flow between iport and oport.
198a06ae860SPratik Patel  * @disable:	disables flow between iport and oport.
199a06ae860SPratik Patel  */
200a06ae860SPratik Patel struct coresight_ops_link {
201a06ae860SPratik Patel 	int (*enable)(struct coresight_device *csdev, int iport, int oport);
202a06ae860SPratik Patel 	void (*disable)(struct coresight_device *csdev, int iport, int oport);
203a06ae860SPratik Patel };
204a06ae860SPratik Patel 
205a06ae860SPratik Patel /**
206a06ae860SPratik Patel  * struct coresight_ops_source - basic operations for a source
207a06ae860SPratik Patel  * Operations available for sources.
208*52210c87SMathieu Poirier  * @cpu_id:	returns the value of the CPU number this component
209*52210c87SMathieu Poirier  *		is associated to.
210a06ae860SPratik Patel  * @trace_id:	returns the value of the component's trace ID as known
211a06ae860SPratik Patel 		to the HW.
2121d27ff5aSMathieu Poirier  * @enable:	enables tracing for a source.
213a06ae860SPratik Patel  * @disable:	disables tracing for a source.
214a06ae860SPratik Patel  */
215a06ae860SPratik Patel struct coresight_ops_source {
216*52210c87SMathieu Poirier 	int (*cpu_id)(struct coresight_device *csdev);
217a06ae860SPratik Patel 	int (*trace_id)(struct coresight_device *csdev);
218a06ae860SPratik Patel 	int (*enable)(struct coresight_device *csdev);
219a06ae860SPratik Patel 	void (*disable)(struct coresight_device *csdev);
220a06ae860SPratik Patel };
221a06ae860SPratik Patel 
222a06ae860SPratik Patel struct coresight_ops {
223a06ae860SPratik Patel 	const struct coresight_ops_sink *sink_ops;
224a06ae860SPratik Patel 	const struct coresight_ops_link *link_ops;
225a06ae860SPratik Patel 	const struct coresight_ops_source *source_ops;
226a06ae860SPratik Patel };
227a06ae860SPratik Patel 
228a06ae860SPratik Patel #ifdef CONFIG_CORESIGHT
229a06ae860SPratik Patel extern struct coresight_device *
230a06ae860SPratik Patel coresight_register(struct coresight_desc *desc);
231a06ae860SPratik Patel extern void coresight_unregister(struct coresight_device *csdev);
232a06ae860SPratik Patel extern int coresight_enable(struct coresight_device *csdev);
233a06ae860SPratik Patel extern void coresight_disable(struct coresight_device *csdev);
234a06ae860SPratik Patel extern int coresight_timeout(void __iomem *addr, u32 offset,
235a06ae860SPratik Patel 			     int position, int value);
236a06ae860SPratik Patel #else
237a06ae860SPratik Patel static inline struct coresight_device *
238a06ae860SPratik Patel coresight_register(struct coresight_desc *desc) { return NULL; }
239a06ae860SPratik Patel static inline void coresight_unregister(struct coresight_device *csdev) {}
240a06ae860SPratik Patel static inline int
241a06ae860SPratik Patel coresight_enable(struct coresight_device *csdev) { return -ENOSYS; }
242a06ae860SPratik Patel static inline void coresight_disable(struct coresight_device *csdev) {}
243a06ae860SPratik Patel static inline int coresight_timeout(void __iomem *addr, u32 offset,
244a06ae860SPratik Patel 				     int position, int value) { return 1; }
245c61c4b5dSMathieu Poirier #endif
246c61c4b5dSMathieu Poirier 
247a06ae860SPratik Patel #ifdef CONFIG_OF
248c61c4b5dSMathieu Poirier extern struct coresight_platform_data *of_get_coresight_platform_data(
249c61c4b5dSMathieu Poirier 				struct device *dev, struct device_node *node);
250c61c4b5dSMathieu Poirier #else
251a06ae860SPratik Patel static inline struct coresight_platform_data *of_get_coresight_platform_data(
252a06ae860SPratik Patel 	struct device *dev, struct device_node *node) { return NULL; }
253a06ae860SPratik Patel #endif
254a06ae860SPratik Patel 
25572210227SChunyan Zhang #ifdef CONFIG_PID_NS
25672210227SChunyan Zhang static inline unsigned long
25772210227SChunyan Zhang coresight_vpid_to_pid(unsigned long vpid)
25872210227SChunyan Zhang {
25972210227SChunyan Zhang 	struct task_struct *task = NULL;
26072210227SChunyan Zhang 	unsigned long pid = 0;
26172210227SChunyan Zhang 
26272210227SChunyan Zhang 	rcu_read_lock();
26372210227SChunyan Zhang 	task = find_task_by_vpid(vpid);
26472210227SChunyan Zhang 	if (task)
26572210227SChunyan Zhang 		pid = task_pid_nr(task);
26672210227SChunyan Zhang 	rcu_read_unlock();
26772210227SChunyan Zhang 
26872210227SChunyan Zhang 	return pid;
26972210227SChunyan Zhang }
27072210227SChunyan Zhang #else
27172210227SChunyan Zhang static inline unsigned long
27272210227SChunyan Zhang coresight_vpid_to_pid(unsigned long vpid) { return vpid; }
27372210227SChunyan Zhang #endif
27472210227SChunyan Zhang 
275a06ae860SPratik Patel #endif
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