1ad0dfdfdSMathieu Poirier /* SPDX-License-Identifier: GPL-2.0 */ 2ad0dfdfdSMathieu Poirier /* 3ad0dfdfdSMathieu Poirier * Copyright (c) 2012, The Linux Foundation. All rights reserved. 4a06ae860SPratik Patel */ 5a06ae860SPratik Patel 6a06ae860SPratik Patel #ifndef _LINUX_CORESIGHT_H 7a06ae860SPratik Patel #define _LINUX_CORESIGHT_H 8a06ae860SPratik Patel 9a06ae860SPratik Patel #include <linux/device.h> 10882d5e11SMathieu Poirier #include <linux/perf_event.h> 11ff63ec13SMark Brown #include <linux/sched.h> 12a06ae860SPratik Patel 13a06ae860SPratik Patel /* Peripheral id registers (0xFD0-0xFEC) */ 14a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR4 0xfd0 15a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR5 0xfd4 16a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR6 0xfd8 17a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR7 0xfdC 18a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR0 0xfe0 19a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR1 0xfe4 20a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR2 0xfe8 21a06ae860SPratik Patel #define CORESIGHT_PERIPHIDR3 0xfeC 22a06ae860SPratik Patel /* Component id registers (0xFF0-0xFFC) */ 23a06ae860SPratik Patel #define CORESIGHT_COMPIDR0 0xff0 24a06ae860SPratik Patel #define CORESIGHT_COMPIDR1 0xff4 25a06ae860SPratik Patel #define CORESIGHT_COMPIDR2 0xff8 26a06ae860SPratik Patel #define CORESIGHT_COMPIDR3 0xffC 27a06ae860SPratik Patel 28a06ae860SPratik Patel #define ETM_ARCH_V3_3 0x23 29a06ae860SPratik Patel #define ETM_ARCH_V3_5 0x25 30a06ae860SPratik Patel #define PFT_ARCH_V1_0 0x30 31a06ae860SPratik Patel #define PFT_ARCH_V1_1 0x31 32a06ae860SPratik Patel 33a06ae860SPratik Patel #define CORESIGHT_UNLOCK 0xc5acce55 34a06ae860SPratik Patel 35a06ae860SPratik Patel extern struct bus_type coresight_bustype; 36a06ae860SPratik Patel 37a06ae860SPratik Patel enum coresight_dev_type { 38a06ae860SPratik Patel CORESIGHT_DEV_TYPE_NONE, 39a06ae860SPratik Patel CORESIGHT_DEV_TYPE_SINK, 40a06ae860SPratik Patel CORESIGHT_DEV_TYPE_LINK, 41a06ae860SPratik Patel CORESIGHT_DEV_TYPE_LINKSINK, 42a06ae860SPratik Patel CORESIGHT_DEV_TYPE_SOURCE, 438a091d84SSuzuki K Poulose CORESIGHT_DEV_TYPE_HELPER, 44835d722bSMike Leach CORESIGHT_DEV_TYPE_ECT, 45a06ae860SPratik Patel }; 46a06ae860SPratik Patel 47a06ae860SPratik Patel enum coresight_dev_subtype_sink { 48a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SINK_NONE, 49a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SINK_PORT, 50a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SINK_BUFFER, 51*0336bdfdSMike Leach CORESIGHT_DEV_SUBTYPE_SINK_SYSMEM, 52a06ae860SPratik Patel }; 53a06ae860SPratik Patel 54a06ae860SPratik Patel enum coresight_dev_subtype_link { 55a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_NONE, 56a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_MERG, 57a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_SPLIT, 58a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_LINK_FIFO, 59a06ae860SPratik Patel }; 60a06ae860SPratik Patel 61a06ae860SPratik Patel enum coresight_dev_subtype_source { 62a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_NONE, 63a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_PROC, 64a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_BUS, 65a06ae860SPratik Patel CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE, 66a06ae860SPratik Patel }; 67a06ae860SPratik Patel 688a091d84SSuzuki K Poulose enum coresight_dev_subtype_helper { 698a091d84SSuzuki K Poulose CORESIGHT_DEV_SUBTYPE_HELPER_NONE, 70fcacb5c1SSuzuki K Poulose CORESIGHT_DEV_SUBTYPE_HELPER_CATU, 718a091d84SSuzuki K Poulose }; 728a091d84SSuzuki K Poulose 73835d722bSMike Leach /* Embedded Cross Trigger (ECT) sub-types */ 74835d722bSMike Leach enum coresight_dev_subtype_ect { 75835d722bSMike Leach CORESIGHT_DEV_SUBTYPE_ECT_NONE, 76835d722bSMike Leach CORESIGHT_DEV_SUBTYPE_ECT_CTI, 77835d722bSMike Leach }; 78835d722bSMike Leach 79a06ae860SPratik Patel /** 8000b78e8bSSuzuki K Poulose * union coresight_dev_subtype - further characterisation of a type 81a06ae860SPratik Patel * @sink_subtype: type of sink this component is, as defined 8200b78e8bSSuzuki K Poulose * by @coresight_dev_subtype_sink. 83a06ae860SPratik Patel * @link_subtype: type of link this component is, as defined 8400b78e8bSSuzuki K Poulose * by @coresight_dev_subtype_link. 85a06ae860SPratik Patel * @source_subtype: type of source this component is, as defined 8600b78e8bSSuzuki K Poulose * by @coresight_dev_subtype_source. 878a091d84SSuzuki K Poulose * @helper_subtype: type of helper this component is, as defined 888a091d84SSuzuki K Poulose * by @coresight_dev_subtype_helper. 89835d722bSMike Leach * @ect_subtype: type of cross trigger this component is, as 90835d722bSMike Leach * defined by @coresight_dev_subtype_ect 91a06ae860SPratik Patel */ 9200b78e8bSSuzuki K Poulose union coresight_dev_subtype { 9300b78e8bSSuzuki K Poulose /* We have some devices which acts as LINK and SINK */ 9400b78e8bSSuzuki K Poulose struct { 95a06ae860SPratik Patel enum coresight_dev_subtype_sink sink_subtype; 96a06ae860SPratik Patel enum coresight_dev_subtype_link link_subtype; 9700b78e8bSSuzuki K Poulose }; 98a06ae860SPratik Patel enum coresight_dev_subtype_source source_subtype; 998a091d84SSuzuki K Poulose enum coresight_dev_subtype_helper helper_subtype; 100835d722bSMike Leach enum coresight_dev_subtype_ect ect_subtype; 101a06ae860SPratik Patel }; 102a06ae860SPratik Patel 103a06ae860SPratik Patel /** 104d375b356SSuzuki K Poulose * struct coresight_platform_data - data harvested from the firmware 105d375b356SSuzuki K Poulose * specification. 106d375b356SSuzuki K Poulose * 107d375b356SSuzuki K Poulose * @nr_inport: Number of elements for the input connections. 108d375b356SSuzuki K Poulose * @nr_outport: Number of elements for the output connections. 109d375b356SSuzuki K Poulose * @conns: Sparse array of nr_outport connections from this component. 110a06ae860SPratik Patel */ 111a06ae860SPratik Patel struct coresight_platform_data { 112a06ae860SPratik Patel int nr_inport; 113a06ae860SPratik Patel int nr_outport; 114c2c72941SSuzuki K Poulose struct coresight_connection *conns; 115a06ae860SPratik Patel }; 116a06ae860SPratik Patel 117a06ae860SPratik Patel /** 118a06ae860SPratik Patel * struct coresight_desc - description of a component required from drivers 119a06ae860SPratik Patel * @type: as defined by @coresight_dev_type. 120a06ae860SPratik Patel * @subtype: as defined by @coresight_dev_subtype. 121a06ae860SPratik Patel * @ops: generic operations for this component, as defined 1222ede79a6SSuzuki K Poulose * by @coresight_ops. 123a06ae860SPratik Patel * @pdata: platform data collected from DT. 124a06ae860SPratik Patel * @dev: The device entity associated to this component. 125a06ae860SPratik Patel * @groups: operations specific to this component. These will end up 1262ede79a6SSuzuki K Poulose * in the component's sysfs sub-directory. 1272ede79a6SSuzuki K Poulose * @name: name for the coresight device, also shown under sysfs. 128a06ae860SPratik Patel */ 129a06ae860SPratik Patel struct coresight_desc { 130a06ae860SPratik Patel enum coresight_dev_type type; 13100b78e8bSSuzuki K Poulose union coresight_dev_subtype subtype; 132a06ae860SPratik Patel const struct coresight_ops *ops; 133a06ae860SPratik Patel struct coresight_platform_data *pdata; 134a06ae860SPratik Patel struct device *dev; 135a06ae860SPratik Patel const struct attribute_group **groups; 1362ede79a6SSuzuki K Poulose const char *name; 137a06ae860SPratik Patel }; 138a06ae860SPratik Patel 139a06ae860SPratik Patel /** 140a06ae860SPratik Patel * struct coresight_connection - representation of a single connection 141a06ae860SPratik Patel * @outport: a connection's output port number. 142a06ae860SPratik Patel * @child_port: remote component's port number @output is connected to. 14337ea1ffdSSuzuki K Poulose * @chid_fwnode: remote component's fwnode handle. 144a06ae860SPratik Patel * @child_dev: a @coresight_device representation of the component 145a06ae860SPratik Patel connected to @outport. 1468a7365c2SSuzuki K Poulose * @link: Representation of the connection as a sysfs link. 147a06ae860SPratik Patel */ 148a06ae860SPratik Patel struct coresight_connection { 149a06ae860SPratik Patel int outport; 150a06ae860SPratik Patel int child_port; 15137ea1ffdSSuzuki K Poulose struct fwnode_handle *child_fwnode; 152a06ae860SPratik Patel struct coresight_device *child_dev; 1538a7365c2SSuzuki K Poulose struct coresight_sysfs_link *link; 154a06ae860SPratik Patel }; 155a06ae860SPratik Patel 156a06ae860SPratik Patel /** 15780961525SMike Leach * struct coresight_sysfs_link - representation of a connection in sysfs. 15880961525SMike Leach * @orig: Originating (master) coresight device for the link. 15980961525SMike Leach * @orig_name: Name to use for the link orig->target. 16080961525SMike Leach * @target: Target (slave) coresight device for the link. 16180961525SMike Leach * @target_name: Name to use for the link target->orig. 16280961525SMike Leach */ 16380961525SMike Leach struct coresight_sysfs_link { 16480961525SMike Leach struct coresight_device *orig; 16580961525SMike Leach const char *orig_name; 16680961525SMike Leach struct coresight_device *target; 16780961525SMike Leach const char *target_name; 16880961525SMike Leach }; 16980961525SMike Leach 17080961525SMike Leach /** 171a06ae860SPratik Patel * struct coresight_device - representation of a device as used by the framework 172b77e3ed0SSuzuki K Poulose * @pdata: Platform data with device connections associated to this device. 173a06ae860SPratik Patel * @type: as defined by @coresight_dev_type. 174a06ae860SPratik Patel * @subtype: as defined by @coresight_dev_subtype. 175a06ae860SPratik Patel * @ops: generic operations for this component, as defined 176a06ae860SPratik Patel by @coresight_ops. 177a06ae860SPratik Patel * @dev: The device entity associated to this component. 178a06ae860SPratik Patel * @refcnt: keep track of what is in use. 179a06ae860SPratik Patel * @orphan: true if the component has connections that haven't been linked. 180a06ae860SPratik Patel * @enable: 'true' if component is currently part of an active path. 181a06ae860SPratik Patel * @activated: 'true' only if a _sink_ has been activated. A sink can be 182bb8e370bSMathieu Poirier * activated but not yet enabled. Enabling for a _sink_ 183d061cd73SMike Leach * happens when a source has been selected and a path is enabled 184d061cd73SMike Leach * from source to that sink. 185bb8e370bSMathieu Poirier * @ea: Device attribute for sink representation under PMU directory. 186*0336bdfdSMike Leach * @def_sink: cached reference to default sink found for this device. 187177af828SMike Leach * @ect_dev: Associated cross trigger device. Not part of the trace data 188177af828SMike Leach * path or connections. 18980961525SMike Leach * @nr_links: number of sysfs links created to other components from this 19080961525SMike Leach * device. These will appear in the "connections" group. 19180961525SMike Leach * @has_conns_grp: Have added a "connections" group for sysfs links. 192a06ae860SPratik Patel */ 193a06ae860SPratik Patel struct coresight_device { 194b77e3ed0SSuzuki K Poulose struct coresight_platform_data *pdata; 195a06ae860SPratik Patel enum coresight_dev_type type; 19600b78e8bSSuzuki K Poulose union coresight_dev_subtype subtype; 197a06ae860SPratik Patel const struct coresight_ops *ops; 198a06ae860SPratik Patel struct device dev; 199a06ae860SPratik Patel atomic_t *refcnt; 200a06ae860SPratik Patel bool orphan; 201a06ae860SPratik Patel bool enable; /* true only if configured as part of a path */ 202bb8e370bSMathieu Poirier /* sink specific fields */ 203a06ae860SPratik Patel bool activated; /* true only if a sink is part of a path */ 204bb8e370bSMathieu Poirier struct dev_ext_attribute *ea; 205*0336bdfdSMike Leach struct coresight_device *def_sink; 206177af828SMike Leach /* cross trigger handling */ 207177af828SMike Leach struct coresight_device *ect_dev; 20880961525SMike Leach /* sysfs links between components */ 20980961525SMike Leach int nr_links; 21080961525SMike Leach bool has_conns_grp; 211a06ae860SPratik Patel }; 212a06ae860SPratik Patel 2130f5f9b6bSSuzuki K Poulose /* 2140f5f9b6bSSuzuki K Poulose * coresight_dev_list - Mapping for devices to "name" index for device 2150f5f9b6bSSuzuki K Poulose * names. 2160f5f9b6bSSuzuki K Poulose * 2170f5f9b6bSSuzuki K Poulose * @nr_idx: Number of entries already allocated. 2180f5f9b6bSSuzuki K Poulose * @pfx: Prefix pattern for device name. 2190f5f9b6bSSuzuki K Poulose * @fwnode_list: Array of fwnode_handles associated with each allocated 2200f5f9b6bSSuzuki K Poulose * index, upto nr_idx entries. 2210f5f9b6bSSuzuki K Poulose */ 2220f5f9b6bSSuzuki K Poulose struct coresight_dev_list { 2230f5f9b6bSSuzuki K Poulose int nr_idx; 2240f5f9b6bSSuzuki K Poulose const char *pfx; 2250f5f9b6bSSuzuki K Poulose struct fwnode_handle **fwnode_list; 2260f5f9b6bSSuzuki K Poulose }; 2270f5f9b6bSSuzuki K Poulose 2280f5f9b6bSSuzuki K Poulose #define DEFINE_CORESIGHT_DEVLIST(var, dev_pfx) \ 2290f5f9b6bSSuzuki K Poulose static struct coresight_dev_list (var) = { \ 2300f5f9b6bSSuzuki K Poulose .pfx = dev_pfx, \ 2310f5f9b6bSSuzuki K Poulose .nr_idx = 0, \ 2320f5f9b6bSSuzuki K Poulose .fwnode_list = NULL, \ 2330f5f9b6bSSuzuki K Poulose } 2340f5f9b6bSSuzuki K Poulose 235a06ae860SPratik Patel #define to_coresight_device(d) container_of(d, struct coresight_device, dev) 236a06ae860SPratik Patel 237a06ae860SPratik Patel #define source_ops(csdev) csdev->ops->source_ops 238a06ae860SPratik Patel #define sink_ops(csdev) csdev->ops->sink_ops 239a06ae860SPratik Patel #define link_ops(csdev) csdev->ops->link_ops 2408a091d84SSuzuki K Poulose #define helper_ops(csdev) csdev->ops->helper_ops 241835d722bSMike Leach #define ect_ops(csdev) csdev->ops->ect_ops 242a06ae860SPratik Patel 243a06ae860SPratik Patel /** 244a06ae860SPratik Patel * struct coresight_ops_sink - basic operations for a sink 245a06ae860SPratik Patel * Operations available for sinks 246a06ae860SPratik Patel * @enable: enables the sink. 247a06ae860SPratik Patel * @disable: disables the sink. 2482997aa40SMathieu Poirier * @alloc_buffer: initialises perf's ring buffer for trace collection. 2492997aa40SMathieu Poirier * @free_buffer: release memory allocated in @get_config. 2502997aa40SMathieu Poirier * @update_buffer: update buffer pointers after a trace session. 251a06ae860SPratik Patel */ 252a06ae860SPratik Patel struct coresight_ops_sink { 2533d6e8935SSuzuki K Poulose int (*enable)(struct coresight_device *csdev, u32 mode, void *data); 2546c817a95SMathieu Poirier int (*disable)(struct coresight_device *csdev); 255a0f08a6aSMathieu Poirier void *(*alloc_buffer)(struct coresight_device *csdev, 256a0f08a6aSMathieu Poirier struct perf_event *event, void **pages, 257a0f08a6aSMathieu Poirier int nr_pages, bool overwrite); 2582997aa40SMathieu Poirier void (*free_buffer)(void *config); 2597ec786adSSuzuki K Poulose unsigned long (*update_buffer)(struct coresight_device *csdev, 2602997aa40SMathieu Poirier struct perf_output_handle *handle, 2612997aa40SMathieu Poirier void *sink_config); 262a06ae860SPratik Patel }; 263a06ae860SPratik Patel 264a06ae860SPratik Patel /** 265a06ae860SPratik Patel * struct coresight_ops_link - basic operations for a link 266a06ae860SPratik Patel * Operations available for links. 267a06ae860SPratik Patel * @enable: enables flow between iport and oport. 268a06ae860SPratik Patel * @disable: disables flow between iport and oport. 269a06ae860SPratik Patel */ 270a06ae860SPratik Patel struct coresight_ops_link { 271a06ae860SPratik Patel int (*enable)(struct coresight_device *csdev, int iport, int oport); 272a06ae860SPratik Patel void (*disable)(struct coresight_device *csdev, int iport, int oport); 273a06ae860SPratik Patel }; 274a06ae860SPratik Patel 275a06ae860SPratik Patel /** 276a06ae860SPratik Patel * struct coresight_ops_source - basic operations for a source 277a06ae860SPratik Patel * Operations available for sources. 27852210c87SMathieu Poirier * @cpu_id: returns the value of the CPU number this component 27952210c87SMathieu Poirier * is associated to. 280a06ae860SPratik Patel * @trace_id: returns the value of the component's trace ID as known 281882d5e11SMathieu Poirier * to the HW. 2821d27ff5aSMathieu Poirier * @enable: enables tracing for a source. 283a06ae860SPratik Patel * @disable: disables tracing for a source. 284a06ae860SPratik Patel */ 285a06ae860SPratik Patel struct coresight_ops_source { 28652210c87SMathieu Poirier int (*cpu_id)(struct coresight_device *csdev); 287a06ae860SPratik Patel int (*trace_id)(struct coresight_device *csdev); 288882d5e11SMathieu Poirier int (*enable)(struct coresight_device *csdev, 28968905d73SMathieu Poirier struct perf_event *event, u32 mode); 29068905d73SMathieu Poirier void (*disable)(struct coresight_device *csdev, 29168905d73SMathieu Poirier struct perf_event *event); 292a06ae860SPratik Patel }; 293a06ae860SPratik Patel 2948a091d84SSuzuki K Poulose /** 2958a091d84SSuzuki K Poulose * struct coresight_ops_helper - Operations for a helper device. 2968a091d84SSuzuki K Poulose * 2978a091d84SSuzuki K Poulose * All operations could pass in a device specific data, which could 2988a091d84SSuzuki K Poulose * help the helper device to determine what to do. 2998a091d84SSuzuki K Poulose * 3008a091d84SSuzuki K Poulose * @enable : Enable the device 3018a091d84SSuzuki K Poulose * @disable : Disable the device 3028a091d84SSuzuki K Poulose */ 3038a091d84SSuzuki K Poulose struct coresight_ops_helper { 3048a091d84SSuzuki K Poulose int (*enable)(struct coresight_device *csdev, void *data); 3058a091d84SSuzuki K Poulose int (*disable)(struct coresight_device *csdev, void *data); 3068a091d84SSuzuki K Poulose }; 3078a091d84SSuzuki K Poulose 308835d722bSMike Leach /** 309835d722bSMike Leach * struct coresight_ops_ect - Ops for an embedded cross trigger device 310835d722bSMike Leach * 311835d722bSMike Leach * @enable : Enable the device 312835d722bSMike Leach * @disable : Disable the device 313835d722bSMike Leach */ 314835d722bSMike Leach struct coresight_ops_ect { 315835d722bSMike Leach int (*enable)(struct coresight_device *csdev); 316835d722bSMike Leach int (*disable)(struct coresight_device *csdev); 317835d722bSMike Leach }; 318835d722bSMike Leach 319a06ae860SPratik Patel struct coresight_ops { 320a06ae860SPratik Patel const struct coresight_ops_sink *sink_ops; 321a06ae860SPratik Patel const struct coresight_ops_link *link_ops; 322a06ae860SPratik Patel const struct coresight_ops_source *source_ops; 3238a091d84SSuzuki K Poulose const struct coresight_ops_helper *helper_ops; 324835d722bSMike Leach const struct coresight_ops_ect *ect_ops; 325a06ae860SPratik Patel }; 326a06ae860SPratik Patel 327a06ae860SPratik Patel #ifdef CONFIG_CORESIGHT 328a06ae860SPratik Patel extern struct coresight_device * 329a06ae860SPratik Patel coresight_register(struct coresight_desc *desc); 330a06ae860SPratik Patel extern void coresight_unregister(struct coresight_device *csdev); 331a06ae860SPratik Patel extern int coresight_enable(struct coresight_device *csdev); 332a06ae860SPratik Patel extern void coresight_disable(struct coresight_device *csdev); 333a06ae860SPratik Patel extern int coresight_timeout(void __iomem *addr, u32 offset, 334a06ae860SPratik Patel int position, int value); 3352478a6aeSSuzuki K Poulose 3362478a6aeSSuzuki K Poulose extern int coresight_claim_device(void __iomem *base); 3372478a6aeSSuzuki K Poulose extern int coresight_claim_device_unlocked(void __iomem *base); 3382478a6aeSSuzuki K Poulose 3392478a6aeSSuzuki K Poulose extern void coresight_disclaim_device(void __iomem *base); 3402478a6aeSSuzuki K Poulose extern void coresight_disclaim_device_unlocked(void __iomem *base); 3410f5f9b6bSSuzuki K Poulose extern char *coresight_alloc_device_name(struct coresight_dev_list *devs, 3420f5f9b6bSSuzuki K Poulose struct device *dev); 343f188b5e7SAndrew Murray 344f188b5e7SAndrew Murray extern bool coresight_loses_context_with_cpu(struct device *dev); 345a06ae860SPratik Patel #else 346a06ae860SPratik Patel static inline struct coresight_device * 347a06ae860SPratik Patel coresight_register(struct coresight_desc *desc) { return NULL; } 348a06ae860SPratik Patel static inline void coresight_unregister(struct coresight_device *csdev) {} 349a06ae860SPratik Patel static inline int 350a06ae860SPratik Patel coresight_enable(struct coresight_device *csdev) { return -ENOSYS; } 351a06ae860SPratik Patel static inline void coresight_disable(struct coresight_device *csdev) {} 352a06ae860SPratik Patel static inline int coresight_timeout(void __iomem *addr, u32 offset, 353a06ae860SPratik Patel int position, int value) { return 1; } 3542478a6aeSSuzuki K Poulose static inline int coresight_claim_device_unlocked(void __iomem *base) 3552478a6aeSSuzuki K Poulose { 3562478a6aeSSuzuki K Poulose return -EINVAL; 3572478a6aeSSuzuki K Poulose } 3582478a6aeSSuzuki K Poulose 3592478a6aeSSuzuki K Poulose static inline int coresight_claim_device(void __iomem *base) 3602478a6aeSSuzuki K Poulose { 3612478a6aeSSuzuki K Poulose return -EINVAL; 3622478a6aeSSuzuki K Poulose } 3632478a6aeSSuzuki K Poulose 3642478a6aeSSuzuki K Poulose static inline void coresight_disclaim_device(void __iomem *base) {} 3652478a6aeSSuzuki K Poulose static inline void coresight_disclaim_device_unlocked(void __iomem *base) {} 3662478a6aeSSuzuki K Poulose 367f188b5e7SAndrew Murray static inline bool coresight_loses_context_with_cpu(struct device *dev) 368f188b5e7SAndrew Murray { 369f188b5e7SAndrew Murray return false; 370f188b5e7SAndrew Murray } 371c61c4b5dSMathieu Poirier #endif 372c61c4b5dSMathieu Poirier 37391824db2SSuzuki K Poulose extern int coresight_get_cpu(struct device *dev); 374a06ae860SPratik Patel 375f03631daSSuzuki K Poulose struct coresight_platform_data *coresight_get_platform_data(struct device *dev); 376f03631daSSuzuki K Poulose 377a06ae860SPratik Patel #endif 378