xref: /linux-6.15/include/linux/bcma/bcma.h (revision b9ccfda2)
1 #ifndef LINUX_BCMA_H_
2 #define LINUX_BCMA_H_
3 
4 #include <linux/pci.h>
5 #include <linux/mod_devicetable.h>
6 
7 #include <linux/bcma/bcma_driver_chipcommon.h>
8 #include <linux/bcma/bcma_driver_pci.h>
9 #include <linux/bcma/bcma_driver_mips.h>
10 #include <linux/bcma/bcma_driver_gmac_cmn.h>
11 #include <linux/ssb/ssb.h> /* SPROM sharing */
12 
13 #include "bcma_regs.h"
14 
15 struct bcma_device;
16 struct bcma_bus;
17 
18 enum bcma_hosttype {
19 	BCMA_HOSTTYPE_PCI,
20 	BCMA_HOSTTYPE_SDIO,
21 	BCMA_HOSTTYPE_SOC,
22 };
23 
24 struct bcma_chipinfo {
25 	u16 id;
26 	u8 rev;
27 	u8 pkg;
28 };
29 
30 struct bcma_boardinfo {
31 	u16 vendor;
32 	u16 type;
33 };
34 
35 enum bcma_clkmode {
36 	BCMA_CLKMODE_FAST,
37 	BCMA_CLKMODE_DYNAMIC,
38 };
39 
40 struct bcma_host_ops {
41 	u8 (*read8)(struct bcma_device *core, u16 offset);
42 	u16 (*read16)(struct bcma_device *core, u16 offset);
43 	u32 (*read32)(struct bcma_device *core, u16 offset);
44 	void (*write8)(struct bcma_device *core, u16 offset, u8 value);
45 	void (*write16)(struct bcma_device *core, u16 offset, u16 value);
46 	void (*write32)(struct bcma_device *core, u16 offset, u32 value);
47 #ifdef CONFIG_BCMA_BLOCKIO
48 	void (*block_read)(struct bcma_device *core, void *buffer,
49 			   size_t count, u16 offset, u8 reg_width);
50 	void (*block_write)(struct bcma_device *core, const void *buffer,
51 			    size_t count, u16 offset, u8 reg_width);
52 #endif
53 	/* Agent ops */
54 	u32 (*aread32)(struct bcma_device *core, u16 offset);
55 	void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
56 };
57 
58 /* Core manufacturers */
59 #define BCMA_MANUF_ARM			0x43B
60 #define BCMA_MANUF_MIPS			0x4A7
61 #define BCMA_MANUF_BCM			0x4BF
62 
63 /* Core class values. */
64 #define BCMA_CL_SIM			0x0
65 #define BCMA_CL_EROM			0x1
66 #define BCMA_CL_CORESIGHT		0x9
67 #define BCMA_CL_VERIF			0xB
68 #define BCMA_CL_OPTIMO			0xD
69 #define BCMA_CL_GEN			0xE
70 #define BCMA_CL_PRIMECELL		0xF
71 
72 /* Core-ID values. */
73 #define BCMA_CORE_OOB_ROUTER		0x367	/* Out of band */
74 #define BCMA_CORE_4706_CHIPCOMMON	0x500
75 #define BCMA_CORE_4706_SOC_RAM		0x50E
76 #define BCMA_CORE_4706_MAC_GBIT		0x52D
77 #define BCMA_CORE_AMEMC			0x52E	/* DDR1/2 memory controller core */
78 #define BCMA_CORE_ALTA			0x534	/* I2S core */
79 #define BCMA_CORE_4706_MAC_GBIT_COMMON	0x5DC
80 #define BCMA_CORE_DDR23_PHY		0x5DD
81 #define BCMA_CORE_INVALID		0x700
82 #define BCMA_CORE_CHIPCOMMON		0x800
83 #define BCMA_CORE_ILINE20		0x801
84 #define BCMA_CORE_SRAM			0x802
85 #define BCMA_CORE_SDRAM			0x803
86 #define BCMA_CORE_PCI			0x804
87 #define BCMA_CORE_MIPS			0x805
88 #define BCMA_CORE_ETHERNET		0x806
89 #define BCMA_CORE_V90			0x807
90 #define BCMA_CORE_USB11_HOSTDEV		0x808
91 #define BCMA_CORE_ADSL			0x809
92 #define BCMA_CORE_ILINE100		0x80A
93 #define BCMA_CORE_IPSEC			0x80B
94 #define BCMA_CORE_UTOPIA		0x80C
95 #define BCMA_CORE_PCMCIA		0x80D
96 #define BCMA_CORE_INTERNAL_MEM		0x80E
97 #define BCMA_CORE_MEMC_SDRAM		0x80F
98 #define BCMA_CORE_OFDM			0x810
99 #define BCMA_CORE_EXTIF			0x811
100 #define BCMA_CORE_80211			0x812
101 #define BCMA_CORE_PHY_A			0x813
102 #define BCMA_CORE_PHY_B			0x814
103 #define BCMA_CORE_PHY_G			0x815
104 #define BCMA_CORE_MIPS_3302		0x816
105 #define BCMA_CORE_USB11_HOST		0x817
106 #define BCMA_CORE_USB11_DEV		0x818
107 #define BCMA_CORE_USB20_HOST		0x819
108 #define BCMA_CORE_USB20_DEV		0x81A
109 #define BCMA_CORE_SDIO_HOST		0x81B
110 #define BCMA_CORE_ROBOSWITCH		0x81C
111 #define BCMA_CORE_PARA_ATA		0x81D
112 #define BCMA_CORE_SATA_XORDMA		0x81E
113 #define BCMA_CORE_ETHERNET_GBIT		0x81F
114 #define BCMA_CORE_PCIE			0x820
115 #define BCMA_CORE_PHY_N			0x821
116 #define BCMA_CORE_SRAM_CTL		0x822
117 #define BCMA_CORE_MINI_MACPHY		0x823
118 #define BCMA_CORE_ARM_1176		0x824
119 #define BCMA_CORE_ARM_7TDMI		0x825
120 #define BCMA_CORE_PHY_LP		0x826
121 #define BCMA_CORE_PMU			0x827
122 #define BCMA_CORE_PHY_SSN		0x828
123 #define BCMA_CORE_SDIO_DEV		0x829
124 #define BCMA_CORE_ARM_CM3		0x82A
125 #define BCMA_CORE_PHY_HT		0x82B
126 #define BCMA_CORE_MIPS_74K		0x82C
127 #define BCMA_CORE_MAC_GBIT		0x82D
128 #define BCMA_CORE_DDR12_MEM_CTL		0x82E
129 #define BCMA_CORE_PCIE_RC		0x82F	/* PCIe Root Complex */
130 #define BCMA_CORE_OCP_OCP_BRIDGE	0x830
131 #define BCMA_CORE_SHARED_COMMON		0x831
132 #define BCMA_CORE_OCP_AHB_BRIDGE	0x832
133 #define BCMA_CORE_SPI_HOST		0x833
134 #define BCMA_CORE_I2S			0x834
135 #define BCMA_CORE_SDR_DDR1_MEM_CTL	0x835	/* SDR/DDR1 memory controller core */
136 #define BCMA_CORE_SHIM			0x837	/* SHIM component in ubus/6362 */
137 #define BCMA_CORE_DEFAULT		0xFFF
138 
139 #define BCMA_MAX_NR_CORES		16
140 
141 /* Chip IDs of PCIe devices */
142 #define BCMA_CHIP_ID_BCM4313	0x4313
143 #define BCMA_CHIP_ID_BCM43224	43224
144 #define  BCMA_PKG_ID_BCM43224_FAB_CSM	0x8
145 #define  BCMA_PKG_ID_BCM43224_FAB_SMIC	0xa
146 #define BCMA_CHIP_ID_BCM43225	43225
147 #define BCMA_CHIP_ID_BCM43227	43227
148 #define BCMA_CHIP_ID_BCM43228	43228
149 #define BCMA_CHIP_ID_BCM43421	43421
150 #define BCMA_CHIP_ID_BCM43428	43428
151 #define BCMA_CHIP_ID_BCM43431	43431
152 #define BCMA_CHIP_ID_BCM43460	43460
153 #define BCMA_CHIP_ID_BCM4331	0x4331
154 #define BCMA_CHIP_ID_BCM6362	0x6362
155 #define BCMA_CHIP_ID_BCM4360	0x4360
156 #define BCMA_CHIP_ID_BCM4352	0x4352
157 
158 /* Chip IDs of SoCs */
159 #define BCMA_CHIP_ID_BCM4706	0x5300
160 #define BCMA_CHIP_ID_BCM4716	0x4716
161 #define  BCMA_PKG_ID_BCM4716	8
162 #define  BCMA_PKG_ID_BCM4717	9
163 #define  BCMA_PKG_ID_BCM4718	10
164 #define BCMA_CHIP_ID_BCM47162	47162
165 #define BCMA_CHIP_ID_BCM4748	0x4748
166 #define BCMA_CHIP_ID_BCM4749	0x4749
167 #define BCMA_CHIP_ID_BCM5356	0x5356
168 #define BCMA_CHIP_ID_BCM5357	0x5357
169 #define BCMA_CHIP_ID_BCM53572	53572
170 
171 struct bcma_device {
172 	struct bcma_bus *bus;
173 	struct bcma_device_id id;
174 
175 	struct device dev;
176 	struct device *dma_dev;
177 
178 	unsigned int irq;
179 	bool dev_registered;
180 
181 	u8 core_index;
182 	u8 core_unit;
183 
184 	u32 addr;
185 	u32 addr1;
186 	u32 wrap;
187 
188 	void __iomem *io_addr;
189 	void __iomem *io_wrap;
190 
191 	void *drvdata;
192 	struct list_head list;
193 };
194 
195 static inline void *bcma_get_drvdata(struct bcma_device *core)
196 {
197 	return core->drvdata;
198 }
199 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata)
200 {
201 	core->drvdata = drvdata;
202 }
203 
204 struct bcma_driver {
205 	const char *name;
206 	const struct bcma_device_id *id_table;
207 
208 	int (*probe)(struct bcma_device *dev);
209 	void (*remove)(struct bcma_device *dev);
210 	int (*suspend)(struct bcma_device *dev);
211 	int (*resume)(struct bcma_device *dev);
212 	void (*shutdown)(struct bcma_device *dev);
213 
214 	struct device_driver drv;
215 };
216 extern
217 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner);
218 #define bcma_driver_register(drv) \
219 	__bcma_driver_register(drv, THIS_MODULE)
220 
221 extern void bcma_driver_unregister(struct bcma_driver *drv);
222 
223 /* Set a fallback SPROM.
224  * See kdoc at the function definition for complete documentation. */
225 extern int bcma_arch_register_fallback_sprom(
226 		int (*sprom_callback)(struct bcma_bus *bus,
227 		struct ssb_sprom *out));
228 
229 struct bcma_bus {
230 	/* The MMIO area. */
231 	void __iomem *mmio;
232 
233 	const struct bcma_host_ops *ops;
234 
235 	enum bcma_hosttype hosttype;
236 	union {
237 		/* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */
238 		struct pci_dev *host_pci;
239 		/* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */
240 		struct sdio_func *host_sdio;
241 	};
242 
243 	struct bcma_chipinfo chipinfo;
244 
245 	struct bcma_boardinfo boardinfo;
246 
247 	struct bcma_device *mapped_core;
248 	struct list_head cores;
249 	u8 nr_cores;
250 	u8 init_done:1;
251 	u8 num;
252 
253 	struct bcma_drv_cc drv_cc;
254 	struct bcma_drv_pci drv_pci;
255 	struct bcma_drv_mips drv_mips;
256 	struct bcma_drv_gmac_cmn drv_gmac_cmn;
257 
258 	/* We decided to share SPROM struct with SSB as long as we do not need
259 	 * any hacks for BCMA. This simplifies drivers code. */
260 	struct ssb_sprom sprom;
261 };
262 
263 static inline u32 bcma_read8(struct bcma_device *core, u16 offset)
264 {
265 	return core->bus->ops->read8(core, offset);
266 }
267 static inline u32 bcma_read16(struct bcma_device *core, u16 offset)
268 {
269 	return core->bus->ops->read16(core, offset);
270 }
271 static inline u32 bcma_read32(struct bcma_device *core, u16 offset)
272 {
273 	return core->bus->ops->read32(core, offset);
274 }
275 static inline
276 void bcma_write8(struct bcma_device *core, u16 offset, u32 value)
277 {
278 	core->bus->ops->write8(core, offset, value);
279 }
280 static inline
281 void bcma_write16(struct bcma_device *core, u16 offset, u32 value)
282 {
283 	core->bus->ops->write16(core, offset, value);
284 }
285 static inline
286 void bcma_write32(struct bcma_device *core, u16 offset, u32 value)
287 {
288 	core->bus->ops->write32(core, offset, value);
289 }
290 #ifdef CONFIG_BCMA_BLOCKIO
291 static inline void bcma_block_read(struct bcma_device *core, void *buffer,
292 				   size_t count, u16 offset, u8 reg_width)
293 {
294 	core->bus->ops->block_read(core, buffer, count, offset, reg_width);
295 }
296 static inline void bcma_block_write(struct bcma_device *core,
297 				    const void *buffer, size_t count,
298 				    u16 offset, u8 reg_width)
299 {
300 	core->bus->ops->block_write(core, buffer, count, offset, reg_width);
301 }
302 #endif
303 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset)
304 {
305 	return core->bus->ops->aread32(core, offset);
306 }
307 static inline
308 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value)
309 {
310 	core->bus->ops->awrite32(core, offset, value);
311 }
312 
313 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask)
314 {
315 	bcma_write32(cc, offset, bcma_read32(cc, offset) & mask);
316 }
317 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set)
318 {
319 	bcma_write32(cc, offset, bcma_read32(cc, offset) | set);
320 }
321 static inline void bcma_maskset32(struct bcma_device *cc,
322 				  u16 offset, u32 mask, u32 set)
323 {
324 	bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set);
325 }
326 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask)
327 {
328 	bcma_write16(cc, offset, bcma_read16(cc, offset) & mask);
329 }
330 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set)
331 {
332 	bcma_write16(cc, offset, bcma_read16(cc, offset) | set);
333 }
334 static inline void bcma_maskset16(struct bcma_device *cc,
335 				  u16 offset, u16 mask, u16 set)
336 {
337 	bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
338 }
339 
340 extern struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid);
341 extern bool bcma_core_is_enabled(struct bcma_device *core);
342 extern void bcma_core_disable(struct bcma_device *core, u32 flags);
343 extern int bcma_core_enable(struct bcma_device *core, u32 flags);
344 extern void bcma_core_set_clockmode(struct bcma_device *core,
345 				    enum bcma_clkmode clkmode);
346 extern void bcma_core_pll_ctl(struct bcma_device *core, u32 req, u32 status,
347 			      bool on);
348 #define BCMA_DMA_TRANSLATION_MASK	0xC0000000
349 #define  BCMA_DMA_TRANSLATION_NONE	0x00000000
350 #define  BCMA_DMA_TRANSLATION_DMA32_CMT	0x40000000 /* Client Mode Translation for 32-bit DMA */
351 #define  BCMA_DMA_TRANSLATION_DMA64_CMT	0x80000000 /* Client Mode Translation for 64-bit DMA */
352 extern u32 bcma_core_dma_translation(struct bcma_device *core);
353 
354 #endif /* LINUX_BCMA_H_ */
355