1 #ifndef LINUX_BCMA_H_ 2 #define LINUX_BCMA_H_ 3 4 #include <linux/pci.h> 5 #include <linux/mod_devicetable.h> 6 7 #include <linux/bcma/bcma_driver_chipcommon.h> 8 #include <linux/bcma/bcma_driver_pci.h> 9 10 #include "bcma_regs.h" 11 12 struct bcma_device; 13 struct bcma_bus; 14 15 enum bcma_hosttype { 16 BCMA_HOSTTYPE_NONE, 17 BCMA_HOSTTYPE_PCI, 18 BCMA_HOSTTYPE_SDIO, 19 }; 20 21 struct bcma_chipinfo { 22 u16 id; 23 u8 rev; 24 u8 pkg; 25 }; 26 27 struct bcma_host_ops { 28 u8 (*read8)(struct bcma_device *core, u16 offset); 29 u16 (*read16)(struct bcma_device *core, u16 offset); 30 u32 (*read32)(struct bcma_device *core, u16 offset); 31 void (*write8)(struct bcma_device *core, u16 offset, u8 value); 32 void (*write16)(struct bcma_device *core, u16 offset, u16 value); 33 void (*write32)(struct bcma_device *core, u16 offset, u32 value); 34 /* Agent ops */ 35 u32 (*aread32)(struct bcma_device *core, u16 offset); 36 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value); 37 }; 38 39 /* Core manufacturers */ 40 #define BCMA_MANUF_ARM 0x43B 41 #define BCMA_MANUF_MIPS 0x4A7 42 #define BCMA_MANUF_BCM 0x4BF 43 44 /* Core class values. */ 45 #define BCMA_CL_SIM 0x0 46 #define BCMA_CL_EROM 0x1 47 #define BCMA_CL_CORESIGHT 0x9 48 #define BCMA_CL_VERIF 0xB 49 #define BCMA_CL_OPTIMO 0xD 50 #define BCMA_CL_GEN 0xE 51 #define BCMA_CL_PRIMECELL 0xF 52 53 /* Core-ID values. */ 54 #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ 55 #define BCMA_CORE_INVALID 0x700 56 #define BCMA_CORE_CHIPCOMMON 0x800 57 #define BCMA_CORE_ILINE20 0x801 58 #define BCMA_CORE_SRAM 0x802 59 #define BCMA_CORE_SDRAM 0x803 60 #define BCMA_CORE_PCI 0x804 61 #define BCMA_CORE_MIPS 0x805 62 #define BCMA_CORE_ETHERNET 0x806 63 #define BCMA_CORE_V90 0x807 64 #define BCMA_CORE_USB11_HOSTDEV 0x808 65 #define BCMA_CORE_ADSL 0x809 66 #define BCMA_CORE_ILINE100 0x80A 67 #define BCMA_CORE_IPSEC 0x80B 68 #define BCMA_CORE_UTOPIA 0x80C 69 #define BCMA_CORE_PCMCIA 0x80D 70 #define BCMA_CORE_INTERNAL_MEM 0x80E 71 #define BCMA_CORE_MEMC_SDRAM 0x80F 72 #define BCMA_CORE_OFDM 0x810 73 #define BCMA_CORE_EXTIF 0x811 74 #define BCMA_CORE_80211 0x812 75 #define BCMA_CORE_PHY_A 0x813 76 #define BCMA_CORE_PHY_B 0x814 77 #define BCMA_CORE_PHY_G 0x815 78 #define BCMA_CORE_MIPS_3302 0x816 79 #define BCMA_CORE_USB11_HOST 0x817 80 #define BCMA_CORE_USB11_DEV 0x818 81 #define BCMA_CORE_USB20_HOST 0x819 82 #define BCMA_CORE_USB20_DEV 0x81A 83 #define BCMA_CORE_SDIO_HOST 0x81B 84 #define BCMA_CORE_ROBOSWITCH 0x81C 85 #define BCMA_CORE_PARA_ATA 0x81D 86 #define BCMA_CORE_SATA_XORDMA 0x81E 87 #define BCMA_CORE_ETHERNET_GBIT 0x81F 88 #define BCMA_CORE_PCIE 0x820 89 #define BCMA_CORE_PHY_N 0x821 90 #define BCMA_CORE_SRAM_CTL 0x822 91 #define BCMA_CORE_MINI_MACPHY 0x823 92 #define BCMA_CORE_ARM_1176 0x824 93 #define BCMA_CORE_ARM_7TDMI 0x825 94 #define BCMA_CORE_PHY_LP 0x826 95 #define BCMA_CORE_PMU 0x827 96 #define BCMA_CORE_PHY_SSN 0x828 97 #define BCMA_CORE_SDIO_DEV 0x829 98 #define BCMA_CORE_ARM_CM3 0x82A 99 #define BCMA_CORE_PHY_HT 0x82B 100 #define BCMA_CORE_MIPS_74K 0x82C 101 #define BCMA_CORE_MAC_GBIT 0x82D 102 #define BCMA_CORE_DDR12_MEM_CTL 0x82E 103 #define BCMA_CORE_PCIE_RC 0x82F /* PCIe Root Complex */ 104 #define BCMA_CORE_OCP_OCP_BRIDGE 0x830 105 #define BCMA_CORE_SHARED_COMMON 0x831 106 #define BCMA_CORE_OCP_AHB_BRIDGE 0x832 107 #define BCMA_CORE_SPI_HOST 0x833 108 #define BCMA_CORE_I2S 0x834 109 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ 110 #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ 111 #define BCMA_CORE_DEFAULT 0xFFF 112 113 #define BCMA_MAX_NR_CORES 16 114 115 struct bcma_device { 116 struct bcma_bus *bus; 117 struct bcma_device_id id; 118 119 struct device dev; 120 bool dev_registered; 121 122 u8 core_index; 123 124 u32 addr; 125 u32 wrap; 126 127 void *drvdata; 128 struct list_head list; 129 }; 130 131 static inline void *bcma_get_drvdata(struct bcma_device *core) 132 { 133 return core->drvdata; 134 } 135 static inline void bcma_set_drvdata(struct bcma_device *core, void *drvdata) 136 { 137 core->drvdata = drvdata; 138 } 139 140 struct bcma_driver { 141 const char *name; 142 const struct bcma_device_id *id_table; 143 144 int (*probe)(struct bcma_device *dev); 145 void (*remove)(struct bcma_device *dev); 146 int (*suspend)(struct bcma_device *dev, pm_message_t state); 147 int (*resume)(struct bcma_device *dev); 148 void (*shutdown)(struct bcma_device *dev); 149 150 struct device_driver drv; 151 }; 152 extern 153 int __bcma_driver_register(struct bcma_driver *drv, struct module *owner); 154 static inline int bcma_driver_register(struct bcma_driver *drv) 155 { 156 return __bcma_driver_register(drv, THIS_MODULE); 157 } 158 extern void bcma_driver_unregister(struct bcma_driver *drv); 159 160 struct bcma_bus { 161 /* The MMIO area. */ 162 void __iomem *mmio; 163 164 const struct bcma_host_ops *ops; 165 166 enum bcma_hosttype hosttype; 167 union { 168 /* Pointer to the PCI bus (only for BCMA_HOSTTYPE_PCI) */ 169 struct pci_dev *host_pci; 170 /* Pointer to the SDIO device (only for BCMA_HOSTTYPE_SDIO) */ 171 struct sdio_func *host_sdio; 172 }; 173 174 struct bcma_chipinfo chipinfo; 175 176 struct bcma_device *mapped_core; 177 struct list_head cores; 178 u8 nr_cores; 179 180 struct bcma_drv_cc drv_cc; 181 struct bcma_drv_pci drv_pci; 182 }; 183 184 extern inline u32 bcma_read8(struct bcma_device *core, u16 offset) 185 { 186 return core->bus->ops->read8(core, offset); 187 } 188 extern inline u32 bcma_read16(struct bcma_device *core, u16 offset) 189 { 190 return core->bus->ops->read16(core, offset); 191 } 192 extern inline u32 bcma_read32(struct bcma_device *core, u16 offset) 193 { 194 return core->bus->ops->read32(core, offset); 195 } 196 extern inline 197 void bcma_write8(struct bcma_device *core, u16 offset, u32 value) 198 { 199 core->bus->ops->write8(core, offset, value); 200 } 201 extern inline 202 void bcma_write16(struct bcma_device *core, u16 offset, u32 value) 203 { 204 core->bus->ops->write16(core, offset, value); 205 } 206 extern inline 207 void bcma_write32(struct bcma_device *core, u16 offset, u32 value) 208 { 209 core->bus->ops->write32(core, offset, value); 210 } 211 extern inline u32 bcma_aread32(struct bcma_device *core, u16 offset) 212 { 213 return core->bus->ops->aread32(core, offset); 214 } 215 extern inline 216 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value) 217 { 218 core->bus->ops->awrite32(core, offset, value); 219 } 220 221 extern bool bcma_core_is_enabled(struct bcma_device *core); 222 extern int bcma_core_enable(struct bcma_device *core, u32 flags); 223 224 #endif /* LINUX_BCMA_H_ */ 225