1 2 /* 3 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 4 * Copyright 2003-2004 Jeff Garzik 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; see the file COPYING. If not, write to 19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 21 * 22 * libata documentation is available via 'make {ps|pdf}docs', 23 * as Documentation/DocBook/libata.* 24 * 25 * Hardware documentation available from http://www.t13.org/ 26 * 27 */ 28 29 #ifndef __LINUX_ATA_H__ 30 #define __LINUX_ATA_H__ 31 32 #include <linux/types.h> 33 34 /* defines only for the constants which don't work well as enums */ 35 #define ATA_DMA_BOUNDARY 0xffffUL 36 #define ATA_DMA_MASK 0xffffffffULL 37 38 enum { 39 /* various global constants */ 40 ATA_MAX_DEVICES = 2, /* per bus/port */ 41 ATA_MAX_PRD = 256, /* we could make these 256/256 */ 42 ATA_SECT_SIZE = 512, 43 44 ATA_ID_WORDS = 256, 45 ATA_ID_SERNO_OFS = 10, 46 ATA_ID_FW_REV_OFS = 23, 47 ATA_ID_PROD_OFS = 27, 48 ATA_ID_OLD_PIO_MODES = 51, 49 ATA_ID_FIELD_VALID = 53, 50 ATA_ID_MWDMA_MODES = 63, 51 ATA_ID_PIO_MODES = 64, 52 ATA_ID_EIDE_DMA_MIN = 65, 53 ATA_ID_EIDE_PIO = 67, 54 ATA_ID_EIDE_PIO_IORDY = 68, 55 ATA_ID_UDMA_MODES = 88, 56 ATA_ID_MAJOR_VER = 80, 57 ATA_ID_PIO4 = (1 << 1), 58 59 ATA_PCI_CTL_OFS = 2, 60 ATA_SERNO_LEN = 20, 61 ATA_UDMA0 = (1 << 0), 62 ATA_UDMA1 = ATA_UDMA0 | (1 << 1), 63 ATA_UDMA2 = ATA_UDMA1 | (1 << 2), 64 ATA_UDMA3 = ATA_UDMA2 | (1 << 3), 65 ATA_UDMA4 = ATA_UDMA3 | (1 << 4), 66 ATA_UDMA5 = ATA_UDMA4 | (1 << 5), 67 ATA_UDMA6 = ATA_UDMA5 | (1 << 6), 68 ATA_UDMA7 = ATA_UDMA6 | (1 << 7), 69 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ 70 71 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ 72 73 /* DMA-related */ 74 ATA_PRD_SZ = 8, 75 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), 76 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ 77 78 ATA_DMA_TABLE_OFS = 4, 79 ATA_DMA_STATUS = 2, 80 ATA_DMA_CMD = 0, 81 ATA_DMA_WR = (1 << 3), 82 ATA_DMA_START = (1 << 0), 83 ATA_DMA_INTR = (1 << 2), 84 ATA_DMA_ERR = (1 << 1), 85 ATA_DMA_ACTIVE = (1 << 0), 86 87 /* bits in ATA command block registers */ 88 ATA_HOB = (1 << 7), /* LBA48 selector */ 89 ATA_NIEN = (1 << 1), /* disable-irq flag */ 90 ATA_LBA = (1 << 6), /* LBA28 selector */ 91 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ 92 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ 93 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ 94 ATA_BUSY = (1 << 7), /* BSY status bit */ 95 ATA_DRDY = (1 << 6), /* device ready */ 96 ATA_DF = (1 << 5), /* device fault */ 97 ATA_DRQ = (1 << 3), /* data request i/o */ 98 ATA_ERR = (1 << 0), /* have an error */ 99 ATA_SRST = (1 << 2), /* software reset */ 100 ATA_ABORTED = (1 << 2), /* command aborted */ 101 102 /* ATA command block registers */ 103 ATA_REG_DATA = 0x00, 104 ATA_REG_ERR = 0x01, 105 ATA_REG_NSECT = 0x02, 106 ATA_REG_LBAL = 0x03, 107 ATA_REG_LBAM = 0x04, 108 ATA_REG_LBAH = 0x05, 109 ATA_REG_DEVICE = 0x06, 110 ATA_REG_STATUS = 0x07, 111 112 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ 113 ATA_REG_CMD = ATA_REG_STATUS, 114 ATA_REG_BYTEL = ATA_REG_LBAM, 115 ATA_REG_BYTEH = ATA_REG_LBAH, 116 ATA_REG_DEVSEL = ATA_REG_DEVICE, 117 ATA_REG_IRQ = ATA_REG_NSECT, 118 119 /* ATA device commands */ 120 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ 121 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */ 122 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ 123 ATA_CMD_EDD = 0x90, /* execute device diagnostic */ 124 ATA_CMD_FLUSH = 0xE7, 125 ATA_CMD_FLUSH_EXT = 0xEA, 126 ATA_CMD_ID_ATA = 0xEC, 127 ATA_CMD_ID_ATAPI = 0xA1, 128 ATA_CMD_READ = 0xC8, 129 ATA_CMD_READ_EXT = 0x25, 130 ATA_CMD_WRITE = 0xCA, 131 ATA_CMD_WRITE_EXT = 0x35, 132 ATA_CMD_WRITE_FUA_EXT = 0x3D, 133 ATA_CMD_PIO_READ = 0x20, 134 ATA_CMD_PIO_READ_EXT = 0x24, 135 ATA_CMD_PIO_WRITE = 0x30, 136 ATA_CMD_PIO_WRITE_EXT = 0x34, 137 ATA_CMD_READ_MULTI = 0xC4, 138 ATA_CMD_READ_MULTI_EXT = 0x29, 139 ATA_CMD_WRITE_MULTI = 0xC5, 140 ATA_CMD_WRITE_MULTI_EXT = 0x39, 141 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE, 142 ATA_CMD_SET_FEATURES = 0xEF, 143 ATA_CMD_PACKET = 0xA0, 144 ATA_CMD_VERIFY = 0x40, 145 ATA_CMD_VERIFY_EXT = 0x42, 146 ATA_CMD_STANDBYNOW1 = 0xE0, 147 ATA_CMD_IDLEIMMEDIATE = 0xE1, 148 ATA_CMD_INIT_DEV_PARAMS = 0x91, 149 ATA_CMD_READ_NATIVE_MAX = 0xF8, 150 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, 151 152 /* SETFEATURES stuff */ 153 SETFEATURES_XFER = 0x03, 154 XFER_UDMA_7 = 0x47, 155 XFER_UDMA_6 = 0x46, 156 XFER_UDMA_5 = 0x45, 157 XFER_UDMA_4 = 0x44, 158 XFER_UDMA_3 = 0x43, 159 XFER_UDMA_2 = 0x42, 160 XFER_UDMA_1 = 0x41, 161 XFER_UDMA_0 = 0x40, 162 XFER_MW_DMA_2 = 0x22, 163 XFER_MW_DMA_1 = 0x21, 164 XFER_MW_DMA_0 = 0x20, 165 XFER_SW_DMA_2 = 0x12, 166 XFER_SW_DMA_1 = 0x11, 167 XFER_SW_DMA_0 = 0x10, 168 XFER_PIO_4 = 0x0C, 169 XFER_PIO_3 = 0x0B, 170 XFER_PIO_2 = 0x0A, 171 XFER_PIO_1 = 0x09, 172 XFER_PIO_0 = 0x08, 173 XFER_PIO_SLOW = 0x00, 174 175 /* ATAPI stuff */ 176 ATAPI_PKT_DMA = (1 << 0), 177 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: 178 0=to device, 1=to host */ 179 ATAPI_CDB_LEN = 16, 180 181 /* cable types */ 182 ATA_CBL_NONE = 0, 183 ATA_CBL_PATA40 = 1, 184 ATA_CBL_PATA80 = 2, 185 ATA_CBL_PATA_UNK = 3, 186 ATA_CBL_SATA = 4, 187 188 /* SATA Status and Control Registers */ 189 SCR_STATUS = 0, 190 SCR_ERROR = 1, 191 SCR_CONTROL = 2, 192 SCR_ACTIVE = 3, 193 SCR_NOTIFICATION = 4, 194 195 /* struct ata_taskfile flags */ 196 ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ 197 ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ 198 ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ 199 ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ 200 ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ 201 ATA_TFLAG_FUA = (1 << 5), /* enable FUA */ 202 }; 203 204 enum ata_tf_protocols { 205 /* ATA taskfile protocols */ 206 ATA_PROT_UNKNOWN, /* unknown/invalid */ 207 ATA_PROT_NODATA, /* no data */ 208 ATA_PROT_PIO, /* PIO single sector */ 209 ATA_PROT_DMA, /* DMA */ 210 ATA_PROT_ATAPI, /* packet command, PIO data xfer*/ 211 ATA_PROT_ATAPI_NODATA, /* packet command, no data */ 212 ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */ 213 }; 214 215 enum ata_ioctls { 216 ATA_IOC_GET_IO32 = 0x309, 217 ATA_IOC_SET_IO32 = 0x324, 218 }; 219 220 /* core structures */ 221 222 struct ata_prd { 223 u32 addr; 224 u32 flags_len; 225 }; 226 227 struct ata_taskfile { 228 unsigned long flags; /* ATA_TFLAG_xxx */ 229 u8 protocol; /* ATA_PROT_xxx */ 230 231 u8 ctl; /* control reg */ 232 233 u8 hob_feature; /* additional data */ 234 u8 hob_nsect; /* to support LBA48 */ 235 u8 hob_lbal; 236 u8 hob_lbam; 237 u8 hob_lbah; 238 239 u8 feature; 240 u8 nsect; 241 u8 lbal; 242 u8 lbam; 243 u8 lbah; 244 245 u8 device; 246 247 u8 command; /* IO operation */ 248 }; 249 250 #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) 251 #define ata_id_is_cfa(id) ((id)[0] == 0x848A) 252 #define ata_id_is_sata(id) ((id)[93] == 0) 253 #define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6)) 254 #define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5)) 255 #define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10)) 256 #define ata_id_has_fua(id) ((id)[84] & (1 << 6)) 257 #define ata_id_has_flush(id) ((id)[83] & (1 << 12)) 258 #define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13)) 259 #define ata_id_has_lba48(id) ((id)[83] & (1 << 10)) 260 #define ata_id_has_hpa(id) ((id)[82] & (1 << 10)) 261 #define ata_id_has_wcache(id) ((id)[82] & (1 << 5)) 262 #define ata_id_has_pm(id) ((id)[82] & (1 << 3)) 263 #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) 264 #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) 265 #define ata_id_removeable(id) ((id)[0] & (1 << 7)) 266 #define ata_id_has_dword_io(id) ((id)[50] & (1 << 0)) 267 #define ata_id_u32(id,n) \ 268 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)])) 269 #define ata_id_u64(id,n) \ 270 ( ((u64) (id)[(n) + 3] << 48) | \ 271 ((u64) (id)[(n) + 2] << 32) | \ 272 ((u64) (id)[(n) + 1] << 16) | \ 273 ((u64) (id)[(n) + 0]) ) 274 275 static inline unsigned int ata_id_major_version(const u16 *id) 276 { 277 unsigned int mver; 278 279 for (mver = 14; mver >= 1; mver--) 280 if (id[ATA_ID_MAJOR_VER] & (1 << mver)) 281 break; 282 return mver; 283 } 284 285 static inline int ata_id_current_chs_valid(const u16 *id) 286 { 287 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command 288 has not been issued to the device then the values of 289 id[54] to id[56] are vendor specific. */ 290 return (id[53] & 0x01) && /* Current translation valid */ 291 id[54] && /* cylinders in current translation */ 292 id[55] && /* heads in current translation */ 293 id[55] <= 16 && 294 id[56]; /* sectors in current translation */ 295 } 296 297 static inline int atapi_cdb_len(const u16 *dev_id) 298 { 299 u16 tmp = dev_id[0] & 0x3; 300 switch (tmp) { 301 case 0: return 12; 302 case 1: return 16; 303 default: return -1; 304 } 305 } 306 307 static inline int is_atapi_taskfile(const struct ata_taskfile *tf) 308 { 309 return (tf->protocol == ATA_PROT_ATAPI) || 310 (tf->protocol == ATA_PROT_ATAPI_NODATA) || 311 (tf->protocol == ATA_PROT_ATAPI_DMA); 312 } 313 314 static inline int ata_ok(u8 status) 315 { 316 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) 317 == ATA_DRDY); 318 } 319 320 static inline int lba_28_ok(u64 block, u32 n_block) 321 { 322 /* check the ending block number */ 323 return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256); 324 } 325 326 static inline int lba_48_ok(u64 block, u32 n_block) 327 { 328 /* check the ending block number */ 329 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536); 330 } 331 332 #endif /* __LINUX_ATA_H__ */ 333