1 2 /* 3 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 4 * Copyright 2003-2004 Jeff Garzik 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; see the file COPYING. If not, write to 19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 21 * 22 * libata documentation is available via 'make {ps|pdf}docs', 23 * as Documentation/DocBook/libata.* 24 * 25 * Hardware documentation available from http://www.t13.org/ 26 * 27 */ 28 29 #ifndef __LINUX_ATA_H__ 30 #define __LINUX_ATA_H__ 31 32 #include <linux/types.h> 33 34 /* defines only for the constants which don't work well as enums */ 35 #define ATA_DMA_BOUNDARY 0xffffUL 36 #define ATA_DMA_MASK 0xffffffffULL 37 38 enum { 39 /* various global constants */ 40 ATA_MAX_DEVICES = 2, /* per bus/port */ 41 ATA_MAX_PRD = 256, /* we could make these 256/256 */ 42 ATA_SECT_SIZE = 512, 43 ATA_MAX_SECTORS_128 = 128, 44 ATA_MAX_SECTORS = 256, 45 ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */ 46 47 ATA_ID_WORDS = 256, 48 ATA_ID_SERNO = 10, 49 ATA_ID_FW_REV = 23, 50 ATA_ID_PROD = 27, 51 ATA_ID_OLD_PIO_MODES = 51, 52 ATA_ID_FIELD_VALID = 53, 53 ATA_ID_MWDMA_MODES = 63, 54 ATA_ID_PIO_MODES = 64, 55 ATA_ID_EIDE_DMA_MIN = 65, 56 ATA_ID_EIDE_PIO = 67, 57 ATA_ID_EIDE_PIO_IORDY = 68, 58 ATA_ID_UDMA_MODES = 88, 59 ATA_ID_MAJOR_VER = 80, 60 ATA_ID_PIO4 = (1 << 1), 61 62 ATA_ID_SERNO_LEN = 20, 63 ATA_ID_FW_REV_LEN = 8, 64 ATA_ID_PROD_LEN = 40, 65 66 ATA_PCI_CTL_OFS = 2, 67 ATA_UDMA0 = (1 << 0), 68 ATA_UDMA1 = ATA_UDMA0 | (1 << 1), 69 ATA_UDMA2 = ATA_UDMA1 | (1 << 2), 70 ATA_UDMA3 = ATA_UDMA2 | (1 << 3), 71 ATA_UDMA4 = ATA_UDMA3 | (1 << 4), 72 ATA_UDMA5 = ATA_UDMA4 | (1 << 5), 73 ATA_UDMA6 = ATA_UDMA5 | (1 << 6), 74 ATA_UDMA7 = ATA_UDMA6 | (1 << 7), 75 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ 76 77 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ 78 79 /* DMA-related */ 80 ATA_PRD_SZ = 8, 81 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), 82 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ 83 84 ATA_DMA_TABLE_OFS = 4, 85 ATA_DMA_STATUS = 2, 86 ATA_DMA_CMD = 0, 87 ATA_DMA_WR = (1 << 3), 88 ATA_DMA_START = (1 << 0), 89 ATA_DMA_INTR = (1 << 2), 90 ATA_DMA_ERR = (1 << 1), 91 ATA_DMA_ACTIVE = (1 << 0), 92 93 /* bits in ATA command block registers */ 94 ATA_HOB = (1 << 7), /* LBA48 selector */ 95 ATA_NIEN = (1 << 1), /* disable-irq flag */ 96 ATA_LBA = (1 << 6), /* LBA28 selector */ 97 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ 98 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ 99 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ 100 ATA_BUSY = (1 << 7), /* BSY status bit */ 101 ATA_DRDY = (1 << 6), /* device ready */ 102 ATA_DF = (1 << 5), /* device fault */ 103 ATA_DRQ = (1 << 3), /* data request i/o */ 104 ATA_ERR = (1 << 0), /* have an error */ 105 ATA_SRST = (1 << 2), /* software reset */ 106 ATA_ICRC = (1 << 7), /* interface CRC error */ 107 ATA_UNC = (1 << 6), /* uncorrectable media error */ 108 ATA_IDNF = (1 << 4), /* ID not found */ 109 ATA_ABORTED = (1 << 2), /* command aborted */ 110 111 /* ATA command block registers */ 112 ATA_REG_DATA = 0x00, 113 ATA_REG_ERR = 0x01, 114 ATA_REG_NSECT = 0x02, 115 ATA_REG_LBAL = 0x03, 116 ATA_REG_LBAM = 0x04, 117 ATA_REG_LBAH = 0x05, 118 ATA_REG_DEVICE = 0x06, 119 ATA_REG_STATUS = 0x07, 120 121 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ 122 ATA_REG_CMD = ATA_REG_STATUS, 123 ATA_REG_BYTEL = ATA_REG_LBAM, 124 ATA_REG_BYTEH = ATA_REG_LBAH, 125 ATA_REG_DEVSEL = ATA_REG_DEVICE, 126 ATA_REG_IRQ = ATA_REG_NSECT, 127 128 /* ATA device commands */ 129 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */ 130 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ 131 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */ 132 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ 133 ATA_CMD_EDD = 0x90, /* execute device diagnostic */ 134 ATA_CMD_FLUSH = 0xE7, 135 ATA_CMD_FLUSH_EXT = 0xEA, 136 ATA_CMD_ID_ATA = 0xEC, 137 ATA_CMD_ID_ATAPI = 0xA1, 138 ATA_CMD_READ = 0xC8, 139 ATA_CMD_READ_EXT = 0x25, 140 ATA_CMD_WRITE = 0xCA, 141 ATA_CMD_WRITE_EXT = 0x35, 142 ATA_CMD_WRITE_FUA_EXT = 0x3D, 143 ATA_CMD_FPDMA_READ = 0x60, 144 ATA_CMD_FPDMA_WRITE = 0x61, 145 ATA_CMD_PIO_READ = 0x20, 146 ATA_CMD_PIO_READ_EXT = 0x24, 147 ATA_CMD_PIO_WRITE = 0x30, 148 ATA_CMD_PIO_WRITE_EXT = 0x34, 149 ATA_CMD_READ_MULTI = 0xC4, 150 ATA_CMD_READ_MULTI_EXT = 0x29, 151 ATA_CMD_WRITE_MULTI = 0xC5, 152 ATA_CMD_WRITE_MULTI_EXT = 0x39, 153 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE, 154 ATA_CMD_SET_FEATURES = 0xEF, 155 ATA_CMD_SET_MULTI = 0xC6, 156 ATA_CMD_PACKET = 0xA0, 157 ATA_CMD_VERIFY = 0x40, 158 ATA_CMD_VERIFY_EXT = 0x42, 159 ATA_CMD_STANDBYNOW1 = 0xE0, 160 ATA_CMD_IDLEIMMEDIATE = 0xE1, 161 ATA_CMD_INIT_DEV_PARAMS = 0x91, 162 ATA_CMD_READ_NATIVE_MAX = 0xF8, 163 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, 164 ATA_CMD_SET_MAX = 0xF9, 165 ATA_CMD_SET_MAX_EXT = 0x37, 166 ATA_CMD_READ_LOG_EXT = 0x2f, 167 ATA_CMD_PMP_READ = 0xE4, 168 ATA_CMD_PMP_WRITE = 0xE8, 169 170 /* READ_LOG_EXT pages */ 171 ATA_LOG_SATA_NCQ = 0x10, 172 173 /* READ/WRITE LONG (obsolete) */ 174 ATA_CMD_READ_LONG = 0x22, 175 ATA_CMD_READ_LONG_ONCE = 0x23, 176 ATA_CMD_WRITE_LONG = 0x32, 177 ATA_CMD_WRITE_LONG_ONCE = 0x33, 178 179 /* SETFEATURES stuff */ 180 SETFEATURES_XFER = 0x03, 181 XFER_UDMA_7 = 0x47, 182 XFER_UDMA_6 = 0x46, 183 XFER_UDMA_5 = 0x45, 184 XFER_UDMA_4 = 0x44, 185 XFER_UDMA_3 = 0x43, 186 XFER_UDMA_2 = 0x42, 187 XFER_UDMA_1 = 0x41, 188 XFER_UDMA_0 = 0x40, 189 XFER_MW_DMA_4 = 0x24, /* CFA only */ 190 XFER_MW_DMA_3 = 0x23, /* CFA only */ 191 XFER_MW_DMA_2 = 0x22, 192 XFER_MW_DMA_1 = 0x21, 193 XFER_MW_DMA_0 = 0x20, 194 XFER_SW_DMA_2 = 0x12, 195 XFER_SW_DMA_1 = 0x11, 196 XFER_SW_DMA_0 = 0x10, 197 XFER_PIO_6 = 0x0E, /* CFA only */ 198 XFER_PIO_5 = 0x0D, /* CFA only */ 199 XFER_PIO_4 = 0x0C, 200 XFER_PIO_3 = 0x0B, 201 XFER_PIO_2 = 0x0A, 202 XFER_PIO_1 = 0x09, 203 XFER_PIO_0 = 0x08, 204 XFER_PIO_SLOW = 0x00, 205 206 SETFEATURES_WC_ON = 0x02, /* Enable write cache */ 207 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */ 208 209 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */ 210 211 /* ATAPI stuff */ 212 ATAPI_PKT_DMA = (1 << 0), 213 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: 214 0=to device, 1=to host */ 215 ATAPI_CDB_LEN = 16, 216 217 /* PMP stuff */ 218 SATA_PMP_MAX_PORTS = 15, 219 SATA_PMP_CTRL_PORT = 15, 220 221 SATA_PMP_GSCR_DWORDS = 128, 222 SATA_PMP_GSCR_PROD_ID = 0, 223 SATA_PMP_GSCR_REV = 1, 224 SATA_PMP_GSCR_PORT_INFO = 2, 225 SATA_PMP_GSCR_ERROR = 32, 226 SATA_PMP_GSCR_ERROR_EN = 33, 227 SATA_PMP_GSCR_FEAT = 64, 228 SATA_PMP_GSCR_FEAT_EN = 96, 229 230 SATA_PMP_PSCR_STATUS = 0, 231 SATA_PMP_PSCR_ERROR = 1, 232 SATA_PMP_PSCR_CONTROL = 2, 233 234 SATA_PMP_FEAT_BIST = (1 << 0), 235 SATA_PMP_FEAT_PMREQ = (1 << 1), 236 SATA_PMP_FEAT_DYNSSC = (1 << 2), 237 SATA_PMP_FEAT_NOTIFY = (1 << 3), 238 239 /* cable types */ 240 ATA_CBL_NONE = 0, 241 ATA_CBL_PATA40 = 1, 242 ATA_CBL_PATA80 = 2, 243 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ 244 ATA_CBL_PATA_UNK = 4, 245 ATA_CBL_SATA = 5, 246 247 /* SATA Status and Control Registers */ 248 SCR_STATUS = 0, 249 SCR_ERROR = 1, 250 SCR_CONTROL = 2, 251 SCR_ACTIVE = 3, 252 SCR_NOTIFICATION = 4, 253 254 /* SError bits */ 255 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */ 256 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */ 257 SERR_DATA = (1 << 8), /* unrecovered data error */ 258 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */ 259 SERR_PROTOCOL = (1 << 10), /* protocol violation */ 260 SERR_INTERNAL = (1 << 11), /* host internal error */ 261 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */ 262 SERR_DEV_XCHG = (1 << 26), /* device exchanged */ 263 264 /* struct ata_taskfile flags */ 265 ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ 266 ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ 267 ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ 268 ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ 269 ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ 270 ATA_TFLAG_FUA = (1 << 5), /* enable FUA */ 271 ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */ 272 }; 273 274 enum ata_tf_protocols { 275 /* ATA taskfile protocols */ 276 ATA_PROT_UNKNOWN, /* unknown/invalid */ 277 ATA_PROT_NODATA, /* no data */ 278 ATA_PROT_PIO, /* PIO data xfer */ 279 ATA_PROT_DMA, /* DMA */ 280 ATA_PROT_NCQ, /* NCQ */ 281 ATA_PROT_ATAPI, /* packet command, PIO data xfer*/ 282 ATA_PROT_ATAPI_NODATA, /* packet command, no data */ 283 ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */ 284 }; 285 286 enum ata_ioctls { 287 ATA_IOC_GET_IO32 = 0x309, 288 ATA_IOC_SET_IO32 = 0x324, 289 }; 290 291 /* core structures */ 292 293 struct ata_prd { 294 u32 addr; 295 u32 flags_len; 296 }; 297 298 struct ata_taskfile { 299 unsigned long flags; /* ATA_TFLAG_xxx */ 300 u8 protocol; /* ATA_PROT_xxx */ 301 302 u8 ctl; /* control reg */ 303 304 u8 hob_feature; /* additional data */ 305 u8 hob_nsect; /* to support LBA48 */ 306 u8 hob_lbal; 307 u8 hob_lbam; 308 u8 hob_lbah; 309 310 u8 feature; 311 u8 nsect; 312 u8 lbal; 313 u8 lbam; 314 u8 lbah; 315 316 u8 device; 317 318 u8 command; /* IO operation */ 319 }; 320 321 #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) 322 #define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6)) 323 #define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5)) 324 #define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10)) 325 #define ata_id_has_fua(id) ((id)[84] & (1 << 6)) 326 #define ata_id_has_flush(id) ((id)[83] & (1 << 12)) 327 #define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13)) 328 #define ata_id_has_lba48(id) ((id)[83] & (1 << 10)) 329 #define ata_id_has_hpa(id) ((id)[82] & (1 << 10)) 330 #define ata_id_has_wcache(id) ((id)[82] & (1 << 5)) 331 #define ata_id_has_pm(id) ((id)[82] & (1 << 3)) 332 #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) 333 #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) 334 #define ata_id_has_ncq(id) ((id)[76] & (1 << 8)) 335 #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1) 336 #define ata_id_removeable(id) ((id)[0] & (1 << 7)) 337 #define ata_id_has_dword_io(id) ((id)[50] & (1 << 0)) 338 #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10)) 339 #define ata_id_has_iordy(id) ((id)[49] & (1 << 9)) 340 #define ata_id_u32(id,n) \ 341 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)])) 342 #define ata_id_u64(id,n) \ 343 ( ((u64) (id)[(n) + 3] << 48) | \ 344 ((u64) (id)[(n) + 2] << 32) | \ 345 ((u64) (id)[(n) + 1] << 16) | \ 346 ((u64) (id)[(n) + 0]) ) 347 348 #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20) 349 350 static inline unsigned int ata_id_major_version(const u16 *id) 351 { 352 unsigned int mver; 353 354 if (id[ATA_ID_MAJOR_VER] == 0xFFFF) 355 return 0; 356 357 for (mver = 14; mver >= 1; mver--) 358 if (id[ATA_ID_MAJOR_VER] & (1 << mver)) 359 break; 360 return mver; 361 } 362 363 static inline int ata_id_is_sata(const u16 *id) 364 { 365 return ata_id_major_version(id) >= 5 && id[93] == 0; 366 } 367 368 static inline int ata_id_current_chs_valid(const u16 *id) 369 { 370 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command 371 has not been issued to the device then the values of 372 id[54] to id[56] are vendor specific. */ 373 return (id[53] & 0x01) && /* Current translation valid */ 374 id[54] && /* cylinders in current translation */ 375 id[55] && /* heads in current translation */ 376 id[55] <= 16 && 377 id[56]; /* sectors in current translation */ 378 } 379 380 static inline int ata_id_is_cfa(const u16 *id) 381 { 382 u16 v = id[0]; 383 if (v == 0x848A) /* Standard CF */ 384 return 1; 385 /* Could be CF hiding as standard ATA */ 386 if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF && 387 (id[82] & ( 1 << 2))) 388 return 1; 389 return 0; 390 } 391 392 static inline int ata_drive_40wire(const u16 *dev_id) 393 { 394 if (ata_id_is_sata(dev_id)) 395 return 0; /* SATA */ 396 if ((dev_id[93] & 0xE000) == 0x6000) 397 return 0; /* 80 wire */ 398 return 1; 399 } 400 401 static inline int atapi_cdb_len(const u16 *dev_id) 402 { 403 u16 tmp = dev_id[0] & 0x3; 404 switch (tmp) { 405 case 0: return 12; 406 case 1: return 16; 407 default: return -1; 408 } 409 } 410 411 static inline int is_atapi_taskfile(const struct ata_taskfile *tf) 412 { 413 return (tf->protocol == ATA_PROT_ATAPI) || 414 (tf->protocol == ATA_PROT_ATAPI_NODATA) || 415 (tf->protocol == ATA_PROT_ATAPI_DMA); 416 } 417 418 static inline int is_multi_taskfile(struct ata_taskfile *tf) 419 { 420 return (tf->command == ATA_CMD_READ_MULTI) || 421 (tf->command == ATA_CMD_WRITE_MULTI) || 422 (tf->command == ATA_CMD_READ_MULTI_EXT) || 423 (tf->command == ATA_CMD_WRITE_MULTI_EXT) || 424 (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT); 425 } 426 427 static inline int ata_ok(u8 status) 428 { 429 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) 430 == ATA_DRDY); 431 } 432 433 static inline int lba_28_ok(u64 block, u32 n_block) 434 { 435 /* check the ending block number */ 436 return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256); 437 } 438 439 static inline int lba_48_ok(u64 block, u32 n_block) 440 { 441 /* check the ending block number */ 442 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536); 443 } 444 445 #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff) 446 #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16) 447 #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff) 448 #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf) 449 450 #endif /* __LINUX_ATA_H__ */ 451