1 2 /* 3 * Copyright 2003-2004 Red Hat, Inc. All rights reserved. 4 * Copyright 2003-2004 Jeff Garzik 5 * 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; see the file COPYING. If not, write to 19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 21 * 22 * libata documentation is available via 'make {ps|pdf}docs', 23 * as Documentation/DocBook/libata.* 24 * 25 * Hardware documentation available from http://www.t13.org/ 26 * 27 */ 28 29 #ifndef __LINUX_ATA_H__ 30 #define __LINUX_ATA_H__ 31 32 #include <linux/types.h> 33 34 /* defines only for the constants which don't work well as enums */ 35 #define ATA_DMA_BOUNDARY 0xffffUL 36 #define ATA_DMA_MASK 0xffffffffULL 37 38 enum { 39 /* various global constants */ 40 ATA_MAX_DEVICES = 2, /* per bus/port */ 41 ATA_MAX_PRD = 256, /* we could make these 256/256 */ 42 ATA_SECT_SIZE = 512, 43 ATA_MAX_SECTORS_128 = 128, 44 ATA_MAX_SECTORS = 256, 45 ATA_MAX_SECTORS_LBA48 = 65535,/* TODO: 65536? */ 46 47 ATA_ID_WORDS = 256, 48 ATA_ID_SERNO = 10, 49 ATA_ID_FW_REV = 23, 50 ATA_ID_PROD = 27, 51 ATA_ID_OLD_PIO_MODES = 51, 52 ATA_ID_FIELD_VALID = 53, 53 ATA_ID_MWDMA_MODES = 63, 54 ATA_ID_PIO_MODES = 64, 55 ATA_ID_EIDE_DMA_MIN = 65, 56 ATA_ID_EIDE_PIO = 67, 57 ATA_ID_EIDE_PIO_IORDY = 68, 58 ATA_ID_UDMA_MODES = 88, 59 ATA_ID_MAJOR_VER = 80, 60 ATA_ID_PIO4 = (1 << 1), 61 62 ATA_ID_SERNO_LEN = 20, 63 ATA_ID_FW_REV_LEN = 8, 64 ATA_ID_PROD_LEN = 40, 65 66 ATA_PCI_CTL_OFS = 2, 67 68 ATA_PIO0 = (1 << 0), 69 ATA_PIO1 = ATA_PIO0 | (1 << 1), 70 ATA_PIO2 = ATA_PIO1 | (1 << 2), 71 ATA_PIO3 = ATA_PIO2 | (1 << 3), 72 ATA_PIO4 = ATA_PIO3 | (1 << 4), 73 ATA_PIO5 = ATA_PIO4 | (1 << 5), 74 ATA_PIO6 = ATA_PIO5 | (1 << 6), 75 76 ATA_SWDMA0 = (1 << 0), 77 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1), 78 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2), 79 80 ATA_SWDMA2_ONLY = (1 << 2), 81 82 ATA_MWDMA0 = (1 << 0), 83 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1), 84 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2), 85 86 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2), 87 ATA_MWDMA2_ONLY = (1 << 2), 88 89 ATA_UDMA0 = (1 << 0), 90 ATA_UDMA1 = ATA_UDMA0 | (1 << 1), 91 ATA_UDMA2 = ATA_UDMA1 | (1 << 2), 92 ATA_UDMA3 = ATA_UDMA2 | (1 << 3), 93 ATA_UDMA4 = ATA_UDMA3 | (1 << 4), 94 ATA_UDMA5 = ATA_UDMA4 | (1 << 5), 95 ATA_UDMA6 = ATA_UDMA5 | (1 << 6), 96 ATA_UDMA7 = ATA_UDMA6 | (1 << 7), 97 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */ 98 99 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */ 100 101 /* DMA-related */ 102 ATA_PRD_SZ = 8, 103 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ), 104 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */ 105 106 ATA_DMA_TABLE_OFS = 4, 107 ATA_DMA_STATUS = 2, 108 ATA_DMA_CMD = 0, 109 ATA_DMA_WR = (1 << 3), 110 ATA_DMA_START = (1 << 0), 111 ATA_DMA_INTR = (1 << 2), 112 ATA_DMA_ERR = (1 << 1), 113 ATA_DMA_ACTIVE = (1 << 0), 114 115 /* bits in ATA command block registers */ 116 ATA_HOB = (1 << 7), /* LBA48 selector */ 117 ATA_NIEN = (1 << 1), /* disable-irq flag */ 118 ATA_LBA = (1 << 6), /* LBA28 selector */ 119 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */ 120 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */ 121 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */ 122 ATA_BUSY = (1 << 7), /* BSY status bit */ 123 ATA_DRDY = (1 << 6), /* device ready */ 124 ATA_DF = (1 << 5), /* device fault */ 125 ATA_DRQ = (1 << 3), /* data request i/o */ 126 ATA_ERR = (1 << 0), /* have an error */ 127 ATA_SRST = (1 << 2), /* software reset */ 128 ATA_ICRC = (1 << 7), /* interface CRC error */ 129 ATA_UNC = (1 << 6), /* uncorrectable media error */ 130 ATA_IDNF = (1 << 4), /* ID not found */ 131 ATA_ABORTED = (1 << 2), /* command aborted */ 132 133 /* ATA command block registers */ 134 ATA_REG_DATA = 0x00, 135 ATA_REG_ERR = 0x01, 136 ATA_REG_NSECT = 0x02, 137 ATA_REG_LBAL = 0x03, 138 ATA_REG_LBAM = 0x04, 139 ATA_REG_LBAH = 0x05, 140 ATA_REG_DEVICE = 0x06, 141 ATA_REG_STATUS = 0x07, 142 143 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */ 144 ATA_REG_CMD = ATA_REG_STATUS, 145 ATA_REG_BYTEL = ATA_REG_LBAM, 146 ATA_REG_BYTEH = ATA_REG_LBAH, 147 ATA_REG_DEVSEL = ATA_REG_DEVICE, 148 ATA_REG_IRQ = ATA_REG_NSECT, 149 150 /* ATA device commands */ 151 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */ 152 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */ 153 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */ 154 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */ 155 ATA_CMD_EDD = 0x90, /* execute device diagnostic */ 156 ATA_CMD_FLUSH = 0xE7, 157 ATA_CMD_FLUSH_EXT = 0xEA, 158 ATA_CMD_ID_ATA = 0xEC, 159 ATA_CMD_ID_ATAPI = 0xA1, 160 ATA_CMD_READ = 0xC8, 161 ATA_CMD_READ_EXT = 0x25, 162 ATA_CMD_WRITE = 0xCA, 163 ATA_CMD_WRITE_EXT = 0x35, 164 ATA_CMD_WRITE_FUA_EXT = 0x3D, 165 ATA_CMD_FPDMA_READ = 0x60, 166 ATA_CMD_FPDMA_WRITE = 0x61, 167 ATA_CMD_PIO_READ = 0x20, 168 ATA_CMD_PIO_READ_EXT = 0x24, 169 ATA_CMD_PIO_WRITE = 0x30, 170 ATA_CMD_PIO_WRITE_EXT = 0x34, 171 ATA_CMD_READ_MULTI = 0xC4, 172 ATA_CMD_READ_MULTI_EXT = 0x29, 173 ATA_CMD_WRITE_MULTI = 0xC5, 174 ATA_CMD_WRITE_MULTI_EXT = 0x39, 175 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE, 176 ATA_CMD_SET_FEATURES = 0xEF, 177 ATA_CMD_SET_MULTI = 0xC6, 178 ATA_CMD_PACKET = 0xA0, 179 ATA_CMD_VERIFY = 0x40, 180 ATA_CMD_VERIFY_EXT = 0x42, 181 ATA_CMD_STANDBYNOW1 = 0xE0, 182 ATA_CMD_IDLEIMMEDIATE = 0xE1, 183 ATA_CMD_INIT_DEV_PARAMS = 0x91, 184 ATA_CMD_READ_NATIVE_MAX = 0xF8, 185 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27, 186 ATA_CMD_SET_MAX = 0xF9, 187 ATA_CMD_SET_MAX_EXT = 0x37, 188 ATA_CMD_READ_LOG_EXT = 0x2f, 189 ATA_CMD_PMP_READ = 0xE4, 190 ATA_CMD_PMP_WRITE = 0xE8, 191 192 /* READ_LOG_EXT pages */ 193 ATA_LOG_SATA_NCQ = 0x10, 194 195 /* READ/WRITE LONG (obsolete) */ 196 ATA_CMD_READ_LONG = 0x22, 197 ATA_CMD_READ_LONG_ONCE = 0x23, 198 ATA_CMD_WRITE_LONG = 0x32, 199 ATA_CMD_WRITE_LONG_ONCE = 0x33, 200 201 /* SETFEATURES stuff */ 202 SETFEATURES_XFER = 0x03, 203 XFER_UDMA_7 = 0x47, 204 XFER_UDMA_6 = 0x46, 205 XFER_UDMA_5 = 0x45, 206 XFER_UDMA_4 = 0x44, 207 XFER_UDMA_3 = 0x43, 208 XFER_UDMA_2 = 0x42, 209 XFER_UDMA_1 = 0x41, 210 XFER_UDMA_0 = 0x40, 211 XFER_MW_DMA_4 = 0x24, /* CFA only */ 212 XFER_MW_DMA_3 = 0x23, /* CFA only */ 213 XFER_MW_DMA_2 = 0x22, 214 XFER_MW_DMA_1 = 0x21, 215 XFER_MW_DMA_0 = 0x20, 216 XFER_SW_DMA_2 = 0x12, 217 XFER_SW_DMA_1 = 0x11, 218 XFER_SW_DMA_0 = 0x10, 219 XFER_PIO_6 = 0x0E, /* CFA only */ 220 XFER_PIO_5 = 0x0D, /* CFA only */ 221 XFER_PIO_4 = 0x0C, 222 XFER_PIO_3 = 0x0B, 223 XFER_PIO_2 = 0x0A, 224 XFER_PIO_1 = 0x09, 225 XFER_PIO_0 = 0x08, 226 XFER_PIO_SLOW = 0x00, 227 228 SETFEATURES_WC_ON = 0x02, /* Enable write cache */ 229 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */ 230 231 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */ 232 233 /* ATAPI stuff */ 234 ATAPI_PKT_DMA = (1 << 0), 235 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir: 236 0=to device, 1=to host */ 237 ATAPI_CDB_LEN = 16, 238 239 /* PMP stuff */ 240 SATA_PMP_MAX_PORTS = 15, 241 SATA_PMP_CTRL_PORT = 15, 242 243 SATA_PMP_GSCR_DWORDS = 128, 244 SATA_PMP_GSCR_PROD_ID = 0, 245 SATA_PMP_GSCR_REV = 1, 246 SATA_PMP_GSCR_PORT_INFO = 2, 247 SATA_PMP_GSCR_ERROR = 32, 248 SATA_PMP_GSCR_ERROR_EN = 33, 249 SATA_PMP_GSCR_FEAT = 64, 250 SATA_PMP_GSCR_FEAT_EN = 96, 251 252 SATA_PMP_PSCR_STATUS = 0, 253 SATA_PMP_PSCR_ERROR = 1, 254 SATA_PMP_PSCR_CONTROL = 2, 255 256 SATA_PMP_FEAT_BIST = (1 << 0), 257 SATA_PMP_FEAT_PMREQ = (1 << 1), 258 SATA_PMP_FEAT_DYNSSC = (1 << 2), 259 SATA_PMP_FEAT_NOTIFY = (1 << 3), 260 261 /* cable types */ 262 ATA_CBL_NONE = 0, 263 ATA_CBL_PATA40 = 1, 264 ATA_CBL_PATA80 = 2, 265 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */ 266 ATA_CBL_PATA_UNK = 4, 267 ATA_CBL_SATA = 5, 268 269 /* SATA Status and Control Registers */ 270 SCR_STATUS = 0, 271 SCR_ERROR = 1, 272 SCR_CONTROL = 2, 273 SCR_ACTIVE = 3, 274 SCR_NOTIFICATION = 4, 275 276 /* SError bits */ 277 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */ 278 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */ 279 SERR_DATA = (1 << 8), /* unrecovered data error */ 280 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */ 281 SERR_PROTOCOL = (1 << 10), /* protocol violation */ 282 SERR_INTERNAL = (1 << 11), /* host internal error */ 283 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */ 284 SERR_DEV_XCHG = (1 << 26), /* device exchanged */ 285 286 /* struct ata_taskfile flags */ 287 ATA_TFLAG_LBA48 = (1 << 0), /* enable 48-bit LBA and "HOB" */ 288 ATA_TFLAG_ISADDR = (1 << 1), /* enable r/w to nsect/lba regs */ 289 ATA_TFLAG_DEVICE = (1 << 2), /* enable r/w to device reg */ 290 ATA_TFLAG_WRITE = (1 << 3), /* data dir: host->dev==1 (write) */ 291 ATA_TFLAG_LBA = (1 << 4), /* enable LBA */ 292 ATA_TFLAG_FUA = (1 << 5), /* enable FUA */ 293 ATA_TFLAG_POLLING = (1 << 6), /* set nIEN to 1 and use polling */ 294 }; 295 296 enum ata_tf_protocols { 297 /* ATA taskfile protocols */ 298 ATA_PROT_UNKNOWN, /* unknown/invalid */ 299 ATA_PROT_NODATA, /* no data */ 300 ATA_PROT_PIO, /* PIO data xfer */ 301 ATA_PROT_DMA, /* DMA */ 302 ATA_PROT_NCQ, /* NCQ */ 303 ATA_PROT_ATAPI, /* packet command, PIO data xfer*/ 304 ATA_PROT_ATAPI_NODATA, /* packet command, no data */ 305 ATA_PROT_ATAPI_DMA, /* packet command with special DMA sauce */ 306 }; 307 308 enum ata_ioctls { 309 ATA_IOC_GET_IO32 = 0x309, 310 ATA_IOC_SET_IO32 = 0x324, 311 }; 312 313 /* core structures */ 314 315 struct ata_prd { 316 u32 addr; 317 u32 flags_len; 318 }; 319 320 struct ata_taskfile { 321 unsigned long flags; /* ATA_TFLAG_xxx */ 322 u8 protocol; /* ATA_PROT_xxx */ 323 324 u8 ctl; /* control reg */ 325 326 u8 hob_feature; /* additional data */ 327 u8 hob_nsect; /* to support LBA48 */ 328 u8 hob_lbal; 329 u8 hob_lbam; 330 u8 hob_lbah; 331 332 u8 feature; 333 u8 nsect; 334 u8 lbal; 335 u8 lbam; 336 u8 lbah; 337 338 u8 device; 339 340 u8 command; /* IO operation */ 341 }; 342 343 #define ata_id_is_ata(id) (((id)[0] & (1 << 15)) == 0) 344 #define ata_id_rahead_enabled(id) ((id)[85] & (1 << 6)) 345 #define ata_id_wcache_enabled(id) ((id)[85] & (1 << 5)) 346 #define ata_id_hpa_enabled(id) ((id)[85] & (1 << 10)) 347 #define ata_id_has_fua(id) ((id)[84] & (1 << 6)) 348 #define ata_id_has_flush(id) ((id)[83] & (1 << 12)) 349 #define ata_id_has_flush_ext(id) ((id)[83] & (1 << 13)) 350 #define ata_id_has_lba48(id) ((id)[83] & (1 << 10)) 351 #define ata_id_has_hpa(id) ((id)[82] & (1 << 10)) 352 #define ata_id_has_wcache(id) ((id)[82] & (1 << 5)) 353 #define ata_id_has_pm(id) ((id)[82] & (1 << 3)) 354 #define ata_id_has_lba(id) ((id)[49] & (1 << 9)) 355 #define ata_id_has_dma(id) ((id)[49] & (1 << 8)) 356 #define ata_id_has_ncq(id) ((id)[76] & (1 << 8)) 357 #define ata_id_queue_depth(id) (((id)[75] & 0x1f) + 1) 358 #define ata_id_removeable(id) ((id)[0] & (1 << 7)) 359 #define ata_id_has_dword_io(id) ((id)[50] & (1 << 0)) 360 #define ata_id_iordy_disable(id) ((id)[49] & (1 << 10)) 361 #define ata_id_has_iordy(id) ((id)[49] & (1 << 9)) 362 #define ata_id_u32(id,n) \ 363 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)])) 364 #define ata_id_u64(id,n) \ 365 ( ((u64) (id)[(n) + 3] << 48) | \ 366 ((u64) (id)[(n) + 2] << 32) | \ 367 ((u64) (id)[(n) + 1] << 16) | \ 368 ((u64) (id)[(n) + 0]) ) 369 370 #define ata_id_cdb_intr(id) (((id)[0] & 0x60) == 0x20) 371 372 static inline unsigned int ata_id_major_version(const u16 *id) 373 { 374 unsigned int mver; 375 376 if (id[ATA_ID_MAJOR_VER] == 0xFFFF) 377 return 0; 378 379 for (mver = 14; mver >= 1; mver--) 380 if (id[ATA_ID_MAJOR_VER] & (1 << mver)) 381 break; 382 return mver; 383 } 384 385 static inline int ata_id_is_sata(const u16 *id) 386 { 387 return ata_id_major_version(id) >= 5 && id[93] == 0; 388 } 389 390 static inline int ata_id_current_chs_valid(const u16 *id) 391 { 392 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command 393 has not been issued to the device then the values of 394 id[54] to id[56] are vendor specific. */ 395 return (id[53] & 0x01) && /* Current translation valid */ 396 id[54] && /* cylinders in current translation */ 397 id[55] && /* heads in current translation */ 398 id[55] <= 16 && 399 id[56]; /* sectors in current translation */ 400 } 401 402 static inline int ata_id_is_cfa(const u16 *id) 403 { 404 u16 v = id[0]; 405 if (v == 0x848A) /* Standard CF */ 406 return 1; 407 /* Could be CF hiding as standard ATA */ 408 if (ata_id_major_version(id) >= 3 && id[82] != 0xFFFF && 409 (id[82] & ( 1 << 2))) 410 return 1; 411 return 0; 412 } 413 414 static inline int ata_drive_40wire(const u16 *dev_id) 415 { 416 if (ata_id_is_sata(dev_id)) 417 return 0; /* SATA */ 418 if ((dev_id[93] & 0xE000) == 0x6000) 419 return 0; /* 80 wire */ 420 return 1; 421 } 422 423 static inline int atapi_cdb_len(const u16 *dev_id) 424 { 425 u16 tmp = dev_id[0] & 0x3; 426 switch (tmp) { 427 case 0: return 12; 428 case 1: return 16; 429 default: return -1; 430 } 431 } 432 433 static inline int is_atapi_taskfile(const struct ata_taskfile *tf) 434 { 435 return (tf->protocol == ATA_PROT_ATAPI) || 436 (tf->protocol == ATA_PROT_ATAPI_NODATA) || 437 (tf->protocol == ATA_PROT_ATAPI_DMA); 438 } 439 440 static inline int is_multi_taskfile(struct ata_taskfile *tf) 441 { 442 return (tf->command == ATA_CMD_READ_MULTI) || 443 (tf->command == ATA_CMD_WRITE_MULTI) || 444 (tf->command == ATA_CMD_READ_MULTI_EXT) || 445 (tf->command == ATA_CMD_WRITE_MULTI_EXT) || 446 (tf->command == ATA_CMD_WRITE_MULTI_FUA_EXT); 447 } 448 449 static inline int ata_ok(u8 status) 450 { 451 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR)) 452 == ATA_DRDY); 453 } 454 455 static inline int lba_28_ok(u64 block, u32 n_block) 456 { 457 /* check the ending block number */ 458 return ((block + n_block - 1) < ((u64)1 << 28)) && (n_block <= 256); 459 } 460 461 static inline int lba_48_ok(u64 block, u32 n_block) 462 { 463 /* check the ending block number */ 464 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536); 465 } 466 467 #define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff) 468 #define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16) 469 #define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff) 470 #define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf) 471 472 #endif /* __LINUX_ATA_H__ */ 473