1 /* 2 * Copyright © 2006, Intel Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms and conditions of the GNU General Public License, 6 * version 2, as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11 * more details. 12 * 13 * You should have received a copy of the GNU General Public License along with 14 * this program; if not, write to the Free Software Foundation, Inc., 15 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. 16 * 17 */ 18 #ifndef _ASYNC_TX_H_ 19 #define _ASYNC_TX_H_ 20 #include <linux/dmaengine.h> 21 #include <linux/spinlock.h> 22 #include <linux/interrupt.h> 23 24 /* on architectures without dma-mapping capabilities we need to ensure 25 * that the asynchronous path compiles away 26 */ 27 #ifdef CONFIG_HAS_DMA 28 #define __async_inline 29 #else 30 #define __async_inline __always_inline 31 #endif 32 33 /** 34 * dma_chan_ref - object used to manage dma channels received from the 35 * dmaengine core. 36 * @chan - the channel being tracked 37 * @node - node for the channel to be placed on async_tx_master_list 38 * @rcu - for list_del_rcu 39 * @count - number of times this channel is listed in the pool 40 * (for channels with multiple capabiities) 41 */ 42 struct dma_chan_ref { 43 struct dma_chan *chan; 44 struct list_head node; 45 struct rcu_head rcu; 46 atomic_t count; 47 }; 48 49 /** 50 * async_tx_flags - modifiers for the async_* calls 51 * @ASYNC_TX_XOR_ZERO_DST: this flag must be used for xor operations where the 52 * the destination address is not a source. The asynchronous case handles this 53 * implicitly, the synchronous case needs to zero the destination block. 54 * @ASYNC_TX_XOR_DROP_DST: this flag must be used if the destination address is 55 * also one of the source addresses. In the synchronous case the destination 56 * address is an implied source, whereas the asynchronous case it must be listed 57 * as a source. The destination address must be the first address in the source 58 * array. 59 * @ASYNC_TX_ACK: immediately ack the descriptor, precludes setting up a 60 * dependency chain 61 */ 62 enum async_tx_flags { 63 ASYNC_TX_XOR_ZERO_DST = (1 << 0), 64 ASYNC_TX_XOR_DROP_DST = (1 << 1), 65 ASYNC_TX_ACK = (1 << 2), 66 }; 67 68 /** 69 * struct async_submit_ctl - async_tx submission/completion modifiers 70 * @flags: submission modifiers 71 * @depend_tx: parent dependency of the current operation being submitted 72 * @cb_fn: callback routine to run at operation completion 73 * @cb_param: parameter for the callback routine 74 * @scribble: caller provided space for dma/page address conversions 75 */ 76 struct async_submit_ctl { 77 enum async_tx_flags flags; 78 struct dma_async_tx_descriptor *depend_tx; 79 dma_async_tx_callback cb_fn; 80 void *cb_param; 81 void *scribble; 82 }; 83 84 #ifdef CONFIG_DMA_ENGINE 85 #define async_tx_issue_pending_all dma_issue_pending_all 86 87 /** 88 * async_tx_issue_pending - send pending descriptor to the hardware channel 89 * @tx: descriptor handle to retrieve hardware context 90 * 91 * Note: any dependent operations will have already been issued by 92 * async_tx_channel_switch, or (in the case of no channel switch) will 93 * be already pending on this channel. 94 */ 95 static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx) 96 { 97 if (likely(tx)) { 98 struct dma_chan *chan = tx->chan; 99 struct dma_device *dma = chan->device; 100 101 dma->device_issue_pending(chan); 102 } 103 } 104 #ifdef CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL 105 #include <asm/async_tx.h> 106 #else 107 #define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \ 108 __async_tx_find_channel(dep, type) 109 struct dma_chan * 110 __async_tx_find_channel(struct async_submit_ctl *submit, 111 enum dma_transaction_type tx_type); 112 #endif /* CONFIG_ARCH_HAS_ASYNC_TX_FIND_CHANNEL */ 113 #else 114 static inline void async_tx_issue_pending_all(void) 115 { 116 do { } while (0); 117 } 118 119 static inline void async_tx_issue_pending(struct dma_async_tx_descriptor *tx) 120 { 121 do { } while (0); 122 } 123 124 static inline struct dma_chan * 125 async_tx_find_channel(struct async_submit_ctl *submit, 126 enum dma_transaction_type tx_type, struct page **dst, 127 int dst_count, struct page **src, int src_count, 128 size_t len) 129 { 130 return NULL; 131 } 132 #endif 133 134 /** 135 * async_tx_sync_epilog - actions to take if an operation is run synchronously 136 * @cb_fn: function to call when the transaction completes 137 * @cb_fn_param: parameter to pass to the callback routine 138 */ 139 static inline void 140 async_tx_sync_epilog(struct async_submit_ctl *submit) 141 { 142 if (submit->cb_fn) 143 submit->cb_fn(submit->cb_param); 144 } 145 146 typedef union { 147 unsigned long addr; 148 struct page *page; 149 dma_addr_t dma; 150 } addr_conv_t; 151 152 static inline void 153 init_async_submit(struct async_submit_ctl *args, enum async_tx_flags flags, 154 struct dma_async_tx_descriptor *tx, 155 dma_async_tx_callback cb_fn, void *cb_param, 156 addr_conv_t *scribble) 157 { 158 args->flags = flags; 159 args->depend_tx = tx; 160 args->cb_fn = cb_fn; 161 args->cb_param = cb_param; 162 args->scribble = scribble; 163 } 164 165 void async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, 166 struct async_submit_ctl *submit); 167 168 struct dma_async_tx_descriptor * 169 async_xor(struct page *dest, struct page **src_list, unsigned int offset, 170 int src_cnt, size_t len, struct async_submit_ctl *submit); 171 172 struct dma_async_tx_descriptor * 173 async_xor_val(struct page *dest, struct page **src_list, unsigned int offset, 174 int src_cnt, size_t len, enum sum_check_flags *result, 175 struct async_submit_ctl *submit); 176 177 struct dma_async_tx_descriptor * 178 async_memcpy(struct page *dest, struct page *src, unsigned int dest_offset, 179 unsigned int src_offset, size_t len, 180 struct async_submit_ctl *submit); 181 182 struct dma_async_tx_descriptor * 183 async_memset(struct page *dest, int val, unsigned int offset, 184 size_t len, struct async_submit_ctl *submit); 185 186 struct dma_async_tx_descriptor *async_trigger_callback(struct async_submit_ctl *submit); 187 188 struct dma_async_tx_descriptor * 189 async_gen_syndrome(struct page **blocks, unsigned int offset, int src_cnt, 190 size_t len, struct async_submit_ctl *submit); 191 192 struct dma_async_tx_descriptor * 193 async_syndrome_val(struct page **blocks, unsigned int offset, int src_cnt, 194 size_t len, enum sum_check_flags *pqres, struct page *spare, 195 struct async_submit_ctl *submit); 196 197 void async_tx_quiesce(struct dma_async_tx_descriptor **tx); 198 #endif /* _ASYNC_TX_H_ */ 199