1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2015, Linaro Limited 4 */ 5 #ifndef __LINUX_ARM_SMCCC_H 6 #define __LINUX_ARM_SMCCC_H 7 8 #include <linux/init.h> 9 #include <uapi/linux/const.h> 10 11 /* 12 * This file provides common defines for ARM SMC Calling Convention as 13 * specified in 14 * https://developer.arm.com/docs/den0028/latest 15 * 16 * This code is up-to-date with version DEN 0028 C 17 */ 18 19 #define ARM_SMCCC_STD_CALL _AC(0,U) 20 #define ARM_SMCCC_FAST_CALL _AC(1,U) 21 #define ARM_SMCCC_TYPE_SHIFT 31 22 23 #define ARM_SMCCC_SMC_32 0 24 #define ARM_SMCCC_SMC_64 1 25 #define ARM_SMCCC_CALL_CONV_SHIFT 30 26 27 #define ARM_SMCCC_OWNER_MASK 0x3F 28 #define ARM_SMCCC_OWNER_SHIFT 24 29 30 #define ARM_SMCCC_FUNC_MASK 0xFFFF 31 32 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \ 33 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT)) 34 #define ARM_SMCCC_IS_64(smc_val) \ 35 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT)) 36 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK) 37 #define ARM_SMCCC_OWNER_NUM(smc_val) \ 38 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK) 39 40 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ 41 (((type) << ARM_SMCCC_TYPE_SHIFT) | \ 42 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ 43 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ 44 ((func_num) & ARM_SMCCC_FUNC_MASK)) 45 46 #define ARM_SMCCC_OWNER_ARCH 0 47 #define ARM_SMCCC_OWNER_CPU 1 48 #define ARM_SMCCC_OWNER_SIP 2 49 #define ARM_SMCCC_OWNER_OEM 3 50 #define ARM_SMCCC_OWNER_STANDARD 4 51 #define ARM_SMCCC_OWNER_STANDARD_HYP 5 52 #define ARM_SMCCC_OWNER_VENDOR_HYP 6 53 #define ARM_SMCCC_OWNER_TRUSTED_APP 48 54 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 55 #define ARM_SMCCC_OWNER_TRUSTED_OS 50 56 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 57 58 #define ARM_SMCCC_QUIRK_NONE 0 59 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ 60 61 #define ARM_SMCCC_VERSION_1_0 0x10000 62 #define ARM_SMCCC_VERSION_1_1 0x10001 63 #define ARM_SMCCC_VERSION_1_2 0x10002 64 65 #define ARM_SMCCC_VERSION_FUNC_ID \ 66 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 67 ARM_SMCCC_SMC_32, \ 68 0, 0) 69 70 #define ARM_SMCCC_ARCH_FEATURES_FUNC_ID \ 71 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 72 ARM_SMCCC_SMC_32, \ 73 0, 1) 74 75 #define ARM_SMCCC_ARCH_SOC_ID \ 76 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 77 ARM_SMCCC_SMC_32, \ 78 0, 2) 79 80 #define ARM_SMCCC_ARCH_WORKAROUND_1 \ 81 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 82 ARM_SMCCC_SMC_32, \ 83 0, 0x8000) 84 85 #define ARM_SMCCC_ARCH_WORKAROUND_2 \ 86 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 87 ARM_SMCCC_SMC_32, \ 88 0, 0x7fff) 89 90 /* Paravirtualised time calls (defined by ARM DEN0057A) */ 91 #define ARM_SMCCC_HV_PV_TIME_FEATURES \ 92 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 93 ARM_SMCCC_SMC_64, \ 94 ARM_SMCCC_OWNER_STANDARD_HYP, \ 95 0x20) 96 97 #define ARM_SMCCC_HV_PV_TIME_ST \ 98 ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 99 ARM_SMCCC_SMC_64, \ 100 ARM_SMCCC_OWNER_STANDARD_HYP, \ 101 0x21) 102 103 /* 104 * Return codes defined in ARM DEN 0070A 105 * ARM DEN 0070A is now merged/consolidated into ARM DEN 0028 C 106 */ 107 #define SMCCC_RET_SUCCESS 0 108 #define SMCCC_RET_NOT_SUPPORTED -1 109 #define SMCCC_RET_NOT_REQUIRED -2 110 #define SMCCC_RET_INVALID_PARAMETER -3 111 112 #ifndef __ASSEMBLY__ 113 114 #include <linux/linkage.h> 115 #include <linux/types.h> 116 117 enum arm_smccc_conduit { 118 SMCCC_CONDUIT_NONE, 119 SMCCC_CONDUIT_SMC, 120 SMCCC_CONDUIT_HVC, 121 }; 122 123 /** 124 * arm_smccc_1_1_get_conduit() 125 * 126 * Returns the conduit to be used for SMCCCv1.1 or later. 127 * 128 * When SMCCCv1.1 is not present, returns SMCCC_CONDUIT_NONE. 129 */ 130 enum arm_smccc_conduit arm_smccc_1_1_get_conduit(void); 131 132 /** 133 * arm_smccc_get_version() 134 * 135 * Returns the version to be used for SMCCCv1.1 or later. 136 * 137 * When SMCCCv1.1 or above is not present, returns SMCCCv1.0, but this 138 * does not imply the presence of firmware or a valid conduit. Caller 139 * handling SMCCCv1.0 must determine the conduit by other means. 140 */ 141 u32 arm_smccc_get_version(void); 142 143 void __init arm_smccc_version_init(u32 version, enum arm_smccc_conduit conduit); 144 145 /** 146 * struct arm_smccc_res - Result from SMC/HVC call 147 * @a0-a3 result values from registers 0 to 3 148 */ 149 struct arm_smccc_res { 150 unsigned long a0; 151 unsigned long a1; 152 unsigned long a2; 153 unsigned long a3; 154 }; 155 156 /** 157 * struct arm_smccc_quirk - Contains quirk information 158 * @id: quirk identification 159 * @state: quirk specific information 160 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 161 */ 162 struct arm_smccc_quirk { 163 int id; 164 union { 165 unsigned long a6; 166 } state; 167 }; 168 169 /** 170 * __arm_smccc_smc() - make SMC calls 171 * @a0-a7: arguments passed in registers 0 to 7 172 * @res: result values from registers 0 to 3 173 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. 174 * 175 * This function is used to make SMC calls following SMC Calling Convention. 176 * The content of the supplied param are copied to registers 0 to 7 prior 177 * to the SMC instruction. The return values are updated with the content 178 * from register 0 to 3 on return from the SMC instruction. An optional 179 * quirk structure provides vendor specific behavior. 180 */ 181 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, 182 unsigned long a2, unsigned long a3, unsigned long a4, 183 unsigned long a5, unsigned long a6, unsigned long a7, 184 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); 185 186 /** 187 * __arm_smccc_hvc() - make HVC calls 188 * @a0-a7: arguments passed in registers 0 to 7 189 * @res: result values from registers 0 to 3 190 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. 191 * 192 * This function is used to make HVC calls following SMC Calling 193 * Convention. The content of the supplied param are copied to registers 0 194 * to 7 prior to the HVC instruction. The return values are updated with 195 * the content from register 0 to 3 on return from the HVC instruction. An 196 * optional quirk structure provides vendor specific behavior. 197 */ 198 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, 199 unsigned long a2, unsigned long a3, unsigned long a4, 200 unsigned long a5, unsigned long a6, unsigned long a7, 201 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); 202 203 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) 204 205 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) 206 207 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) 208 209 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) 210 211 /* SMCCC v1.1 implementation madness follows */ 212 #ifdef CONFIG_ARM64 213 214 #define SMCCC_SMC_INST "smc #0" 215 #define SMCCC_HVC_INST "hvc #0" 216 217 #elif defined(CONFIG_ARM) 218 #include <asm/opcodes-sec.h> 219 #include <asm/opcodes-virt.h> 220 221 #define SMCCC_SMC_INST __SMC(0) 222 #define SMCCC_HVC_INST __HVC(0) 223 224 #endif 225 226 #define ___count_args(_0, _1, _2, _3, _4, _5, _6, _7, _8, x, ...) x 227 228 #define __count_args(...) \ 229 ___count_args(__VA_ARGS__, 7, 6, 5, 4, 3, 2, 1, 0) 230 231 #define __constraint_read_0 "r" (arg0) 232 #define __constraint_read_1 __constraint_read_0, "r" (arg1) 233 #define __constraint_read_2 __constraint_read_1, "r" (arg2) 234 #define __constraint_read_3 __constraint_read_2, "r" (arg3) 235 #define __constraint_read_4 __constraint_read_3, "r" (arg4) 236 #define __constraint_read_5 __constraint_read_4, "r" (arg5) 237 #define __constraint_read_6 __constraint_read_5, "r" (arg6) 238 #define __constraint_read_7 __constraint_read_6, "r" (arg7) 239 240 #define __declare_arg_0(a0, res) \ 241 struct arm_smccc_res *___res = res; \ 242 register unsigned long arg0 asm("r0") = (u32)a0 243 244 #define __declare_arg_1(a0, a1, res) \ 245 typeof(a1) __a1 = a1; \ 246 struct arm_smccc_res *___res = res; \ 247 register unsigned long arg0 asm("r0") = (u32)a0; \ 248 register typeof(a1) arg1 asm("r1") = __a1 249 250 #define __declare_arg_2(a0, a1, a2, res) \ 251 typeof(a1) __a1 = a1; \ 252 typeof(a2) __a2 = a2; \ 253 struct arm_smccc_res *___res = res; \ 254 register unsigned long arg0 asm("r0") = (u32)a0; \ 255 register typeof(a1) arg1 asm("r1") = __a1; \ 256 register typeof(a2) arg2 asm("r2") = __a2 257 258 #define __declare_arg_3(a0, a1, a2, a3, res) \ 259 typeof(a1) __a1 = a1; \ 260 typeof(a2) __a2 = a2; \ 261 typeof(a3) __a3 = a3; \ 262 struct arm_smccc_res *___res = res; \ 263 register unsigned long arg0 asm("r0") = (u32)a0; \ 264 register typeof(a1) arg1 asm("r1") = __a1; \ 265 register typeof(a2) arg2 asm("r2") = __a2; \ 266 register typeof(a3) arg3 asm("r3") = __a3 267 268 #define __declare_arg_4(a0, a1, a2, a3, a4, res) \ 269 typeof(a4) __a4 = a4; \ 270 __declare_arg_3(a0, a1, a2, a3, res); \ 271 register typeof(a4) arg4 asm("r4") = __a4 272 273 #define __declare_arg_5(a0, a1, a2, a3, a4, a5, res) \ 274 typeof(a5) __a5 = a5; \ 275 __declare_arg_4(a0, a1, a2, a3, a4, res); \ 276 register typeof(a5) arg5 asm("r5") = __a5 277 278 #define __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res) \ 279 typeof(a6) __a6 = a6; \ 280 __declare_arg_5(a0, a1, a2, a3, a4, a5, res); \ 281 register typeof(a6) arg6 asm("r6") = __a6 282 283 #define __declare_arg_7(a0, a1, a2, a3, a4, a5, a6, a7, res) \ 284 typeof(a7) __a7 = a7; \ 285 __declare_arg_6(a0, a1, a2, a3, a4, a5, a6, res); \ 286 register typeof(a7) arg7 asm("r7") = __a7 287 288 #define ___declare_args(count, ...) __declare_arg_ ## count(__VA_ARGS__) 289 #define __declare_args(count, ...) ___declare_args(count, __VA_ARGS__) 290 291 #define ___constraints(count) \ 292 : __constraint_read_ ## count \ 293 : "memory" 294 #define __constraints(count) ___constraints(count) 295 296 /* 297 * We have an output list that is not necessarily used, and GCC feels 298 * entitled to optimise the whole sequence away. "volatile" is what 299 * makes it stick. 300 */ 301 #define __arm_smccc_1_1(inst, ...) \ 302 do { \ 303 register unsigned long r0 asm("r0"); \ 304 register unsigned long r1 asm("r1"); \ 305 register unsigned long r2 asm("r2"); \ 306 register unsigned long r3 asm("r3"); \ 307 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ 308 asm volatile(inst "\n" : \ 309 "=r" (r0), "=r" (r1), "=r" (r2), "=r" (r3) \ 310 __constraints(__count_args(__VA_ARGS__))); \ 311 if (___res) \ 312 *___res = (typeof(*___res)){r0, r1, r2, r3}; \ 313 } while (0) 314 315 /* 316 * arm_smccc_1_1_smc() - make an SMCCC v1.1 compliant SMC call 317 * 318 * This is a variadic macro taking one to eight source arguments, and 319 * an optional return structure. 320 * 321 * @a0-a7: arguments passed in registers 0 to 7 322 * @res: result values from registers 0 to 3 323 * 324 * This macro is used to make SMC calls following SMC Calling Convention v1.1. 325 * The content of the supplied param are copied to registers 0 to 7 prior 326 * to the SMC instruction. The return values are updated with the content 327 * from register 0 to 3 on return from the SMC instruction if not NULL. 328 */ 329 #define arm_smccc_1_1_smc(...) __arm_smccc_1_1(SMCCC_SMC_INST, __VA_ARGS__) 330 331 /* 332 * arm_smccc_1_1_hvc() - make an SMCCC v1.1 compliant HVC call 333 * 334 * This is a variadic macro taking one to eight source arguments, and 335 * an optional return structure. 336 * 337 * @a0-a7: arguments passed in registers 0 to 7 338 * @res: result values from registers 0 to 3 339 * 340 * This macro is used to make HVC calls following SMC Calling Convention v1.1. 341 * The content of the supplied param are copied to registers 0 to 7 prior 342 * to the HVC instruction. The return values are updated with the content 343 * from register 0 to 3 on return from the HVC instruction if not NULL. 344 */ 345 #define arm_smccc_1_1_hvc(...) __arm_smccc_1_1(SMCCC_HVC_INST, __VA_ARGS__) 346 347 /* 348 * Like arm_smccc_1_1* but always returns SMCCC_RET_NOT_SUPPORTED. 349 * Used when the SMCCC conduit is not defined. The empty asm statement 350 * avoids compiler warnings about unused variables. 351 */ 352 #define __fail_smccc_1_1(...) \ 353 do { \ 354 __declare_args(__count_args(__VA_ARGS__), __VA_ARGS__); \ 355 asm ("" : __constraints(__count_args(__VA_ARGS__))); \ 356 if (___res) \ 357 ___res->a0 = SMCCC_RET_NOT_SUPPORTED; \ 358 } while (0) 359 360 /* 361 * arm_smccc_1_1_invoke() - make an SMCCC v1.1 compliant call 362 * 363 * This is a variadic macro taking one to eight source arguments, and 364 * an optional return structure. 365 * 366 * @a0-a7: arguments passed in registers 0 to 7 367 * @res: result values from registers 0 to 3 368 * 369 * This macro will make either an HVC call or an SMC call depending on the 370 * current SMCCC conduit. If no valid conduit is available then -1 371 * (SMCCC_RET_NOT_SUPPORTED) is returned in @res.a0 (if supplied). 372 * 373 * The return value also provides the conduit that was used. 374 */ 375 #define arm_smccc_1_1_invoke(...) ({ \ 376 int method = arm_smccc_1_1_get_conduit(); \ 377 switch (method) { \ 378 case SMCCC_CONDUIT_HVC: \ 379 arm_smccc_1_1_hvc(__VA_ARGS__); \ 380 break; \ 381 case SMCCC_CONDUIT_SMC: \ 382 arm_smccc_1_1_smc(__VA_ARGS__); \ 383 break; \ 384 default: \ 385 __fail_smccc_1_1(__VA_ARGS__); \ 386 method = SMCCC_CONDUIT_NONE; \ 387 break; \ 388 } \ 389 method; \ 390 }) 391 392 #endif /*__ASSEMBLY__*/ 393 #endif /*__LINUX_ARM_SMCCC_H*/ 394