1 /* 2 * Copyright (c) 2015, Linaro Limited 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 */ 14 #ifndef __LINUX_ARM_SMCCC_H 15 #define __LINUX_ARM_SMCCC_H 16 17 /* 18 * This file provides common defines for ARM SMC Calling Convention as 19 * specified in 20 * http://infocenter.arm.com/help/topic/com.arm.doc.den0028a/index.html 21 */ 22 23 #define ARM_SMCCC_STD_CALL 0 24 #define ARM_SMCCC_FAST_CALL 1 25 #define ARM_SMCCC_TYPE_SHIFT 31 26 27 #define ARM_SMCCC_SMC_32 0 28 #define ARM_SMCCC_SMC_64 1 29 #define ARM_SMCCC_CALL_CONV_SHIFT 30 30 31 #define ARM_SMCCC_OWNER_MASK 0x3F 32 #define ARM_SMCCC_OWNER_SHIFT 24 33 34 #define ARM_SMCCC_FUNC_MASK 0xFFFF 35 36 #define ARM_SMCCC_IS_FAST_CALL(smc_val) \ 37 ((smc_val) & (ARM_SMCCC_FAST_CALL << ARM_SMCCC_TYPE_SHIFT)) 38 #define ARM_SMCCC_IS_64(smc_val) \ 39 ((smc_val) & (ARM_SMCCC_SMC_64 << ARM_SMCCC_CALL_CONV_SHIFT)) 40 #define ARM_SMCCC_FUNC_NUM(smc_val) ((smc_val) & ARM_SMCCC_FUNC_MASK) 41 #define ARM_SMCCC_OWNER_NUM(smc_val) \ 42 (((smc_val) >> ARM_SMCCC_OWNER_SHIFT) & ARM_SMCCC_OWNER_MASK) 43 44 #define ARM_SMCCC_CALL_VAL(type, calling_convention, owner, func_num) \ 45 (((type) << ARM_SMCCC_TYPE_SHIFT) | \ 46 ((calling_convention) << ARM_SMCCC_CALL_CONV_SHIFT) | \ 47 (((owner) & ARM_SMCCC_OWNER_MASK) << ARM_SMCCC_OWNER_SHIFT) | \ 48 ((func_num) & ARM_SMCCC_FUNC_MASK)) 49 50 #define ARM_SMCCC_OWNER_ARCH 0 51 #define ARM_SMCCC_OWNER_CPU 1 52 #define ARM_SMCCC_OWNER_SIP 2 53 #define ARM_SMCCC_OWNER_OEM 3 54 #define ARM_SMCCC_OWNER_STANDARD 4 55 #define ARM_SMCCC_OWNER_TRUSTED_APP 48 56 #define ARM_SMCCC_OWNER_TRUSTED_APP_END 49 57 #define ARM_SMCCC_OWNER_TRUSTED_OS 50 58 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 59 60 #define ARM_SMCCC_QUIRK_NONE 0 61 #define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ 62 63 #ifndef __ASSEMBLY__ 64 65 #include <linux/linkage.h> 66 #include <linux/types.h> 67 /** 68 * struct arm_smccc_res - Result from SMC/HVC call 69 * @a0-a3 result values from registers 0 to 3 70 */ 71 struct arm_smccc_res { 72 unsigned long a0; 73 unsigned long a1; 74 unsigned long a2; 75 unsigned long a3; 76 }; 77 78 /** 79 * struct arm_smccc_quirk - Contains quirk information 80 * @id: quirk identification 81 * @state: quirk specific information 82 * @a6: Qualcomm quirk entry for returning post-smc call contents of a6 83 */ 84 struct arm_smccc_quirk { 85 int id; 86 union { 87 unsigned long a6; 88 } state; 89 }; 90 91 /** 92 * __arm_smccc_smc() - make SMC calls 93 * @a0-a7: arguments passed in registers 0 to 7 94 * @res: result values from registers 0 to 3 95 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. 96 * 97 * This function is used to make SMC calls following SMC Calling Convention. 98 * The content of the supplied param are copied to registers 0 to 7 prior 99 * to the SMC instruction. The return values are updated with the content 100 * from register 0 to 3 on return from the SMC instruction. An optional 101 * quirk structure provides vendor specific behavior. 102 */ 103 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, 104 unsigned long a2, unsigned long a3, unsigned long a4, 105 unsigned long a5, unsigned long a6, unsigned long a7, 106 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); 107 108 /** 109 * __arm_smccc_hvc() - make HVC calls 110 * @a0-a7: arguments passed in registers 0 to 7 111 * @res: result values from registers 0 to 3 112 * @quirk: points to an arm_smccc_quirk, or NULL when no quirks are required. 113 * 114 * This function is used to make HVC calls following SMC Calling 115 * Convention. The content of the supplied param are copied to registers 0 116 * to 7 prior to the HVC instruction. The return values are updated with 117 * the content from register 0 to 3 on return from the HVC instruction. An 118 * optional quirk structure provides vendor specific behavior. 119 */ 120 asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, 121 unsigned long a2, unsigned long a3, unsigned long a4, 122 unsigned long a5, unsigned long a6, unsigned long a7, 123 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); 124 125 #define arm_smccc_smc(...) __arm_smccc_smc(__VA_ARGS__, NULL) 126 127 #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) 128 129 #define arm_smccc_hvc(...) __arm_smccc_hvc(__VA_ARGS__, NULL) 130 131 #define arm_smccc_hvc_quirk(...) __arm_smccc_hvc(__VA_ARGS__) 132 133 #endif /*__ASSEMBLY__*/ 134 #endif /*__LINUX_ARM_SMCCC_H*/ 135