1 /* 2 * Copyright 2015 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _DRM_GPU_SCHEDULER_H_ 25 #define _DRM_GPU_SCHEDULER_H_ 26 27 #include <drm/spsc_queue.h> 28 #include <linux/dma-fence.h> 29 30 #define MAX_WAIT_SCHED_ENTITY_Q_EMPTY msecs_to_jiffies(1000) 31 32 struct drm_gpu_scheduler; 33 struct drm_sched_rq; 34 35 enum drm_sched_priority { 36 DRM_SCHED_PRIORITY_MIN, 37 DRM_SCHED_PRIORITY_LOW = DRM_SCHED_PRIORITY_MIN, 38 DRM_SCHED_PRIORITY_NORMAL, 39 DRM_SCHED_PRIORITY_HIGH_SW, 40 DRM_SCHED_PRIORITY_HIGH_HW, 41 DRM_SCHED_PRIORITY_KERNEL, 42 DRM_SCHED_PRIORITY_MAX, 43 DRM_SCHED_PRIORITY_INVALID = -1, 44 DRM_SCHED_PRIORITY_UNSET = -2 45 }; 46 47 /** 48 * struct drm_sched_entity - A wrapper around a job queue (typically 49 * attached to the DRM file_priv). 50 * 51 * @list: used to append this struct to the list of entities in the 52 * runqueue. 53 * @rq: runqueue to which this entity belongs. 54 * @rq_lock: lock to modify the runqueue to which this entity belongs. 55 * @sched: the scheduler instance to which this entity is enqueued. 56 * @job_queue: the list of jobs of this entity. 57 * @fence_seq: a linearly increasing seqno incremented with each 58 * new &drm_sched_fence which is part of the entity. 59 * @fence_context: a unique context for all the fences which belong 60 * to this entity. 61 * The &drm_sched_fence.scheduled uses the 62 * fence_context but &drm_sched_fence.finished uses 63 * fence_context + 1. 64 * @dependency: the dependency fence of the job which is on the top 65 * of the job queue. 66 * @cb: callback for the dependency fence above. 67 * @guilty: points to ctx's guilty. 68 * @fini_status: contains the exit status in case the process was signalled. 69 * @last_scheduled: points to the finished fence of the last scheduled job. 70 * 71 * Entities will emit jobs in order to their corresponding hardware 72 * ring, and the scheduler will alternate between entities based on 73 * scheduling policy. 74 */ 75 struct drm_sched_entity { 76 struct list_head list; 77 struct drm_sched_rq *rq; 78 spinlock_t rq_lock; 79 struct drm_gpu_scheduler *sched; 80 81 struct spsc_queue job_queue; 82 83 atomic_t fence_seq; 84 uint64_t fence_context; 85 86 struct dma_fence *dependency; 87 struct dma_fence_cb cb; 88 atomic_t *guilty; 89 struct dma_fence *last_scheduled; 90 }; 91 92 /** 93 * struct drm_sched_rq - queue of entities to be scheduled. 94 * 95 * @lock: to modify the entities list. 96 * @entities: list of the entities to be scheduled. 97 * @current_entity: the entity which is to be scheduled. 98 * 99 * Run queue is a set of entities scheduling command submissions for 100 * one specific ring. It implements the scheduling policy that selects 101 * the next entity to emit commands from. 102 */ 103 struct drm_sched_rq { 104 spinlock_t lock; 105 struct list_head entities; 106 struct drm_sched_entity *current_entity; 107 }; 108 109 /** 110 * struct drm_sched_fence - fences corresponding to the scheduling of a job. 111 */ 112 struct drm_sched_fence { 113 /** 114 * @scheduled: this fence is what will be signaled by the scheduler 115 * when the job is scheduled. 116 */ 117 struct dma_fence scheduled; 118 119 /** 120 * @finished: this fence is what will be signaled by the scheduler 121 * when the job is completed. 122 * 123 * When setting up an out fence for the job, you should use 124 * this, since it's available immediately upon 125 * drm_sched_job_init(), and the fence returned by the driver 126 * from run_job() won't be created until the dependencies have 127 * resolved. 128 */ 129 struct dma_fence finished; 130 131 /** 132 * @cb: the callback for the parent fence below. 133 */ 134 struct dma_fence_cb cb; 135 /** 136 * @parent: the fence returned by &drm_sched_backend_ops.run_job 137 * when scheduling the job on hardware. We signal the 138 * &drm_sched_fence.finished fence once parent is signalled. 139 */ 140 struct dma_fence *parent; 141 /** 142 * @sched: the scheduler instance to which the job having this struct 143 * belongs to. 144 */ 145 struct drm_gpu_scheduler *sched; 146 /** 147 * @lock: the lock used by the scheduled and the finished fences. 148 */ 149 spinlock_t lock; 150 /** 151 * @owner: job owner for debugging 152 */ 153 void *owner; 154 }; 155 156 struct drm_sched_fence *to_drm_sched_fence(struct dma_fence *f); 157 158 /** 159 * struct drm_sched_job - A job to be run by an entity. 160 * 161 * @queue_node: used to append this struct to the queue of jobs in an entity. 162 * @sched: the scheduler instance on which this job is scheduled. 163 * @s_fence: contains the fences for the scheduling of job. 164 * @finish_cb: the callback for the finished fence. 165 * @finish_work: schedules the function @drm_sched_job_finish once the job has 166 * finished to remove the job from the 167 * @drm_gpu_scheduler.ring_mirror_list. 168 * @node: used to append this struct to the @drm_gpu_scheduler.ring_mirror_list. 169 * @work_tdr: schedules a delayed call to @drm_sched_job_timedout after the timeout 170 * interval is over. 171 * @id: a unique id assigned to each job scheduled on the scheduler. 172 * @karma: increment on every hang caused by this job. If this exceeds the hang 173 * limit of the scheduler then the job is marked guilty and will not 174 * be scheduled further. 175 * @s_priority: the priority of the job. 176 * @entity: the entity to which this job belongs. 177 * 178 * A job is created by the driver using drm_sched_job_init(), and 179 * should call drm_sched_entity_push_job() once it wants the scheduler 180 * to schedule the job. 181 */ 182 struct drm_sched_job { 183 struct spsc_node queue_node; 184 struct drm_gpu_scheduler *sched; 185 struct drm_sched_fence *s_fence; 186 struct dma_fence_cb finish_cb; 187 struct work_struct finish_work; 188 struct list_head node; 189 struct delayed_work work_tdr; 190 uint64_t id; 191 atomic_t karma; 192 enum drm_sched_priority s_priority; 193 struct drm_sched_entity *entity; 194 }; 195 196 static inline bool drm_sched_invalidate_job(struct drm_sched_job *s_job, 197 int threshold) 198 { 199 return (s_job && atomic_inc_return(&s_job->karma) > threshold); 200 } 201 202 /** 203 * struct drm_sched_backend_ops 204 * 205 * Define the backend operations called by the scheduler, 206 * these functions should be implemented in driver side. 207 */ 208 struct drm_sched_backend_ops { 209 /** 210 * @dependency: Called when the scheduler is considering scheduling 211 * this job next, to get another struct dma_fence for this job to 212 * block on. Once it returns NULL, run_job() may be called. 213 */ 214 struct dma_fence *(*dependency)(struct drm_sched_job *sched_job, 215 struct drm_sched_entity *s_entity); 216 217 /** 218 * @run_job: Called to execute the job once all of the dependencies 219 * have been resolved. This may be called multiple times, if 220 * timedout_job() has happened and drm_sched_job_recovery() 221 * decides to try it again. 222 */ 223 struct dma_fence *(*run_job)(struct drm_sched_job *sched_job); 224 225 /** 226 * @timedout_job: Called when a job has taken too long to execute, 227 * to trigger GPU recovery. 228 */ 229 void (*timedout_job)(struct drm_sched_job *sched_job); 230 231 /** 232 * @free_job: Called once the job's finished fence has been signaled 233 * and it's time to clean it up. 234 */ 235 void (*free_job)(struct drm_sched_job *sched_job); 236 }; 237 238 /** 239 * struct drm_gpu_scheduler 240 * 241 * @ops: backend operations provided by the driver. 242 * @hw_submission_limit: the max size of the hardware queue. 243 * @timeout: the time after which a job is removed from the scheduler. 244 * @name: name of the ring for which this scheduler is being used. 245 * @sched_rq: priority wise array of run queues. 246 * @wake_up_worker: the wait queue on which the scheduler sleeps until a job 247 * is ready to be scheduled. 248 * @job_scheduled: once @drm_sched_entity_do_release is called the scheduler 249 * waits on this wait queue until all the scheduled jobs are 250 * finished. 251 * @hw_rq_count: the number of jobs currently in the hardware queue. 252 * @job_id_count: used to assign unique id to the each job. 253 * @thread: the kthread on which the scheduler which run. 254 * @ring_mirror_list: the list of jobs which are currently in the job queue. 255 * @job_list_lock: lock to protect the ring_mirror_list. 256 * @hang_limit: once the hangs by a job crosses this limit then it is marked 257 * guilty and it will be considered for scheduling further. 258 * 259 * One scheduler is implemented for each hardware ring. 260 */ 261 struct drm_gpu_scheduler { 262 const struct drm_sched_backend_ops *ops; 263 uint32_t hw_submission_limit; 264 long timeout; 265 const char *name; 266 struct drm_sched_rq sched_rq[DRM_SCHED_PRIORITY_MAX]; 267 wait_queue_head_t wake_up_worker; 268 wait_queue_head_t job_scheduled; 269 atomic_t hw_rq_count; 270 atomic64_t job_id_count; 271 struct task_struct *thread; 272 struct list_head ring_mirror_list; 273 spinlock_t job_list_lock; 274 int hang_limit; 275 }; 276 277 int drm_sched_init(struct drm_gpu_scheduler *sched, 278 const struct drm_sched_backend_ops *ops, 279 uint32_t hw_submission, unsigned hang_limit, long timeout, 280 const char *name); 281 void drm_sched_fini(struct drm_gpu_scheduler *sched); 282 283 int drm_sched_entity_init(struct drm_gpu_scheduler *sched, 284 struct drm_sched_entity *entity, 285 struct drm_sched_rq *rq, 286 atomic_t *guilty); 287 long drm_sched_entity_do_release(struct drm_gpu_scheduler *sched, 288 struct drm_sched_entity *entity, long timeout); 289 void drm_sched_entity_cleanup(struct drm_gpu_scheduler *sched, 290 struct drm_sched_entity *entity); 291 void drm_sched_entity_fini(struct drm_gpu_scheduler *sched, 292 struct drm_sched_entity *entity); 293 void drm_sched_entity_push_job(struct drm_sched_job *sched_job, 294 struct drm_sched_entity *entity); 295 void drm_sched_entity_set_rq(struct drm_sched_entity *entity, 296 struct drm_sched_rq *rq); 297 298 struct drm_sched_fence *drm_sched_fence_create( 299 struct drm_sched_entity *s_entity, void *owner); 300 void drm_sched_fence_scheduled(struct drm_sched_fence *fence); 301 void drm_sched_fence_finished(struct drm_sched_fence *fence); 302 int drm_sched_job_init(struct drm_sched_job *job, 303 struct drm_gpu_scheduler *sched, 304 struct drm_sched_entity *entity, 305 void *owner); 306 void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, 307 struct drm_sched_job *job); 308 void drm_sched_job_recovery(struct drm_gpu_scheduler *sched); 309 bool drm_sched_dependency_optimized(struct dma_fence* fence, 310 struct drm_sched_entity *entity); 311 void drm_sched_job_kickout(struct drm_sched_job *s_job); 312 313 #endif 314