1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* include/asm-generic/tlb.h 3 * 4 * Generic TLB shootdown code 5 * 6 * Copyright 2001 Red Hat, Inc. 7 * Based on code from mm/memory.c Copyright Linus Torvalds and others. 8 * 9 * Copyright 2011 Red Hat, Inc., Peter Zijlstra 10 */ 11 #ifndef _ASM_GENERIC__TLB_H 12 #define _ASM_GENERIC__TLB_H 13 14 #include <linux/mmu_notifier.h> 15 #include <linux/swap.h> 16 #include <linux/hugetlb_inline.h> 17 #include <asm/tlbflush.h> 18 #include <asm/cacheflush.h> 19 20 /* 21 * Blindly accessing user memory from NMI context can be dangerous 22 * if we're in the middle of switching the current user task or switching 23 * the loaded mm. 24 */ 25 #ifndef nmi_uaccess_okay 26 # define nmi_uaccess_okay() true 27 #endif 28 29 #ifdef CONFIG_MMU 30 31 /* 32 * Generic MMU-gather implementation. 33 * 34 * The mmu_gather data structure is used by the mm code to implement the 35 * correct and efficient ordering of freeing pages and TLB invalidations. 36 * 37 * This correct ordering is: 38 * 39 * 1) unhook page 40 * 2) TLB invalidate page 41 * 3) free page 42 * 43 * That is, we must never free a page before we have ensured there are no live 44 * translations left to it. Otherwise it might be possible to observe (or 45 * worse, change) the page content after it has been reused. 46 * 47 * The mmu_gather API consists of: 48 * 49 * - tlb_gather_mmu() / tlb_gather_mmu_fullmm() / tlb_finish_mmu() 50 * 51 * start and finish a mmu_gather 52 * 53 * Finish in particular will issue a (final) TLB invalidate and free 54 * all (remaining) queued pages. 55 * 56 * - tlb_start_vma() / tlb_end_vma(); marks the start / end of a VMA 57 * 58 * Defaults to flushing at tlb_end_vma() to reset the range; helps when 59 * there's large holes between the VMAs. 60 * 61 * - tlb_remove_table() 62 * 63 * tlb_remove_table() is the basic primitive to free page-table directories 64 * (__p*_free_tlb()). In it's most primitive form it is an alias for 65 * tlb_remove_page() below, for when page directories are pages and have no 66 * additional constraints. 67 * 68 * See also MMU_GATHER_TABLE_FREE and MMU_GATHER_RCU_TABLE_FREE. 69 * 70 * - tlb_remove_page() / __tlb_remove_page() 71 * - tlb_remove_page_size() / __tlb_remove_page_size() 72 * 73 * __tlb_remove_page_size() is the basic primitive that queues a page for 74 * freeing. __tlb_remove_page() assumes PAGE_SIZE. Both will return a 75 * boolean indicating if the queue is (now) full and a call to 76 * tlb_flush_mmu() is required. 77 * 78 * tlb_remove_page() and tlb_remove_page_size() imply the call to 79 * tlb_flush_mmu() when required and has no return value. 80 * 81 * - tlb_change_page_size() 82 * 83 * call before __tlb_remove_page*() to set the current page-size; implies a 84 * possible tlb_flush_mmu() call. 85 * 86 * - tlb_flush_mmu() / tlb_flush_mmu_tlbonly() 87 * 88 * tlb_flush_mmu_tlbonly() - does the TLB invalidate (and resets 89 * related state, like the range) 90 * 91 * tlb_flush_mmu() - in addition to the above TLB invalidate, also frees 92 * whatever pages are still batched. 93 * 94 * - mmu_gather::fullmm 95 * 96 * A flag set by tlb_gather_mmu_fullmm() to indicate we're going to free 97 * the entire mm; this allows a number of optimizations. 98 * 99 * - We can ignore tlb_{start,end}_vma(); because we don't 100 * care about ranges. Everything will be shot down. 101 * 102 * - (RISC) architectures that use ASIDs can cycle to a new ASID 103 * and delay the invalidation until ASID space runs out. 104 * 105 * - mmu_gather::need_flush_all 106 * 107 * A flag that can be set by the arch code if it wants to force 108 * flush the entire TLB irrespective of the range. For instance 109 * x86-PAE needs this when changing top-level entries. 110 * 111 * And allows the architecture to provide and implement tlb_flush(): 112 * 113 * tlb_flush() may, in addition to the above mentioned mmu_gather fields, make 114 * use of: 115 * 116 * - mmu_gather::start / mmu_gather::end 117 * 118 * which provides the range that needs to be flushed to cover the pages to 119 * be freed. 120 * 121 * - mmu_gather::freed_tables 122 * 123 * set when we freed page table pages 124 * 125 * - tlb_get_unmap_shift() / tlb_get_unmap_size() 126 * 127 * returns the smallest TLB entry size unmapped in this range. 128 * 129 * If an architecture does not provide tlb_flush() a default implementation 130 * based on flush_tlb_range() will be used, unless MMU_GATHER_NO_RANGE is 131 * specified, in which case we'll default to flush_tlb_mm(). 132 * 133 * Additionally there are a few opt-in features: 134 * 135 * MMU_GATHER_PAGE_SIZE 136 * 137 * This ensures we call tlb_flush() every time tlb_change_page_size() actually 138 * changes the size and provides mmu_gather::page_size to tlb_flush(). 139 * 140 * This might be useful if your architecture has size specific TLB 141 * invalidation instructions. 142 * 143 * MMU_GATHER_TABLE_FREE 144 * 145 * This provides tlb_remove_table(), to be used instead of tlb_remove_page() 146 * for page directores (__p*_free_tlb()). 147 * 148 * Useful if your architecture has non-page page directories. 149 * 150 * When used, an architecture is expected to provide __tlb_remove_table() 151 * which does the actual freeing of these pages. 152 * 153 * MMU_GATHER_RCU_TABLE_FREE 154 * 155 * Like MMU_GATHER_TABLE_FREE, and adds semi-RCU semantics to the free (see 156 * comment below). 157 * 158 * Useful if your architecture doesn't use IPIs for remote TLB invalidates 159 * and therefore doesn't naturally serialize with software page-table walkers. 160 * 161 * MMU_GATHER_NO_FLUSH_CACHE 162 * 163 * Indicates the architecture has flush_cache_range() but it needs *NOT* be called 164 * before unmapping a VMA. 165 * 166 * NOTE: strictly speaking we shouldn't have this knob and instead rely on 167 * flush_cache_range() being a NOP, except Sparc64 seems to be 168 * different here. 169 * 170 * MMU_GATHER_MERGE_VMAS 171 * 172 * Indicates the architecture wants to merge ranges over VMAs; typical when 173 * multiple range invalidates are more expensive than a full invalidate. 174 * 175 * MMU_GATHER_NO_RANGE 176 * 177 * Use this if your architecture lacks an efficient flush_tlb_range(). This 178 * option implies MMU_GATHER_MERGE_VMAS above. 179 * 180 * MMU_GATHER_NO_GATHER 181 * 182 * If the option is set the mmu_gather will not track individual pages for 183 * delayed page free anymore. A platform that enables the option needs to 184 * provide its own implementation of the __tlb_remove_page_size() function to 185 * free pages. 186 * 187 * This is useful if your architecture already flushes TLB entries in the 188 * various ptep_get_and_clear() functions. 189 */ 190 191 #ifdef CONFIG_MMU_GATHER_TABLE_FREE 192 193 struct mmu_table_batch { 194 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE 195 struct rcu_head rcu; 196 #endif 197 unsigned int nr; 198 void *tables[]; 199 }; 200 201 #define MAX_TABLE_BATCH \ 202 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *)) 203 204 extern void tlb_remove_table(struct mmu_gather *tlb, void *table); 205 206 #else /* !CONFIG_MMU_GATHER_HAVE_TABLE_FREE */ 207 208 /* 209 * Without MMU_GATHER_TABLE_FREE the architecture is assumed to have page based 210 * page directories and we can use the normal page batching to free them. 211 */ 212 #define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page)) 213 214 #endif /* CONFIG_MMU_GATHER_TABLE_FREE */ 215 216 #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE 217 /* 218 * This allows an architecture that does not use the linux page-tables for 219 * hardware to skip the TLBI when freeing page tables. 220 */ 221 #ifndef tlb_needs_table_invalidate 222 #define tlb_needs_table_invalidate() (true) 223 #endif 224 225 #else 226 227 #ifdef tlb_needs_table_invalidate 228 #error tlb_needs_table_invalidate() requires MMU_GATHER_RCU_TABLE_FREE 229 #endif 230 231 #endif /* CONFIG_MMU_GATHER_RCU_TABLE_FREE */ 232 233 234 #ifndef CONFIG_MMU_GATHER_NO_GATHER 235 /* 236 * If we can't allocate a page to make a big batch of page pointers 237 * to work on, then just handle a few from the on-stack structure. 238 */ 239 #define MMU_GATHER_BUNDLE 8 240 241 struct mmu_gather_batch { 242 struct mmu_gather_batch *next; 243 unsigned int nr; 244 unsigned int max; 245 struct page *pages[]; 246 }; 247 248 #define MAX_GATHER_BATCH \ 249 ((PAGE_SIZE - sizeof(struct mmu_gather_batch)) / sizeof(void *)) 250 251 /* 252 * Limit the maximum number of mmu_gather batches to reduce a risk of soft 253 * lockups for non-preemptible kernels on huge machines when a lot of memory 254 * is zapped during unmapping. 255 * 10K pages freed at once should be safe even without a preemption point. 256 */ 257 #define MAX_GATHER_BATCH_COUNT (10000UL/MAX_GATHER_BATCH) 258 259 extern bool __tlb_remove_page_size(struct mmu_gather *tlb, struct page *page, 260 int page_size); 261 #endif 262 263 /* 264 * struct mmu_gather is an opaque type used by the mm code for passing around 265 * any data needed by arch specific code for tlb_remove_page. 266 */ 267 struct mmu_gather { 268 struct mm_struct *mm; 269 270 #ifdef CONFIG_MMU_GATHER_TABLE_FREE 271 struct mmu_table_batch *batch; 272 #endif 273 274 unsigned long start; 275 unsigned long end; 276 /* 277 * we are in the middle of an operation to clear 278 * a full mm and can make some optimizations 279 */ 280 unsigned int fullmm : 1; 281 282 /* 283 * we have performed an operation which 284 * requires a complete flush of the tlb 285 */ 286 unsigned int need_flush_all : 1; 287 288 /* 289 * we have removed page directories 290 */ 291 unsigned int freed_tables : 1; 292 293 /* 294 * at which levels have we cleared entries? 295 */ 296 unsigned int cleared_ptes : 1; 297 unsigned int cleared_pmds : 1; 298 unsigned int cleared_puds : 1; 299 unsigned int cleared_p4ds : 1; 300 301 /* 302 * tracks VM_EXEC | VM_HUGETLB in tlb_start_vma 303 */ 304 unsigned int vma_exec : 1; 305 unsigned int vma_huge : 1; 306 307 unsigned int batch_count; 308 309 #ifndef CONFIG_MMU_GATHER_NO_GATHER 310 struct mmu_gather_batch *active; 311 struct mmu_gather_batch local; 312 struct page *__pages[MMU_GATHER_BUNDLE]; 313 314 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE 315 unsigned int page_size; 316 #endif 317 #endif 318 }; 319 320 void tlb_flush_mmu(struct mmu_gather *tlb); 321 322 static inline void __tlb_adjust_range(struct mmu_gather *tlb, 323 unsigned long address, 324 unsigned int range_size) 325 { 326 tlb->start = min(tlb->start, address); 327 tlb->end = max(tlb->end, address + range_size); 328 } 329 330 static inline void __tlb_reset_range(struct mmu_gather *tlb) 331 { 332 if (tlb->fullmm) { 333 tlb->start = tlb->end = ~0; 334 } else { 335 tlb->start = TASK_SIZE; 336 tlb->end = 0; 337 } 338 tlb->freed_tables = 0; 339 tlb->cleared_ptes = 0; 340 tlb->cleared_pmds = 0; 341 tlb->cleared_puds = 0; 342 tlb->cleared_p4ds = 0; 343 /* 344 * Do not reset mmu_gather::vma_* fields here, we do not 345 * call into tlb_start_vma() again to set them if there is an 346 * intermediate flush. 347 */ 348 } 349 350 #ifdef CONFIG_MMU_GATHER_NO_RANGE 351 352 #if defined(tlb_flush) 353 #error MMU_GATHER_NO_RANGE relies on default tlb_flush() 354 #endif 355 356 /* 357 * When an architecture does not have efficient means of range flushing TLBs 358 * there is no point in doing intermediate flushes on tlb_end_vma() to keep the 359 * range small. We equally don't have to worry about page granularity or other 360 * things. 361 * 362 * All we need to do is issue a full flush for any !0 range. 363 */ 364 static inline void tlb_flush(struct mmu_gather *tlb) 365 { 366 if (tlb->end) 367 flush_tlb_mm(tlb->mm); 368 } 369 370 static inline void 371 tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { } 372 373 #else /* CONFIG_MMU_GATHER_NO_RANGE */ 374 375 #ifndef tlb_flush 376 377 /* 378 * When an architecture does not provide its own tlb_flush() implementation 379 * but does have a reasonably efficient flush_vma_range() implementation 380 * use that. 381 */ 382 static inline void tlb_flush(struct mmu_gather *tlb) 383 { 384 if (tlb->fullmm || tlb->need_flush_all) { 385 flush_tlb_mm(tlb->mm); 386 } else if (tlb->end) { 387 struct vm_area_struct vma = { 388 .vm_mm = tlb->mm, 389 .vm_flags = (tlb->vma_exec ? VM_EXEC : 0) | 390 (tlb->vma_huge ? VM_HUGETLB : 0), 391 }; 392 393 flush_tlb_range(&vma, tlb->start, tlb->end); 394 } 395 } 396 397 static inline void 398 tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) 399 { 400 /* 401 * flush_tlb_range() implementations that look at VM_HUGETLB (tile, 402 * mips-4k) flush only large pages. 403 * 404 * flush_tlb_range() implementations that flush I-TLB also flush D-TLB 405 * (tile, xtensa, arm), so it's ok to just add VM_EXEC to an existing 406 * range. 407 * 408 * We rely on tlb_end_vma() to issue a flush, such that when we reset 409 * these values the batch is empty. 410 */ 411 tlb->vma_huge = is_vm_hugetlb_page(vma); 412 tlb->vma_exec = !!(vma->vm_flags & VM_EXEC); 413 } 414 415 #else 416 417 static inline void 418 tlb_update_vma_flags(struct mmu_gather *tlb, struct vm_area_struct *vma) { } 419 420 #endif 421 422 #endif /* CONFIG_MMU_GATHER_NO_RANGE */ 423 424 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb) 425 { 426 /* 427 * Anything calling __tlb_adjust_range() also sets at least one of 428 * these bits. 429 */ 430 if (!(tlb->freed_tables || tlb->cleared_ptes || tlb->cleared_pmds || 431 tlb->cleared_puds || tlb->cleared_p4ds)) 432 return; 433 434 tlb_flush(tlb); 435 mmu_notifier_invalidate_range(tlb->mm, tlb->start, tlb->end); 436 __tlb_reset_range(tlb); 437 } 438 439 static inline void tlb_remove_page_size(struct mmu_gather *tlb, 440 struct page *page, int page_size) 441 { 442 if (__tlb_remove_page_size(tlb, page, page_size)) 443 tlb_flush_mmu(tlb); 444 } 445 446 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page) 447 { 448 return __tlb_remove_page_size(tlb, page, PAGE_SIZE); 449 } 450 451 /* tlb_remove_page 452 * Similar to __tlb_remove_page but will call tlb_flush_mmu() itself when 453 * required. 454 */ 455 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page) 456 { 457 return tlb_remove_page_size(tlb, page, PAGE_SIZE); 458 } 459 460 static inline void tlb_change_page_size(struct mmu_gather *tlb, 461 unsigned int page_size) 462 { 463 #ifdef CONFIG_MMU_GATHER_PAGE_SIZE 464 if (tlb->page_size && tlb->page_size != page_size) { 465 if (!tlb->fullmm && !tlb->need_flush_all) 466 tlb_flush_mmu(tlb); 467 } 468 469 tlb->page_size = page_size; 470 #endif 471 } 472 473 static inline unsigned long tlb_get_unmap_shift(struct mmu_gather *tlb) 474 { 475 if (tlb->cleared_ptes) 476 return PAGE_SHIFT; 477 if (tlb->cleared_pmds) 478 return PMD_SHIFT; 479 if (tlb->cleared_puds) 480 return PUD_SHIFT; 481 if (tlb->cleared_p4ds) 482 return P4D_SHIFT; 483 484 return PAGE_SHIFT; 485 } 486 487 static inline unsigned long tlb_get_unmap_size(struct mmu_gather *tlb) 488 { 489 return 1UL << tlb_get_unmap_shift(tlb); 490 } 491 492 /* 493 * In the case of tlb vma handling, we can optimise these away in the 494 * case where we're doing a full MM flush. When we're doing a munmap, 495 * the vmas are adjusted to only cover the region to be torn down. 496 */ 497 static inline void tlb_start_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 498 { 499 if (tlb->fullmm) 500 return; 501 502 tlb_update_vma_flags(tlb, vma); 503 #ifndef CONFIG_MMU_GATHER_NO_FLUSH_CACHE 504 flush_cache_range(vma, vma->vm_start, vma->vm_end); 505 #endif 506 } 507 508 static inline void tlb_end_vma(struct mmu_gather *tlb, struct vm_area_struct *vma) 509 { 510 if (tlb->fullmm || IS_ENABLED(CONFIG_MMU_GATHER_MERGE_VMAS)) 511 return; 512 513 /* 514 * Do a TLB flush and reset the range at VMA boundaries; this avoids 515 * the ranges growing with the unused space between consecutive VMAs, 516 * but also the mmu_gather::vma_* flags from tlb_start_vma() rely on 517 * this. 518 */ 519 tlb_flush_mmu_tlbonly(tlb); 520 } 521 522 /* 523 * tlb_flush_{pte|pmd|pud|p4d}_range() adjust the tlb->start and tlb->end, 524 * and set corresponding cleared_*. 525 */ 526 static inline void tlb_flush_pte_range(struct mmu_gather *tlb, 527 unsigned long address, unsigned long size) 528 { 529 __tlb_adjust_range(tlb, address, size); 530 tlb->cleared_ptes = 1; 531 } 532 533 static inline void tlb_flush_pmd_range(struct mmu_gather *tlb, 534 unsigned long address, unsigned long size) 535 { 536 __tlb_adjust_range(tlb, address, size); 537 tlb->cleared_pmds = 1; 538 } 539 540 static inline void tlb_flush_pud_range(struct mmu_gather *tlb, 541 unsigned long address, unsigned long size) 542 { 543 __tlb_adjust_range(tlb, address, size); 544 tlb->cleared_puds = 1; 545 } 546 547 static inline void tlb_flush_p4d_range(struct mmu_gather *tlb, 548 unsigned long address, unsigned long size) 549 { 550 __tlb_adjust_range(tlb, address, size); 551 tlb->cleared_p4ds = 1; 552 } 553 554 #ifndef __tlb_remove_tlb_entry 555 #define __tlb_remove_tlb_entry(tlb, ptep, address) do { } while (0) 556 #endif 557 558 /** 559 * tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation. 560 * 561 * Record the fact that pte's were really unmapped by updating the range, 562 * so we can later optimise away the tlb invalidate. This helps when 563 * userspace is unmapping already-unmapped pages, which happens quite a lot. 564 */ 565 #define tlb_remove_tlb_entry(tlb, ptep, address) \ 566 do { \ 567 tlb_flush_pte_range(tlb, address, PAGE_SIZE); \ 568 __tlb_remove_tlb_entry(tlb, ptep, address); \ 569 } while (0) 570 571 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \ 572 do { \ 573 unsigned long _sz = huge_page_size(h); \ 574 if (_sz >= P4D_SIZE) \ 575 tlb_flush_p4d_range(tlb, address, _sz); \ 576 else if (_sz >= PUD_SIZE) \ 577 tlb_flush_pud_range(tlb, address, _sz); \ 578 else if (_sz >= PMD_SIZE) \ 579 tlb_flush_pmd_range(tlb, address, _sz); \ 580 else \ 581 tlb_flush_pte_range(tlb, address, _sz); \ 582 __tlb_remove_tlb_entry(tlb, ptep, address); \ 583 } while (0) 584 585 /** 586 * tlb_remove_pmd_tlb_entry - remember a pmd mapping for later tlb invalidation 587 * This is a nop so far, because only x86 needs it. 588 */ 589 #ifndef __tlb_remove_pmd_tlb_entry 590 #define __tlb_remove_pmd_tlb_entry(tlb, pmdp, address) do {} while (0) 591 #endif 592 593 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, address) \ 594 do { \ 595 tlb_flush_pmd_range(tlb, address, HPAGE_PMD_SIZE); \ 596 __tlb_remove_pmd_tlb_entry(tlb, pmdp, address); \ 597 } while (0) 598 599 /** 600 * tlb_remove_pud_tlb_entry - remember a pud mapping for later tlb 601 * invalidation. This is a nop so far, because only x86 needs it. 602 */ 603 #ifndef __tlb_remove_pud_tlb_entry 604 #define __tlb_remove_pud_tlb_entry(tlb, pudp, address) do {} while (0) 605 #endif 606 607 #define tlb_remove_pud_tlb_entry(tlb, pudp, address) \ 608 do { \ 609 tlb_flush_pud_range(tlb, address, HPAGE_PUD_SIZE); \ 610 __tlb_remove_pud_tlb_entry(tlb, pudp, address); \ 611 } while (0) 612 613 /* 614 * For things like page tables caches (ie caching addresses "inside" the 615 * page tables, like x86 does), for legacy reasons, flushing an 616 * individual page had better flush the page table caches behind it. This 617 * is definitely how x86 works, for example. And if you have an 618 * architected non-legacy page table cache (which I'm not aware of 619 * anybody actually doing), you're going to have some architecturally 620 * explicit flushing for that, likely *separate* from a regular TLB entry 621 * flush, and thus you'd need more than just some range expansion.. 622 * 623 * So if we ever find an architecture 624 * that would want something that odd, I think it is up to that 625 * architecture to do its own odd thing, not cause pain for others 626 * http://lkml.kernel.org/r/CA+55aFzBggoXtNXQeng5d_mRoDnaMBE5Y+URs+PHR67nUpMtaw@mail.gmail.com 627 * 628 * For now w.r.t page table cache, mark the range_size as PAGE_SIZE 629 */ 630 631 #ifndef pte_free_tlb 632 #define pte_free_tlb(tlb, ptep, address) \ 633 do { \ 634 tlb_flush_pmd_range(tlb, address, PAGE_SIZE); \ 635 tlb->freed_tables = 1; \ 636 __pte_free_tlb(tlb, ptep, address); \ 637 } while (0) 638 #endif 639 640 #ifndef pmd_free_tlb 641 #define pmd_free_tlb(tlb, pmdp, address) \ 642 do { \ 643 tlb_flush_pud_range(tlb, address, PAGE_SIZE); \ 644 tlb->freed_tables = 1; \ 645 __pmd_free_tlb(tlb, pmdp, address); \ 646 } while (0) 647 #endif 648 649 #ifndef pud_free_tlb 650 #define pud_free_tlb(tlb, pudp, address) \ 651 do { \ 652 tlb_flush_p4d_range(tlb, address, PAGE_SIZE); \ 653 tlb->freed_tables = 1; \ 654 __pud_free_tlb(tlb, pudp, address); \ 655 } while (0) 656 #endif 657 658 #ifndef p4d_free_tlb 659 #define p4d_free_tlb(tlb, pudp, address) \ 660 do { \ 661 __tlb_adjust_range(tlb, address, PAGE_SIZE); \ 662 tlb->freed_tables = 1; \ 663 __p4d_free_tlb(tlb, pudp, address); \ 664 } while (0) 665 #endif 666 667 #ifndef pte_needs_flush 668 static inline bool pte_needs_flush(pte_t oldpte, pte_t newpte) 669 { 670 return true; 671 } 672 #endif 673 674 #ifndef huge_pmd_needs_flush 675 static inline bool huge_pmd_needs_flush(pmd_t oldpmd, pmd_t newpmd) 676 { 677 return true; 678 } 679 #endif 680 681 #endif /* CONFIG_MMU */ 682 683 #endif /* _ASM_GENERIC__TLB_H */ 684