154e41810SGil Fine // SPDX-License-Identifier: GPL-2.0
254e41810SGil Fine /*
354e41810SGil Fine * Debugfs interface
454e41810SGil Fine *
554e41810SGil Fine * Copyright (C) 2020, Intel Corporation
654e41810SGil Fine * Authors: Gil Fine <[email protected]>
754e41810SGil Fine * Mika Westerberg <[email protected]>
854e41810SGil Fine */
954e41810SGil Fine
10480ebc2eSAapo Vienamo #include <linux/array_size.h>
1149056c95SAapo Vienamo #include <linux/bitfield.h>
1254e41810SGil Fine #include <linux/debugfs.h>
1310904df3SR Kannappan #include <linux/delay.h>
1454e41810SGil Fine #include <linux/pm_runtime.h>
1577455129SCasey Bowman #include <linux/uaccess.h>
1654e41810SGil Fine
1754e41810SGil Fine #include "tb.h"
18d0f1e0c2SMika Westerberg #include "sb_regs.h"
1954e41810SGil Fine
200209c808SGil Fine #define PORT_CAP_V1_PCIE_LEN 1
210209c808SGil Fine #define PORT_CAP_V2_PCIE_LEN 2
2254e41810SGil Fine #define PORT_CAP_POWER_LEN 2
2354e41810SGil Fine #define PORT_CAP_LANE_LEN 3
2454e41810SGil Fine #define PORT_CAP_USB3_LEN 5
2575abb4f5SGil Fine #define PORT_CAP_DP_V1_LEN 9
2675abb4f5SGil Fine #define PORT_CAP_DP_V2_LEN 14
27ee22d52aSGil Fine #define PORT_CAP_TMU_V1_LEN 8
28ee22d52aSGil Fine #define PORT_CAP_TMU_V2_LEN 10
2954e41810SGil Fine #define PORT_CAP_BASIC_LEN 9
3054e41810SGil Fine #define PORT_CAP_USB4_LEN 20
3154e41810SGil Fine
3254e41810SGil Fine #define SWITCH_CAP_TMU_LEN 26
3354e41810SGil Fine #define SWITCH_CAP_BASIC_LEN 27
3454e41810SGil Fine
3554e41810SGil Fine #define PATH_LEN 2
3654e41810SGil Fine
3754e41810SGil Fine #define COUNTER_SET_LEN 3
3854e41810SGil Fine
3910904df3SR Kannappan /*
4010904df3SR Kannappan * USB4 spec doesn't specify dwell range, the range of 100 ms to 500 ms
4110904df3SR Kannappan * probed to give good results.
4210904df3SR Kannappan */
4310904df3SR Kannappan #define MIN_DWELL_TIME 100 /* ms */
4410904df3SR Kannappan #define MAX_DWELL_TIME 500 /* ms */
4510904df3SR Kannappan #define DWELL_SAMPLE_INTERVAL 10
4610904df3SR Kannappan
47c9077d59SAapo Vienamo enum usb4_margin_cap_voltage_indp {
48c9077d59SAapo Vienamo USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_MIN,
49c9077d59SAapo Vienamo USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_HL,
50c9077d59SAapo Vienamo USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_BOTH,
51c9077d59SAapo Vienamo USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_4_MIN,
52c9077d59SAapo Vienamo USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_4_BOTH,
53c9077d59SAapo Vienamo USB4_MARGIN_CAP_VOLTAGE_INDP_UNKNOWN,
54c9077d59SAapo Vienamo };
55c9077d59SAapo Vienamo
56c9077d59SAapo Vienamo enum usb4_margin_cap_time_indp {
57c9077d59SAapo Vienamo USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_MIN,
58c9077d59SAapo Vienamo USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_LR,
59c9077d59SAapo Vienamo USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_BOTH,
60c9077d59SAapo Vienamo USB4_MARGIN_CAP_TIME_INDP_GEN_4_MIN,
61c9077d59SAapo Vienamo USB4_MARGIN_CAP_TIME_INDP_GEN_4_BOTH,
62c9077d59SAapo Vienamo USB4_MARGIN_CAP_TIME_INDP_UNKNOWN,
63c9077d59SAapo Vienamo };
64c9077d59SAapo Vienamo
656d241fa0SMika Westerberg /* Sideband registers and their sizes as defined in the USB4 spec */
666d241fa0SMika Westerberg struct sb_reg {
676d241fa0SMika Westerberg unsigned int reg;
686d241fa0SMika Westerberg unsigned int size;
696d241fa0SMika Westerberg };
706d241fa0SMika Westerberg
716d241fa0SMika Westerberg #define SB_MAX_SIZE 64
726d241fa0SMika Westerberg
736d241fa0SMika Westerberg /* Sideband registers for router */
746d241fa0SMika Westerberg static const struct sb_reg port_sb_regs[] = {
756d241fa0SMika Westerberg { USB4_SB_VENDOR_ID, 4 },
766d241fa0SMika Westerberg { USB4_SB_PRODUCT_ID, 4 },
776d241fa0SMika Westerberg { USB4_SB_DEBUG_CONF, 4 },
786d241fa0SMika Westerberg { USB4_SB_DEBUG, 54 },
796d241fa0SMika Westerberg { USB4_SB_LRD_TUNING, 4 },
806d241fa0SMika Westerberg { USB4_SB_OPCODE, 4 },
816d241fa0SMika Westerberg { USB4_SB_METADATA, 4 },
826d241fa0SMika Westerberg { USB4_SB_LINK_CONF, 3 },
836d241fa0SMika Westerberg { USB4_SB_GEN23_TXFFE, 4 },
846d241fa0SMika Westerberg { USB4_SB_GEN4_TXFFE, 4 },
856d241fa0SMika Westerberg { USB4_SB_VERSION, 4 },
866d241fa0SMika Westerberg { USB4_SB_DATA, 64 },
876d241fa0SMika Westerberg };
886d241fa0SMika Westerberg
896d241fa0SMika Westerberg /* Sideband registers for retimer */
906d241fa0SMika Westerberg static const struct sb_reg retimer_sb_regs[] = {
916d241fa0SMika Westerberg { USB4_SB_VENDOR_ID, 4 },
926d241fa0SMika Westerberg { USB4_SB_PRODUCT_ID, 4 },
936d241fa0SMika Westerberg { USB4_SB_FW_VERSION, 4 },
946d241fa0SMika Westerberg { USB4_SB_LRD_TUNING, 4 },
956d241fa0SMika Westerberg { USB4_SB_OPCODE, 4 },
966d241fa0SMika Westerberg { USB4_SB_METADATA, 4 },
976d241fa0SMika Westerberg { USB4_SB_GEN23_TXFFE, 4 },
986d241fa0SMika Westerberg { USB4_SB_GEN4_TXFFE, 4 },
996d241fa0SMika Westerberg { USB4_SB_VERSION, 4 },
1006d241fa0SMika Westerberg { USB4_SB_DATA, 64 },
1016d241fa0SMika Westerberg };
1026d241fa0SMika Westerberg
10354e41810SGil Fine #define DEBUGFS_ATTR(__space, __write) \
10454e41810SGil Fine static int __space ## _open(struct inode *inode, struct file *file) \
10554e41810SGil Fine { \
10654e41810SGil Fine return single_open(file, __space ## _show, inode->i_private); \
10754e41810SGil Fine } \
10854e41810SGil Fine \
10954e41810SGil Fine static const struct file_operations __space ## _fops = { \
11054e41810SGil Fine .owner = THIS_MODULE, \
11154e41810SGil Fine .open = __space ## _open, \
11254e41810SGil Fine .release = single_release, \
11354e41810SGil Fine .read = seq_read, \
11454e41810SGil Fine .write = __write, \
11554e41810SGil Fine .llseek = seq_lseek, \
11654e41810SGil Fine }
11754e41810SGil Fine
11854e41810SGil Fine #define DEBUGFS_ATTR_RO(__space) \
11954e41810SGil Fine DEBUGFS_ATTR(__space, NULL)
12054e41810SGil Fine
12154e41810SGil Fine #define DEBUGFS_ATTR_RW(__space) \
12254e41810SGil Fine DEBUGFS_ATTR(__space, __space ## _write)
12354e41810SGil Fine
12454e41810SGil Fine static struct dentry *tb_debugfs_root;
12554e41810SGil Fine
validate_and_copy_from_user(const void __user * user_buf,size_t * count)12654e41810SGil Fine static void *validate_and_copy_from_user(const void __user *user_buf,
12754e41810SGil Fine size_t *count)
12854e41810SGil Fine {
12954e41810SGil Fine size_t nbytes;
13054e41810SGil Fine void *buf;
13154e41810SGil Fine
13254e41810SGil Fine if (!*count)
13354e41810SGil Fine return ERR_PTR(-EINVAL);
13454e41810SGil Fine
13554e41810SGil Fine if (!access_ok(user_buf, *count))
13654e41810SGil Fine return ERR_PTR(-EFAULT);
13754e41810SGil Fine
13854e41810SGil Fine buf = (void *)get_zeroed_page(GFP_KERNEL);
13954e41810SGil Fine if (!buf)
14054e41810SGil Fine return ERR_PTR(-ENOMEM);
14154e41810SGil Fine
14254e41810SGil Fine nbytes = min_t(size_t, *count, PAGE_SIZE);
14354e41810SGil Fine if (copy_from_user(buf, user_buf, nbytes)) {
14454e41810SGil Fine free_page((unsigned long)buf);
14554e41810SGil Fine return ERR_PTR(-EFAULT);
14654e41810SGil Fine }
14754e41810SGil Fine
14854e41810SGil Fine *count = nbytes;
14954e41810SGil Fine return buf;
15054e41810SGil Fine }
15154e41810SGil Fine
parse_line(char ** line,u32 * offs,u32 * val,int short_fmt_len,int long_fmt_len)15254e41810SGil Fine static bool parse_line(char **line, u32 *offs, u32 *val, int short_fmt_len,
15354e41810SGil Fine int long_fmt_len)
15454e41810SGil Fine {
15554e41810SGil Fine char *token;
15654e41810SGil Fine u32 v[5];
15754e41810SGil Fine int ret;
15854e41810SGil Fine
15954e41810SGil Fine token = strsep(line, "\n");
16054e41810SGil Fine if (!token)
16154e41810SGil Fine return false;
16254e41810SGil Fine
16354e41810SGil Fine /*
16454e41810SGil Fine * For Adapter/Router configuration space:
16554e41810SGil Fine * Short format is: offset value\n
16654e41810SGil Fine * v[0] v[1]
16754e41810SGil Fine * Long format as produced from the read side:
16854e41810SGil Fine * offset relative_offset cap_id vs_cap_id value\n
16954e41810SGil Fine * v[0] v[1] v[2] v[3] v[4]
17054e41810SGil Fine *
171398da8e6SGil Fine * For Path configuration space:
172398da8e6SGil Fine * Short format is: offset value\n
173398da8e6SGil Fine * v[0] v[1]
174398da8e6SGil Fine * Long format as produced from the read side:
175398da8e6SGil Fine * offset relative_offset in_hop_id value\n
176398da8e6SGil Fine * v[0] v[1] v[2] v[3]
177398da8e6SGil Fine *
17854e41810SGil Fine * For Counter configuration space:
17954e41810SGil Fine * Short format is: offset\n
18054e41810SGil Fine * v[0]
18154e41810SGil Fine * Long format as produced from the read side:
18254e41810SGil Fine * offset relative_offset counter_id value\n
18354e41810SGil Fine * v[0] v[1] v[2] v[3]
18454e41810SGil Fine */
18554e41810SGil Fine ret = sscanf(token, "%i %i %i %i %i", &v[0], &v[1], &v[2], &v[3], &v[4]);
18654e41810SGil Fine /* In case of Counters, clear counter, "val" content is NA */
18754e41810SGil Fine if (ret == short_fmt_len) {
18854e41810SGil Fine *offs = v[0];
18954e41810SGil Fine *val = v[short_fmt_len - 1];
19054e41810SGil Fine return true;
19154e41810SGil Fine } else if (ret == long_fmt_len) {
19254e41810SGil Fine *offs = v[0];
19354e41810SGil Fine *val = v[long_fmt_len - 1];
19454e41810SGil Fine return true;
19554e41810SGil Fine }
19654e41810SGil Fine
19754e41810SGil Fine return false;
19854e41810SGil Fine }
19954e41810SGil Fine
20054e41810SGil Fine #if IS_ENABLED(CONFIG_USB4_DEBUGFS_WRITE)
201398da8e6SGil Fine /*
202398da8e6SGil Fine * Path registers need to be written in double word pairs and they both must be
203398da8e6SGil Fine * read before written. This writes one double word in patch config space
204398da8e6SGil Fine * following the spec flow.
205398da8e6SGil Fine */
path_write_one(struct tb_port * port,u32 val,u32 offset)206398da8e6SGil Fine static int path_write_one(struct tb_port *port, u32 val, u32 offset)
20754e41810SGil Fine {
208398da8e6SGil Fine u32 index = offset % PATH_LEN;
209398da8e6SGil Fine u32 offs = offset - index;
210398da8e6SGil Fine u32 data[PATH_LEN];
211398da8e6SGil Fine int ret;
212398da8e6SGil Fine
213398da8e6SGil Fine ret = tb_port_read(port, data, TB_CFG_HOPS, offs, PATH_LEN);
214398da8e6SGil Fine if (ret)
215398da8e6SGil Fine return ret;
216398da8e6SGil Fine data[index] = val;
217398da8e6SGil Fine return tb_port_write(port, data, TB_CFG_HOPS, offs, PATH_LEN);
218398da8e6SGil Fine }
219398da8e6SGil Fine
regs_write(struct tb_switch * sw,struct tb_port * port,enum tb_cfg_space space,const char __user * user_buf,size_t count,loff_t * ppos)220398da8e6SGil Fine static ssize_t regs_write(struct tb_switch *sw, struct tb_port *port,
221398da8e6SGil Fine enum tb_cfg_space space, const char __user *user_buf,
222398da8e6SGil Fine size_t count, loff_t *ppos)
223398da8e6SGil Fine {
224398da8e6SGil Fine int long_fmt_len, ret = 0;
22554e41810SGil Fine struct tb *tb = sw->tb;
22654e41810SGil Fine char *line, *buf;
22754e41810SGil Fine u32 val, offset;
22854e41810SGil Fine
22954e41810SGil Fine buf = validate_and_copy_from_user(user_buf, &count);
23054e41810SGil Fine if (IS_ERR(buf))
23154e41810SGil Fine return PTR_ERR(buf);
23254e41810SGil Fine
23354e41810SGil Fine pm_runtime_get_sync(&sw->dev);
23454e41810SGil Fine
23554e41810SGil Fine if (mutex_lock_interruptible(&tb->lock)) {
23654e41810SGil Fine ret = -ERESTARTSYS;
23754e41810SGil Fine goto out;
23854e41810SGil Fine }
23954e41810SGil Fine
24054e41810SGil Fine /* User did hardware changes behind the driver's back */
24154e41810SGil Fine add_taint(TAINT_USER, LOCKDEP_STILL_OK);
24254e41810SGil Fine
243398da8e6SGil Fine if (space == TB_CFG_HOPS)
244398da8e6SGil Fine long_fmt_len = 4;
24554e41810SGil Fine else
246398da8e6SGil Fine long_fmt_len = 5;
247398da8e6SGil Fine
248398da8e6SGil Fine line = buf;
249398da8e6SGil Fine while (parse_line(&line, &offset, &val, 2, long_fmt_len)) {
250398da8e6SGil Fine if (port) {
251398da8e6SGil Fine if (space == TB_CFG_HOPS)
252398da8e6SGil Fine ret = path_write_one(port, val, offset);
253398da8e6SGil Fine else
254398da8e6SGil Fine ret = tb_port_write(port, &val, space, offset, 1);
255398da8e6SGil Fine } else {
25654e41810SGil Fine ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, offset, 1);
257398da8e6SGil Fine }
25854e41810SGil Fine if (ret)
25954e41810SGil Fine break;
26054e41810SGil Fine }
26154e41810SGil Fine
26254e41810SGil Fine mutex_unlock(&tb->lock);
26354e41810SGil Fine
26454e41810SGil Fine out:
26554e41810SGil Fine pm_runtime_mark_last_busy(&sw->dev);
26654e41810SGil Fine pm_runtime_put_autosuspend(&sw->dev);
26754e41810SGil Fine free_page((unsigned long)buf);
26854e41810SGil Fine
26954e41810SGil Fine return ret < 0 ? ret : count;
27054e41810SGil Fine }
27154e41810SGil Fine
port_regs_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)27254e41810SGil Fine static ssize_t port_regs_write(struct file *file, const char __user *user_buf,
27354e41810SGil Fine size_t count, loff_t *ppos)
27454e41810SGil Fine {
27554e41810SGil Fine struct seq_file *s = file->private_data;
27654e41810SGil Fine struct tb_port *port = s->private;
27754e41810SGil Fine
278398da8e6SGil Fine return regs_write(port->sw, port, TB_CFG_PORT, user_buf, count, ppos);
279398da8e6SGil Fine }
280398da8e6SGil Fine
path_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)281398da8e6SGil Fine static ssize_t path_write(struct file *file, const char __user *user_buf,
282398da8e6SGil Fine size_t count, loff_t *ppos)
283398da8e6SGil Fine {
284398da8e6SGil Fine struct seq_file *s = file->private_data;
285398da8e6SGil Fine struct tb_port *port = s->private;
286398da8e6SGil Fine
287398da8e6SGil Fine return regs_write(port->sw, port, TB_CFG_HOPS, user_buf, count, ppos);
28854e41810SGil Fine }
28954e41810SGil Fine
switch_regs_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)29054e41810SGil Fine static ssize_t switch_regs_write(struct file *file, const char __user *user_buf,
29154e41810SGil Fine size_t count, loff_t *ppos)
29254e41810SGil Fine {
29354e41810SGil Fine struct seq_file *s = file->private_data;
29454e41810SGil Fine struct tb_switch *sw = s->private;
29554e41810SGil Fine
296398da8e6SGil Fine return regs_write(sw, NULL, TB_CFG_SWITCH, user_buf, count, ppos);
29754e41810SGil Fine }
2986d241fa0SMika Westerberg
parse_sb_line(char ** line,u8 * reg,u8 * data,size_t data_size,size_t * bytes_read)2996d241fa0SMika Westerberg static bool parse_sb_line(char **line, u8 *reg, u8 *data, size_t data_size,
3006d241fa0SMika Westerberg size_t *bytes_read)
3016d241fa0SMika Westerberg {
3026d241fa0SMika Westerberg char *field, *token;
3036d241fa0SMika Westerberg int i;
3046d241fa0SMika Westerberg
3056d241fa0SMika Westerberg token = strsep(line, "\n");
3066d241fa0SMika Westerberg if (!token)
3076d241fa0SMika Westerberg return false;
3086d241fa0SMika Westerberg
3096d241fa0SMika Westerberg /* Parse the register first */
3106d241fa0SMika Westerberg field = strsep(&token, " ");
3116d241fa0SMika Westerberg if (!field)
3126d241fa0SMika Westerberg return false;
3136d241fa0SMika Westerberg if (kstrtou8(field, 0, reg))
3146d241fa0SMika Westerberg return false;
3156d241fa0SMika Westerberg
3166d241fa0SMika Westerberg /* Then the values for the register, up to data_size */
3176d241fa0SMika Westerberg for (i = 0; i < data_size; i++) {
3186d241fa0SMika Westerberg field = strsep(&token, " ");
3196d241fa0SMika Westerberg if (!field)
3206d241fa0SMika Westerberg break;
3216d241fa0SMika Westerberg if (kstrtou8(field, 0, &data[i]))
3226d241fa0SMika Westerberg return false;
3236d241fa0SMika Westerberg }
3246d241fa0SMika Westerberg
3256d241fa0SMika Westerberg *bytes_read = i;
3266d241fa0SMika Westerberg return true;
3276d241fa0SMika Westerberg }
3286d241fa0SMika Westerberg
sb_regs_write(struct tb_port * port,const struct sb_reg * sb_regs,size_t size,enum usb4_sb_target target,u8 index,char * buf,size_t count,loff_t * ppos)3296d241fa0SMika Westerberg static ssize_t sb_regs_write(struct tb_port *port, const struct sb_reg *sb_regs,
3306d241fa0SMika Westerberg size_t size, enum usb4_sb_target target, u8 index,
3316d241fa0SMika Westerberg char *buf, size_t count, loff_t *ppos)
3326d241fa0SMika Westerberg {
3336d241fa0SMika Westerberg u8 reg, data[SB_MAX_SIZE];
3346d241fa0SMika Westerberg size_t bytes_read;
3356d241fa0SMika Westerberg char *line = buf;
3366d241fa0SMika Westerberg
3376d241fa0SMika Westerberg /* User did hardware changes behind the driver's back */
3386d241fa0SMika Westerberg add_taint(TAINT_USER, LOCKDEP_STILL_OK);
3396d241fa0SMika Westerberg
3406d241fa0SMika Westerberg /*
3416d241fa0SMika Westerberg * For sideband registers we accept:
3426d241fa0SMika Westerberg * reg b0 b1 b2...\n
3436d241fa0SMika Westerberg *
3446d241fa0SMika Westerberg * Here "reg" is the byte offset of the sideband register and "b0"..
3456d241fa0SMika Westerberg * are the byte values. There can be less byte values than the register
3466d241fa0SMika Westerberg * size. The leftovers will not be overwritten.
3476d241fa0SMika Westerberg */
3486d241fa0SMika Westerberg while (parse_sb_line(&line, ®, data, ARRAY_SIZE(data), &bytes_read)) {
3496d241fa0SMika Westerberg const struct sb_reg *sb_reg;
3506d241fa0SMika Westerberg int ret;
3516d241fa0SMika Westerberg
3526d241fa0SMika Westerberg /* At least one byte must be passed */
3536d241fa0SMika Westerberg if (bytes_read < 1)
3546d241fa0SMika Westerberg return -EINVAL;
3556d241fa0SMika Westerberg
3566d241fa0SMika Westerberg /* Find the register */
3576d241fa0SMika Westerberg sb_reg = NULL;
3586d241fa0SMika Westerberg for (int i = 0; i < size; i++) {
3596d241fa0SMika Westerberg if (sb_regs[i].reg == reg) {
3606d241fa0SMika Westerberg sb_reg = &sb_regs[i];
3616d241fa0SMika Westerberg break;
3626d241fa0SMika Westerberg }
3636d241fa0SMika Westerberg }
3646d241fa0SMika Westerberg
3656d241fa0SMika Westerberg if (!sb_reg)
3666d241fa0SMika Westerberg return -EINVAL;
3676d241fa0SMika Westerberg
3686d241fa0SMika Westerberg if (bytes_read > sb_regs->size)
3696d241fa0SMika Westerberg return -E2BIG;
3706d241fa0SMika Westerberg
3716d241fa0SMika Westerberg ret = usb4_port_sb_write(port, target, index, sb_reg->reg, data,
3726d241fa0SMika Westerberg bytes_read);
3736d241fa0SMika Westerberg if (ret)
3746d241fa0SMika Westerberg return ret;
3756d241fa0SMika Westerberg }
3766d241fa0SMika Westerberg
3776d241fa0SMika Westerberg return 0;
3786d241fa0SMika Westerberg }
3796d241fa0SMika Westerberg
port_sb_regs_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)3806d241fa0SMika Westerberg static ssize_t port_sb_regs_write(struct file *file, const char __user *user_buf,
3816d241fa0SMika Westerberg size_t count, loff_t *ppos)
3826d241fa0SMika Westerberg {
3836d241fa0SMika Westerberg struct seq_file *s = file->private_data;
3846d241fa0SMika Westerberg struct tb_port *port = s->private;
3856d241fa0SMika Westerberg struct tb_switch *sw = port->sw;
3866d241fa0SMika Westerberg struct tb *tb = sw->tb;
3876d241fa0SMika Westerberg char *buf;
3886d241fa0SMika Westerberg int ret;
3896d241fa0SMika Westerberg
3906d241fa0SMika Westerberg buf = validate_and_copy_from_user(user_buf, &count);
3916d241fa0SMika Westerberg if (IS_ERR(buf))
3926d241fa0SMika Westerberg return PTR_ERR(buf);
3936d241fa0SMika Westerberg
3946d241fa0SMika Westerberg pm_runtime_get_sync(&sw->dev);
3956d241fa0SMika Westerberg
3966d241fa0SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
3976d241fa0SMika Westerberg ret = -ERESTARTSYS;
398ab3de2c7SAapo Vienamo goto out;
3996d241fa0SMika Westerberg }
4006d241fa0SMika Westerberg
4016d241fa0SMika Westerberg ret = sb_regs_write(port, port_sb_regs, ARRAY_SIZE(port_sb_regs),
4026d241fa0SMika Westerberg USB4_SB_TARGET_ROUTER, 0, buf, count, ppos);
4036d241fa0SMika Westerberg
4046d241fa0SMika Westerberg mutex_unlock(&tb->lock);
405ab3de2c7SAapo Vienamo out:
4066d241fa0SMika Westerberg pm_runtime_mark_last_busy(&sw->dev);
4076d241fa0SMika Westerberg pm_runtime_put_autosuspend(&sw->dev);
408ab3de2c7SAapo Vienamo free_page((unsigned long)buf);
4096d241fa0SMika Westerberg
4106d241fa0SMika Westerberg return ret < 0 ? ret : count;
4116d241fa0SMika Westerberg }
4126d241fa0SMika Westerberg
retimer_sb_regs_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)4136d241fa0SMika Westerberg static ssize_t retimer_sb_regs_write(struct file *file,
4146d241fa0SMika Westerberg const char __user *user_buf,
4156d241fa0SMika Westerberg size_t count, loff_t *ppos)
4166d241fa0SMika Westerberg {
4176d241fa0SMika Westerberg struct seq_file *s = file->private_data;
4186d241fa0SMika Westerberg struct tb_retimer *rt = s->private;
4196d241fa0SMika Westerberg struct tb *tb = rt->tb;
4206d241fa0SMika Westerberg char *buf;
4216d241fa0SMika Westerberg int ret;
4226d241fa0SMika Westerberg
4236d241fa0SMika Westerberg buf = validate_and_copy_from_user(user_buf, &count);
4246d241fa0SMika Westerberg if (IS_ERR(buf))
4256d241fa0SMika Westerberg return PTR_ERR(buf);
4266d241fa0SMika Westerberg
4276d241fa0SMika Westerberg pm_runtime_get_sync(&rt->dev);
4286d241fa0SMika Westerberg
4296d241fa0SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
4306d241fa0SMika Westerberg ret = -ERESTARTSYS;
431ab3de2c7SAapo Vienamo goto out;
4326d241fa0SMika Westerberg }
4336d241fa0SMika Westerberg
4346d241fa0SMika Westerberg ret = sb_regs_write(rt->port, retimer_sb_regs, ARRAY_SIZE(retimer_sb_regs),
4356d241fa0SMika Westerberg USB4_SB_TARGET_RETIMER, rt->index, buf, count, ppos);
4366d241fa0SMika Westerberg
4376d241fa0SMika Westerberg mutex_unlock(&tb->lock);
438ab3de2c7SAapo Vienamo out:
4396d241fa0SMika Westerberg pm_runtime_mark_last_busy(&rt->dev);
4406d241fa0SMika Westerberg pm_runtime_put_autosuspend(&rt->dev);
441ab3de2c7SAapo Vienamo free_page((unsigned long)buf);
4426d241fa0SMika Westerberg
4436d241fa0SMika Westerberg return ret < 0 ? ret : count;
4446d241fa0SMika Westerberg }
44554e41810SGil Fine #define DEBUGFS_MODE 0600
44654e41810SGil Fine #else
44754e41810SGil Fine #define port_regs_write NULL
448398da8e6SGil Fine #define path_write NULL
44954e41810SGil Fine #define switch_regs_write NULL
4506d241fa0SMika Westerberg #define port_sb_regs_write NULL
4516d241fa0SMika Westerberg #define retimer_sb_regs_write NULL
45254e41810SGil Fine #define DEBUGFS_MODE 0400
45354e41810SGil Fine #endif
45454e41810SGil Fine
455d0f1e0c2SMika Westerberg #if IS_ENABLED(CONFIG_USB4_DEBUGFS_MARGINING)
456d0f1e0c2SMika Westerberg /**
457d0f1e0c2SMika Westerberg * struct tb_margining - Lane margining support
458ec6f888eSMika Westerberg * @port: USB4 port through which the margining operations are run
459ff6ab055SMika Westerberg * @target: Sideband target
460ff6ab055SMika Westerberg * @index: Retimer index if taget is %USB4_SB_TARGET_RETIMER
461ff6ab055SMika Westerberg * @dev: Pointer to the device that is the target (USB4 port or retimer)
462c9077d59SAapo Vienamo * @gen: Link generation
463916f26f1SAapo Vienamo * @asym_rx: %true% if @port supports asymmetric link with 3 Rx
464d0f1e0c2SMika Westerberg * @caps: Port lane margining capabilities
465d0f1e0c2SMika Westerberg * @results: Last lane margining results
466d0f1e0c2SMika Westerberg * @lanes: %0, %1 or %7 (all)
467d0f1e0c2SMika Westerberg * @min_ber_level: Minimum supported BER level contour value
468d0f1e0c2SMika Westerberg * @max_ber_level: Maximum supported BER level contour value
469d0f1e0c2SMika Westerberg * @ber_level: Current BER level contour value
470d0f1e0c2SMika Westerberg * @voltage_steps: Number of mandatory voltage steps
471d0f1e0c2SMika Westerberg * @max_voltage_offset: Maximum mandatory voltage offset (in mV)
4729fafd46bSRene Sapiens * @voltage_steps_optional_range: Number of voltage steps for optional range
4739fafd46bSRene Sapiens * @max_voltage_offset_optional_range: Maximum voltage offset for the optional
4749fafd46bSRene Sapiens * range (in mV).
475d0f1e0c2SMika Westerberg * @time_steps: Number of time margin steps
476d0f1e0c2SMika Westerberg * @max_time_offset: Maximum time margin offset (in mUI)
47710904df3SR Kannappan * @voltage_time_offset: Offset for voltage / time for software margining
47810904df3SR Kannappan * @dwell_time: Dwell time for software margining (in ms)
47910904df3SR Kannappan * @error_counter: Error counter operation for software margining
4809fafd46bSRene Sapiens * @optional_voltage_offset_range: Enable optional extended voltage range
481d0f1e0c2SMika Westerberg * @software: %true if software margining is used instead of hardware
482d0f1e0c2SMika Westerberg * @time: %true if time margining is used instead of voltage
483d0f1e0c2SMika Westerberg * @right_high: %false if left/low margin test is performed, %true if
484d0f1e0c2SMika Westerberg * right/high
485c8c08fd9SAapo Vienamo * @upper_eye: %false if the lower PAM3 eye is used, %true if the upper
486c8c08fd9SAapo Vienamo * eye is used
487d0f1e0c2SMika Westerberg */
488d0f1e0c2SMika Westerberg struct tb_margining {
489ec6f888eSMika Westerberg struct tb_port *port;
490ff6ab055SMika Westerberg enum usb4_sb_target target;
491ff6ab055SMika Westerberg u8 index;
492ff6ab055SMika Westerberg struct device *dev;
493c9077d59SAapo Vienamo unsigned int gen;
494916f26f1SAapo Vienamo bool asym_rx;
495c9077d59SAapo Vienamo u32 caps[3];
496916f26f1SAapo Vienamo u32 results[3];
4973bf090e9SAapo Vienamo enum usb4_margining_lane lanes;
498d0f1e0c2SMika Westerberg unsigned int min_ber_level;
499d0f1e0c2SMika Westerberg unsigned int max_ber_level;
500d0f1e0c2SMika Westerberg unsigned int ber_level;
501d0f1e0c2SMika Westerberg unsigned int voltage_steps;
502d0f1e0c2SMika Westerberg unsigned int max_voltage_offset;
5039fafd46bSRene Sapiens unsigned int voltage_steps_optional_range;
5049fafd46bSRene Sapiens unsigned int max_voltage_offset_optional_range;
505d0f1e0c2SMika Westerberg unsigned int time_steps;
506d0f1e0c2SMika Westerberg unsigned int max_time_offset;
50710904df3SR Kannappan unsigned int voltage_time_offset;
50810904df3SR Kannappan unsigned int dwell_time;
50910904df3SR Kannappan enum usb4_margin_sw_error_counter error_counter;
5109fafd46bSRene Sapiens bool optional_voltage_offset_range;
511d0f1e0c2SMika Westerberg bool software;
512d0f1e0c2SMika Westerberg bool time;
513d0f1e0c2SMika Westerberg bool right_high;
514c8c08fd9SAapo Vienamo bool upper_eye;
515d0f1e0c2SMika Westerberg };
516d0f1e0c2SMika Westerberg
margining_modify_error_counter(struct tb_margining * margining,u32 lanes,enum usb4_margin_sw_error_counter error_counter)51710904df3SR Kannappan static int margining_modify_error_counter(struct tb_margining *margining,
51810904df3SR Kannappan u32 lanes, enum usb4_margin_sw_error_counter error_counter)
51910904df3SR Kannappan {
52010904df3SR Kannappan struct usb4_port_margining_params params = { 0 };
52110904df3SR Kannappan struct tb_port *port = margining->port;
52210904df3SR Kannappan u32 result;
52310904df3SR Kannappan
52410904df3SR Kannappan if (error_counter != USB4_MARGIN_SW_ERROR_COUNTER_CLEAR &&
52510904df3SR Kannappan error_counter != USB4_MARGIN_SW_ERROR_COUNTER_STOP)
52610904df3SR Kannappan return -EOPNOTSUPP;
52710904df3SR Kannappan
52810904df3SR Kannappan params.error_counter = error_counter;
52910904df3SR Kannappan params.lanes = lanes;
53010904df3SR Kannappan
53110904df3SR Kannappan return usb4_port_sw_margin(port, margining->target, margining->index,
53210904df3SR Kannappan ¶ms, &result);
53310904df3SR Kannappan }
53410904df3SR Kannappan
supports_software(const struct tb_margining * margining)535ec6f888eSMika Westerberg static bool supports_software(const struct tb_margining *margining)
536d0f1e0c2SMika Westerberg {
537c9077d59SAapo Vienamo if (margining->gen < 4)
538ec6f888eSMika Westerberg return margining->caps[0] & USB4_MARGIN_CAP_0_MODES_SW;
539c9077d59SAapo Vienamo return margining->caps[2] & USB4_MARGIN_CAP_2_MODES_SW;
540d0f1e0c2SMika Westerberg }
541d0f1e0c2SMika Westerberg
supports_hardware(const struct tb_margining * margining)542ec6f888eSMika Westerberg static bool supports_hardware(const struct tb_margining *margining)
543d0f1e0c2SMika Westerberg {
544c9077d59SAapo Vienamo if (margining->gen < 4)
545ec6f888eSMika Westerberg return margining->caps[0] & USB4_MARGIN_CAP_0_MODES_HW;
546c9077d59SAapo Vienamo return margining->caps[2] & USB4_MARGIN_CAP_2_MODES_HW;
547d0f1e0c2SMika Westerberg }
548d0f1e0c2SMika Westerberg
all_lanes(const struct tb_margining * margining)549e6c9905fSAapo Vienamo static bool all_lanes(const struct tb_margining *margining)
550d0f1e0c2SMika Westerberg {
551e6c9905fSAapo Vienamo return margining->caps[0] & USB4_MARGIN_CAP_0_ALL_LANES;
552d0f1e0c2SMika Westerberg }
553d0f1e0c2SMika Westerberg
554c9077d59SAapo Vienamo static enum usb4_margin_cap_voltage_indp
independent_voltage_margins(const struct tb_margining * margining)555ec6f888eSMika Westerberg independent_voltage_margins(const struct tb_margining *margining)
556d0f1e0c2SMika Westerberg {
557c9077d59SAapo Vienamo if (margining->gen < 4) {
558c9077d59SAapo Vienamo switch (FIELD_GET(USB4_MARGIN_CAP_0_VOLTAGE_INDP_MASK, margining->caps[0])) {
559c9077d59SAapo Vienamo case USB4_MARGIN_CAP_0_VOLTAGE_MIN:
560c9077d59SAapo Vienamo return USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_MIN;
561c9077d59SAapo Vienamo case USB4_MARGIN_CAP_0_VOLTAGE_HL:
562c9077d59SAapo Vienamo return USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_HL;
563c9077d59SAapo Vienamo case USB4_MARGIN_CAP_1_TIME_BOTH:
564c9077d59SAapo Vienamo return USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_BOTH;
565c9077d59SAapo Vienamo }
566c9077d59SAapo Vienamo } else {
567c9077d59SAapo Vienamo switch (FIELD_GET(USB4_MARGIN_CAP_2_VOLTAGE_INDP_MASK, margining->caps[2])) {
568c9077d59SAapo Vienamo case USB4_MARGIN_CAP_2_VOLTAGE_MIN:
569c9077d59SAapo Vienamo return USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_4_MIN;
570c9077d59SAapo Vienamo case USB4_MARGIN_CAP_2_VOLTAGE_BOTH:
571c9077d59SAapo Vienamo return USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_4_BOTH;
572c9077d59SAapo Vienamo }
573c9077d59SAapo Vienamo }
574c9077d59SAapo Vienamo return USB4_MARGIN_CAP_VOLTAGE_INDP_UNKNOWN;
575d0f1e0c2SMika Westerberg }
576d0f1e0c2SMika Westerberg
supports_time(const struct tb_margining * margining)577ec6f888eSMika Westerberg static bool supports_time(const struct tb_margining *margining)
578d0f1e0c2SMika Westerberg {
579c9077d59SAapo Vienamo if (margining->gen < 4)
580ec6f888eSMika Westerberg return margining->caps[0] & USB4_MARGIN_CAP_0_TIME;
581c9077d59SAapo Vienamo return margining->caps[2] & USB4_MARGIN_CAP_2_TIME;
582d0f1e0c2SMika Westerberg }
583d0f1e0c2SMika Westerberg
584d0f1e0c2SMika Westerberg /* Only applicable if supports_time() returns true */
585c9077d59SAapo Vienamo static enum usb4_margin_cap_time_indp
independent_time_margins(const struct tb_margining * margining)586ec6f888eSMika Westerberg independent_time_margins(const struct tb_margining *margining)
587d0f1e0c2SMika Westerberg {
588c9077d59SAapo Vienamo if (margining->gen < 4) {
589c9077d59SAapo Vienamo switch (FIELD_GET(USB4_MARGIN_CAP_1_TIME_INDP_MASK, margining->caps[1])) {
590c9077d59SAapo Vienamo case USB4_MARGIN_CAP_1_TIME_MIN:
591c9077d59SAapo Vienamo return USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_MIN;
592c9077d59SAapo Vienamo case USB4_MARGIN_CAP_1_TIME_LR:
593c9077d59SAapo Vienamo return USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_LR;
594c9077d59SAapo Vienamo case USB4_MARGIN_CAP_1_TIME_BOTH:
595c9077d59SAapo Vienamo return USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_BOTH;
596c9077d59SAapo Vienamo }
597c9077d59SAapo Vienamo } else {
598c9077d59SAapo Vienamo switch (FIELD_GET(USB4_MARGIN_CAP_2_TIME_INDP_MASK, margining->caps[2])) {
599c9077d59SAapo Vienamo case USB4_MARGIN_CAP_2_TIME_MIN:
600c9077d59SAapo Vienamo return USB4_MARGIN_CAP_TIME_INDP_GEN_4_MIN;
601c9077d59SAapo Vienamo case USB4_MARGIN_CAP_2_TIME_BOTH:
602c9077d59SAapo Vienamo return USB4_MARGIN_CAP_TIME_INDP_GEN_4_BOTH;
603c9077d59SAapo Vienamo }
604c9077d59SAapo Vienamo }
605c9077d59SAapo Vienamo return USB4_MARGIN_CAP_TIME_INDP_UNKNOWN;
606d0f1e0c2SMika Westerberg }
607d0f1e0c2SMika Westerberg
6089fafd46bSRene Sapiens static bool
supports_optional_voltage_offset_range(const struct tb_margining * margining)6099fafd46bSRene Sapiens supports_optional_voltage_offset_range(const struct tb_margining *margining)
6109fafd46bSRene Sapiens {
6119fafd46bSRene Sapiens return margining->caps[0] & USB4_MARGIN_CAP_0_OPT_VOLTAGE_SUPPORT;
6129fafd46bSRene Sapiens }
6139fafd46bSRene Sapiens
614d0f1e0c2SMika Westerberg static ssize_t
margining_ber_level_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)615d0f1e0c2SMika Westerberg margining_ber_level_write(struct file *file, const char __user *user_buf,
616d0f1e0c2SMika Westerberg size_t count, loff_t *ppos)
617d0f1e0c2SMika Westerberg {
618d0f1e0c2SMika Westerberg struct seq_file *s = file->private_data;
619ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
620ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
621d0f1e0c2SMika Westerberg unsigned int val;
622d0f1e0c2SMika Westerberg int ret = 0;
623d0f1e0c2SMika Westerberg char *buf;
624d0f1e0c2SMika Westerberg
625d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock))
626d0f1e0c2SMika Westerberg return -ERESTARTSYS;
627d0f1e0c2SMika Westerberg
628ec6f888eSMika Westerberg if (margining->software) {
629d0f1e0c2SMika Westerberg ret = -EINVAL;
630d0f1e0c2SMika Westerberg goto out_unlock;
631d0f1e0c2SMika Westerberg }
632d0f1e0c2SMika Westerberg
633d0f1e0c2SMika Westerberg buf = validate_and_copy_from_user(user_buf, &count);
634d0f1e0c2SMika Westerberg if (IS_ERR(buf)) {
635d0f1e0c2SMika Westerberg ret = PTR_ERR(buf);
636d0f1e0c2SMika Westerberg goto out_unlock;
637d0f1e0c2SMika Westerberg }
638d0f1e0c2SMika Westerberg
639d0f1e0c2SMika Westerberg buf[count - 1] = '\0';
640d0f1e0c2SMika Westerberg
641d0f1e0c2SMika Westerberg ret = kstrtouint(buf, 10, &val);
642d0f1e0c2SMika Westerberg if (ret)
643d0f1e0c2SMika Westerberg goto out_free;
644d0f1e0c2SMika Westerberg
645ec6f888eSMika Westerberg if (val < margining->min_ber_level ||
646ec6f888eSMika Westerberg val > margining->max_ber_level) {
647d0f1e0c2SMika Westerberg ret = -EINVAL;
648d0f1e0c2SMika Westerberg goto out_free;
649d0f1e0c2SMika Westerberg }
650d0f1e0c2SMika Westerberg
651ec6f888eSMika Westerberg margining->ber_level = val;
652d0f1e0c2SMika Westerberg
653d0f1e0c2SMika Westerberg out_free:
654d0f1e0c2SMika Westerberg free_page((unsigned long)buf);
655d0f1e0c2SMika Westerberg out_unlock:
656d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
657d0f1e0c2SMika Westerberg
658d0f1e0c2SMika Westerberg return ret < 0 ? ret : count;
659d0f1e0c2SMika Westerberg }
660d0f1e0c2SMika Westerberg
ber_level_show(struct seq_file * s,unsigned int val)661d0f1e0c2SMika Westerberg static void ber_level_show(struct seq_file *s, unsigned int val)
662d0f1e0c2SMika Westerberg {
663d0f1e0c2SMika Westerberg if (val % 2)
664d0f1e0c2SMika Westerberg seq_printf(s, "3 * 1e%d (%u)\n", -12 + (val + 1) / 2, val);
665d0f1e0c2SMika Westerberg else
666d0f1e0c2SMika Westerberg seq_printf(s, "1e%d (%u)\n", -12 + val / 2, val);
667d0f1e0c2SMika Westerberg }
668d0f1e0c2SMika Westerberg
margining_ber_level_show(struct seq_file * s,void * not_used)669d0f1e0c2SMika Westerberg static int margining_ber_level_show(struct seq_file *s, void *not_used)
670d0f1e0c2SMika Westerberg {
671ec6f888eSMika Westerberg const struct tb_margining *margining = s->private;
672d0f1e0c2SMika Westerberg
673ec6f888eSMika Westerberg if (margining->software)
674d0f1e0c2SMika Westerberg return -EINVAL;
675ec6f888eSMika Westerberg ber_level_show(s, margining->ber_level);
676d0f1e0c2SMika Westerberg return 0;
677d0f1e0c2SMika Westerberg }
678d0f1e0c2SMika Westerberg DEBUGFS_ATTR_RW(margining_ber_level);
679d0f1e0c2SMika Westerberg
margining_caps_show(struct seq_file * s,void * not_used)680d0f1e0c2SMika Westerberg static int margining_caps_show(struct seq_file *s, void *not_used)
681d0f1e0c2SMika Westerberg {
682ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
683ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
684c9077d59SAapo Vienamo int ret = 0;
685d0f1e0c2SMika Westerberg
686d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock))
687d0f1e0c2SMika Westerberg return -ERESTARTSYS;
688d0f1e0c2SMika Westerberg
689d0f1e0c2SMika Westerberg /* Dump the raw caps first */
690480ebc2eSAapo Vienamo for (int i = 0; i < ARRAY_SIZE(margining->caps); i++)
691480ebc2eSAapo Vienamo seq_printf(s, "0x%08x\n", margining->caps[i]);
692d0f1e0c2SMika Westerberg
693d0f1e0c2SMika Westerberg seq_printf(s, "# software margining: %s\n",
694ec6f888eSMika Westerberg supports_software(margining) ? "yes" : "no");
695ec6f888eSMika Westerberg if (supports_hardware(margining)) {
696d0f1e0c2SMika Westerberg seq_puts(s, "# hardware margining: yes\n");
697d0f1e0c2SMika Westerberg seq_puts(s, "# minimum BER level contour: ");
698ec6f888eSMika Westerberg ber_level_show(s, margining->min_ber_level);
699d0f1e0c2SMika Westerberg seq_puts(s, "# maximum BER level contour: ");
700ec6f888eSMika Westerberg ber_level_show(s, margining->max_ber_level);
701d0f1e0c2SMika Westerberg } else {
702d0f1e0c2SMika Westerberg seq_puts(s, "# hardware margining: no\n");
703d0f1e0c2SMika Westerberg }
704d0f1e0c2SMika Westerberg
705e6c9905fSAapo Vienamo seq_printf(s, "# all lanes simultaneously: %s\n",
706e6c9905fSAapo Vienamo str_yes_no(all_lanes(margining)));
707d0f1e0c2SMika Westerberg seq_printf(s, "# voltage margin steps: %u\n",
708ec6f888eSMika Westerberg margining->voltage_steps);
709d0f1e0c2SMika Westerberg seq_printf(s, "# maximum voltage offset: %u mV\n",
710ec6f888eSMika Westerberg margining->max_voltage_offset);
7119fafd46bSRene Sapiens seq_printf(s, "# optional voltage offset range support: %s\n",
7129fafd46bSRene Sapiens str_yes_no(supports_optional_voltage_offset_range(margining)));
7139fafd46bSRene Sapiens if (supports_optional_voltage_offset_range(margining)) {
7149fafd46bSRene Sapiens seq_printf(s, "# voltage margin steps, optional range: %u\n",
7159fafd46bSRene Sapiens margining->voltage_steps_optional_range);
7169fafd46bSRene Sapiens seq_printf(s, "# maximum voltage offset, optional range: %u mV\n",
7179fafd46bSRene Sapiens margining->max_voltage_offset_optional_range);
7189fafd46bSRene Sapiens }
719d0f1e0c2SMika Westerberg
720ec6f888eSMika Westerberg switch (independent_voltage_margins(margining)) {
721c9077d59SAapo Vienamo case USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_MIN:
722d0f1e0c2SMika Westerberg seq_puts(s, "# returns minimum between high and low voltage margins\n");
723d0f1e0c2SMika Westerberg break;
724c9077d59SAapo Vienamo case USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_HL:
725d0f1e0c2SMika Westerberg seq_puts(s, "# returns high or low voltage margin\n");
726d0f1e0c2SMika Westerberg break;
727c9077d59SAapo Vienamo case USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_BOTH:
728706d7383SColin Ian King seq_puts(s, "# returns both high and low margins\n");
729d0f1e0c2SMika Westerberg break;
730c9077d59SAapo Vienamo case USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_4_MIN:
731c9077d59SAapo Vienamo seq_puts(s, "# returns minimum between high and low voltage margins in both lower and upper eye\n");
732c9077d59SAapo Vienamo break;
733c9077d59SAapo Vienamo case USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_4_BOTH:
734c9077d59SAapo Vienamo seq_puts(s, "# returns both high and low margins of both upper and lower eye\n");
735c9077d59SAapo Vienamo break;
736c9077d59SAapo Vienamo case USB4_MARGIN_CAP_VOLTAGE_INDP_UNKNOWN:
737c9077d59SAapo Vienamo tb_port_warn(margining->port,
738c9077d59SAapo Vienamo "failed to parse independent voltage margining capabilities\n");
739c9077d59SAapo Vienamo ret = -EIO;
740c9077d59SAapo Vienamo goto out;
741d0f1e0c2SMika Westerberg }
742d0f1e0c2SMika Westerberg
743ec6f888eSMika Westerberg if (supports_time(margining)) {
744d0f1e0c2SMika Westerberg seq_puts(s, "# time margining: yes\n");
745d0f1e0c2SMika Westerberg seq_printf(s, "# time margining is destructive: %s\n",
746480ebc2eSAapo Vienamo str_yes_no(margining->caps[1] & USB4_MARGIN_CAP_1_TIME_DESTR));
747d0f1e0c2SMika Westerberg
748ec6f888eSMika Westerberg switch (independent_time_margins(margining)) {
749c9077d59SAapo Vienamo case USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_MIN:
750d0f1e0c2SMika Westerberg seq_puts(s, "# returns minimum between left and right time margins\n");
751d0f1e0c2SMika Westerberg break;
752c9077d59SAapo Vienamo case USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_LR:
753d0f1e0c2SMika Westerberg seq_puts(s, "# returns left or right margin\n");
754d0f1e0c2SMika Westerberg break;
755c9077d59SAapo Vienamo case USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_BOTH:
756d0f1e0c2SMika Westerberg seq_puts(s, "# returns both left and right margins\n");
757d0f1e0c2SMika Westerberg break;
758c9077d59SAapo Vienamo case USB4_MARGIN_CAP_TIME_INDP_GEN_4_MIN:
759c9077d59SAapo Vienamo seq_puts(s, "# returns minimum between left and right time margins in both lower and upper eye\n");
760c9077d59SAapo Vienamo break;
761c9077d59SAapo Vienamo case USB4_MARGIN_CAP_TIME_INDP_GEN_4_BOTH:
762c9077d59SAapo Vienamo seq_puts(s, "# returns both left and right margins of both upper and lower eye\n");
763c9077d59SAapo Vienamo break;
764c9077d59SAapo Vienamo case USB4_MARGIN_CAP_TIME_INDP_UNKNOWN:
765c9077d59SAapo Vienamo tb_port_warn(margining->port,
766c9077d59SAapo Vienamo "failed to parse independent time margining capabilities\n");
767c9077d59SAapo Vienamo ret = -EIO;
768c9077d59SAapo Vienamo goto out;
769d0f1e0c2SMika Westerberg }
770d0f1e0c2SMika Westerberg
771d0f1e0c2SMika Westerberg seq_printf(s, "# time margin steps: %u\n",
772ec6f888eSMika Westerberg margining->time_steps);
773d0f1e0c2SMika Westerberg seq_printf(s, "# maximum time offset: %u mUI\n",
774ec6f888eSMika Westerberg margining->max_time_offset);
775d0f1e0c2SMika Westerberg } else {
776d0f1e0c2SMika Westerberg seq_puts(s, "# time margining: no\n");
777d0f1e0c2SMika Westerberg }
778d0f1e0c2SMika Westerberg
779c9077d59SAapo Vienamo out:
780d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
781c9077d59SAapo Vienamo return ret;
782d0f1e0c2SMika Westerberg }
783d0f1e0c2SMika Westerberg DEBUGFS_ATTR_RO(margining_caps);
784d0f1e0c2SMika Westerberg
785916f26f1SAapo Vienamo static const struct {
786916f26f1SAapo Vienamo enum usb4_margining_lane lane;
787916f26f1SAapo Vienamo const char *name;
788916f26f1SAapo Vienamo } lane_names[] = {
789916f26f1SAapo Vienamo {
790916f26f1SAapo Vienamo .lane = USB4_MARGINING_LANE_RX0,
791916f26f1SAapo Vienamo .name = "0",
792916f26f1SAapo Vienamo },
793916f26f1SAapo Vienamo {
794916f26f1SAapo Vienamo .lane = USB4_MARGINING_LANE_RX1,
795916f26f1SAapo Vienamo .name = "1",
796916f26f1SAapo Vienamo },
797916f26f1SAapo Vienamo {
798916f26f1SAapo Vienamo .lane = USB4_MARGINING_LANE_RX2,
799916f26f1SAapo Vienamo .name = "2",
800916f26f1SAapo Vienamo },
801916f26f1SAapo Vienamo {
802916f26f1SAapo Vienamo .lane = USB4_MARGINING_LANE_ALL,
803916f26f1SAapo Vienamo .name = "all",
804916f26f1SAapo Vienamo },
805916f26f1SAapo Vienamo };
806916f26f1SAapo Vienamo
807d0f1e0c2SMika Westerberg static ssize_t
margining_lanes_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)808d0f1e0c2SMika Westerberg margining_lanes_write(struct file *file, const char __user *user_buf,
809d0f1e0c2SMika Westerberg size_t count, loff_t *ppos)
810d0f1e0c2SMika Westerberg {
811d0f1e0c2SMika Westerberg struct seq_file *s = file->private_data;
812ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
813916f26f1SAapo Vienamo struct tb_port *port = margining->port;
814916f26f1SAapo Vienamo struct tb *tb = port->sw->tb;
815916f26f1SAapo Vienamo int lane = -1;
816d0f1e0c2SMika Westerberg char *buf;
817d0f1e0c2SMika Westerberg
818d0f1e0c2SMika Westerberg buf = validate_and_copy_from_user(user_buf, &count);
819d0f1e0c2SMika Westerberg if (IS_ERR(buf))
820d0f1e0c2SMika Westerberg return PTR_ERR(buf);
821d0f1e0c2SMika Westerberg
822d0f1e0c2SMika Westerberg buf[count - 1] = '\0';
823d0f1e0c2SMika Westerberg
824916f26f1SAapo Vienamo for (int i = 0; i < ARRAY_SIZE(lane_names); i++) {
825916f26f1SAapo Vienamo if (!strcmp(buf, lane_names[i].name)) {
826916f26f1SAapo Vienamo lane = lane_names[i].lane;
827916f26f1SAapo Vienamo break;
828916f26f1SAapo Vienamo }
829d0f1e0c2SMika Westerberg }
830d0f1e0c2SMika Westerberg
831d0f1e0c2SMika Westerberg free_page((unsigned long)buf);
832916f26f1SAapo Vienamo
833916f26f1SAapo Vienamo if (lane == -1)
834916f26f1SAapo Vienamo return -EINVAL;
835916f26f1SAapo Vienamo
836916f26f1SAapo Vienamo scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
837916f26f1SAapo Vienamo if (lane == USB4_MARGINING_LANE_ALL && !all_lanes(margining))
838916f26f1SAapo Vienamo return -EINVAL;
839916f26f1SAapo Vienamo /*
840916f26f1SAapo Vienamo * Enabling on RX2 requires that it is supported by the
841916f26f1SAapo Vienamo * USB4 port.
842916f26f1SAapo Vienamo */
843916f26f1SAapo Vienamo if (lane == USB4_MARGINING_LANE_RX2 && !margining->asym_rx)
844916f26f1SAapo Vienamo return -EINVAL;
845916f26f1SAapo Vienamo
846916f26f1SAapo Vienamo margining->lanes = lane;
847916f26f1SAapo Vienamo }
848916f26f1SAapo Vienamo
849916f26f1SAapo Vienamo return count;
850d0f1e0c2SMika Westerberg }
851d0f1e0c2SMika Westerberg
margining_lanes_show(struct seq_file * s,void * not_used)852d0f1e0c2SMika Westerberg static int margining_lanes_show(struct seq_file *s, void *not_used)
853d0f1e0c2SMika Westerberg {
854ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
855916f26f1SAapo Vienamo struct tb_port *port = margining->port;
856916f26f1SAapo Vienamo struct tb *tb = port->sw->tb;
857d0f1e0c2SMika Westerberg
858916f26f1SAapo Vienamo scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
859916f26f1SAapo Vienamo for (int i = 0; i < ARRAY_SIZE(lane_names); i++) {
860916f26f1SAapo Vienamo if (lane_names[i].lane == USB4_MARGINING_LANE_ALL &&
861916f26f1SAapo Vienamo !all_lanes(margining))
862916f26f1SAapo Vienamo continue;
863916f26f1SAapo Vienamo if (lane_names[i].lane == USB4_MARGINING_LANE_RX2 &&
864916f26f1SAapo Vienamo !margining->asym_rx)
865916f26f1SAapo Vienamo continue;
866d0f1e0c2SMika Westerberg
867916f26f1SAapo Vienamo if (i != 0)
868916f26f1SAapo Vienamo seq_putc(s, ' ');
869916f26f1SAapo Vienamo
870916f26f1SAapo Vienamo if (lane_names[i].lane == margining->lanes)
871916f26f1SAapo Vienamo seq_printf(s, "[%s]", lane_names[i].name);
872d0f1e0c2SMika Westerberg else
873916f26f1SAapo Vienamo seq_printf(s, "%s", lane_names[i].name);
874916f26f1SAapo Vienamo }
875916f26f1SAapo Vienamo seq_puts(s, "\n");
876d0f1e0c2SMika Westerberg }
877d0f1e0c2SMika Westerberg
878d0f1e0c2SMika Westerberg return 0;
879d0f1e0c2SMika Westerberg }
880d0f1e0c2SMika Westerberg DEBUGFS_ATTR_RW(margining_lanes);
881d0f1e0c2SMika Westerberg
8829fafd46bSRene Sapiens static ssize_t
margining_voltage_time_offset_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)88310904df3SR Kannappan margining_voltage_time_offset_write(struct file *file,
8849fafd46bSRene Sapiens const char __user *user_buf,
8859fafd46bSRene Sapiens size_t count, loff_t *ppos)
8869fafd46bSRene Sapiens {
8879fafd46bSRene Sapiens struct seq_file *s = file->private_data;
8889fafd46bSRene Sapiens struct tb_margining *margining = s->private;
8899fafd46bSRene Sapiens struct tb *tb = margining->port->sw->tb;
89010904df3SR Kannappan unsigned int max_margin;
89110904df3SR Kannappan unsigned int val;
89210904df3SR Kannappan int ret;
89310904df3SR Kannappan
89410904df3SR Kannappan ret = kstrtouint_from_user(user_buf, count, 10, &val);
89510904df3SR Kannappan if (ret)
89610904df3SR Kannappan return ret;
89710904df3SR Kannappan
89810904df3SR Kannappan scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
89910904df3SR Kannappan if (!margining->software)
90010904df3SR Kannappan return -EOPNOTSUPP;
90110904df3SR Kannappan
90210904df3SR Kannappan if (margining->time)
90310904df3SR Kannappan max_margin = margining->time_steps;
90410904df3SR Kannappan else
90510904df3SR Kannappan if (margining->optional_voltage_offset_range)
90610904df3SR Kannappan max_margin = margining->voltage_steps_optional_range;
90710904df3SR Kannappan else
90810904df3SR Kannappan max_margin = margining->voltage_steps;
90910904df3SR Kannappan
91010904df3SR Kannappan margining->voltage_time_offset = clamp(val, 0, max_margin);
91110904df3SR Kannappan }
91210904df3SR Kannappan
91310904df3SR Kannappan return count;
91410904df3SR Kannappan }
91510904df3SR Kannappan
margining_voltage_time_offset_show(struct seq_file * s,void * not_used)91610904df3SR Kannappan static int margining_voltage_time_offset_show(struct seq_file *s,
91710904df3SR Kannappan void *not_used)
91810904df3SR Kannappan {
91910904df3SR Kannappan const struct tb_margining *margining = s->private;
92010904df3SR Kannappan struct tb *tb = margining->port->sw->tb;
92110904df3SR Kannappan
92210904df3SR Kannappan scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
92310904df3SR Kannappan if (!margining->software)
92410904df3SR Kannappan return -EOPNOTSUPP;
92510904df3SR Kannappan
92610904df3SR Kannappan seq_printf(s, "%d\n", margining->voltage_time_offset);
92710904df3SR Kannappan }
92810904df3SR Kannappan
92910904df3SR Kannappan return 0;
93010904df3SR Kannappan }
93110904df3SR Kannappan DEBUGFS_ATTR_RW(margining_voltage_time_offset);
93210904df3SR Kannappan
93310904df3SR Kannappan static ssize_t
margining_error_counter_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)93410904df3SR Kannappan margining_error_counter_write(struct file *file, const char __user *user_buf,
93510904df3SR Kannappan size_t count, loff_t *ppos)
93610904df3SR Kannappan {
93710904df3SR Kannappan enum usb4_margin_sw_error_counter error_counter;
93810904df3SR Kannappan struct seq_file *s = file->private_data;
93910904df3SR Kannappan struct tb_margining *margining = s->private;
94010904df3SR Kannappan struct tb *tb = margining->port->sw->tb;
94110904df3SR Kannappan char *buf;
94210904df3SR Kannappan
94310904df3SR Kannappan buf = validate_and_copy_from_user(user_buf, &count);
94410904df3SR Kannappan if (IS_ERR(buf))
94510904df3SR Kannappan return PTR_ERR(buf);
94610904df3SR Kannappan
94710904df3SR Kannappan buf[count - 1] = '\0';
94810904df3SR Kannappan
94910904df3SR Kannappan if (!strcmp(buf, "nop"))
95010904df3SR Kannappan error_counter = USB4_MARGIN_SW_ERROR_COUNTER_NOP;
95110904df3SR Kannappan else if (!strcmp(buf, "clear"))
95210904df3SR Kannappan error_counter = USB4_MARGIN_SW_ERROR_COUNTER_CLEAR;
95310904df3SR Kannappan else if (!strcmp(buf, "start"))
95410904df3SR Kannappan error_counter = USB4_MARGIN_SW_ERROR_COUNTER_START;
95510904df3SR Kannappan else if (!strcmp(buf, "stop"))
95610904df3SR Kannappan error_counter = USB4_MARGIN_SW_ERROR_COUNTER_STOP;
95710904df3SR Kannappan else
95810904df3SR Kannappan return -EINVAL;
95910904df3SR Kannappan
96010904df3SR Kannappan scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
96110904df3SR Kannappan if (!margining->software)
96210904df3SR Kannappan return -EOPNOTSUPP;
96310904df3SR Kannappan
96410904df3SR Kannappan margining->error_counter = error_counter;
96510904df3SR Kannappan }
96610904df3SR Kannappan
96710904df3SR Kannappan return count;
96810904df3SR Kannappan }
96910904df3SR Kannappan
margining_error_counter_show(struct seq_file * s,void * not_used)97010904df3SR Kannappan static int margining_error_counter_show(struct seq_file *s, void *not_used)
97110904df3SR Kannappan {
97210904df3SR Kannappan const struct tb_margining *margining = s->private;
97310904df3SR Kannappan struct tb *tb = margining->port->sw->tb;
97410904df3SR Kannappan
97510904df3SR Kannappan scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
97610904df3SR Kannappan if (!margining->software)
97710904df3SR Kannappan return -EOPNOTSUPP;
97810904df3SR Kannappan
97910904df3SR Kannappan switch (margining->error_counter) {
98010904df3SR Kannappan case USB4_MARGIN_SW_ERROR_COUNTER_NOP:
98110904df3SR Kannappan seq_puts(s, "[nop] clear start stop\n");
98210904df3SR Kannappan break;
98310904df3SR Kannappan case USB4_MARGIN_SW_ERROR_COUNTER_CLEAR:
98410904df3SR Kannappan seq_puts(s, "nop [clear] start stop\n");
98510904df3SR Kannappan break;
98610904df3SR Kannappan case USB4_MARGIN_SW_ERROR_COUNTER_START:
98710904df3SR Kannappan seq_puts(s, "nop clear [start] stop\n");
98810904df3SR Kannappan break;
98910904df3SR Kannappan case USB4_MARGIN_SW_ERROR_COUNTER_STOP:
99010904df3SR Kannappan seq_puts(s, "nop clear start [stop]\n");
99110904df3SR Kannappan break;
99210904df3SR Kannappan }
99310904df3SR Kannappan }
99410904df3SR Kannappan
99510904df3SR Kannappan return 0;
99610904df3SR Kannappan }
99710904df3SR Kannappan DEBUGFS_ATTR_RW(margining_error_counter);
99810904df3SR Kannappan
99910904df3SR Kannappan static ssize_t
margining_dwell_time_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)100010904df3SR Kannappan margining_dwell_time_write(struct file *file, const char __user *user_buf,
100110904df3SR Kannappan size_t count, loff_t *ppos)
100210904df3SR Kannappan {
100310904df3SR Kannappan struct seq_file *s = file->private_data;
100410904df3SR Kannappan struct tb_margining *margining = s->private;
100510904df3SR Kannappan struct tb *tb = margining->port->sw->tb;
100610904df3SR Kannappan unsigned int val;
100710904df3SR Kannappan int ret;
100810904df3SR Kannappan
100910904df3SR Kannappan ret = kstrtouint_from_user(user_buf, count, 10, &val);
101010904df3SR Kannappan if (ret)
101110904df3SR Kannappan return ret;
101210904df3SR Kannappan
101310904df3SR Kannappan scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
101410904df3SR Kannappan if (!margining->software)
101510904df3SR Kannappan return -EOPNOTSUPP;
101610904df3SR Kannappan
101710904df3SR Kannappan margining->dwell_time = clamp(val, MIN_DWELL_TIME, MAX_DWELL_TIME);
101810904df3SR Kannappan }
101910904df3SR Kannappan
102010904df3SR Kannappan return count;
102110904df3SR Kannappan }
102210904df3SR Kannappan
margining_dwell_time_show(struct seq_file * s,void * not_used)102310904df3SR Kannappan static int margining_dwell_time_show(struct seq_file *s, void *not_used)
102410904df3SR Kannappan {
102510904df3SR Kannappan struct tb_margining *margining = s->private;
102610904df3SR Kannappan struct tb *tb = margining->port->sw->tb;
102710904df3SR Kannappan
102810904df3SR Kannappan scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
102910904df3SR Kannappan if (!margining->software)
103010904df3SR Kannappan return -EOPNOTSUPP;
103110904df3SR Kannappan
103210904df3SR Kannappan seq_printf(s, "%d\n", margining->dwell_time);
103310904df3SR Kannappan }
103410904df3SR Kannappan
103510904df3SR Kannappan return 0;
103610904df3SR Kannappan }
103710904df3SR Kannappan DEBUGFS_ATTR_RW(margining_dwell_time);
103810904df3SR Kannappan
103910904df3SR Kannappan static ssize_t
margining_optional_voltage_offset_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)104010904df3SR Kannappan margining_optional_voltage_offset_write(struct file *file, const char __user *user_buf,
104110904df3SR Kannappan size_t count, loff_t *ppos)
104210904df3SR Kannappan {
104310904df3SR Kannappan struct seq_file *s = file->private_data;
104410904df3SR Kannappan struct tb_margining *margining = s->private;
104510904df3SR Kannappan struct tb *tb = margining->port->sw->tb;
10469fafd46bSRene Sapiens bool val;
10479fafd46bSRene Sapiens int ret;
10489fafd46bSRene Sapiens
10499fafd46bSRene Sapiens ret = kstrtobool_from_user(user_buf, count, &val);
10509fafd46bSRene Sapiens if (ret)
10519fafd46bSRene Sapiens return ret;
10529fafd46bSRene Sapiens
10539fafd46bSRene Sapiens scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
10549fafd46bSRene Sapiens margining->optional_voltage_offset_range = val;
10559fafd46bSRene Sapiens }
10569fafd46bSRene Sapiens
10579fafd46bSRene Sapiens return count;
10589fafd46bSRene Sapiens }
10599fafd46bSRene Sapiens
margining_optional_voltage_offset_show(struct seq_file * s,void * not_used)10609fafd46bSRene Sapiens static int margining_optional_voltage_offset_show(struct seq_file *s,
10619fafd46bSRene Sapiens void *not_used)
10629fafd46bSRene Sapiens {
10639fafd46bSRene Sapiens struct tb_margining *margining = s->private;
10649fafd46bSRene Sapiens struct tb *tb = margining->port->sw->tb;
10659fafd46bSRene Sapiens
10669fafd46bSRene Sapiens scoped_cond_guard(mutex_intr, return -ERESTARTSYS, &tb->lock) {
10679fafd46bSRene Sapiens seq_printf(s, "%u\n", margining->optional_voltage_offset_range);
10689fafd46bSRene Sapiens }
10699fafd46bSRene Sapiens
10709fafd46bSRene Sapiens return 0;
10719fafd46bSRene Sapiens }
10729fafd46bSRene Sapiens DEBUGFS_ATTR_RW(margining_optional_voltage_offset);
10739fafd46bSRene Sapiens
margining_mode_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1074d0f1e0c2SMika Westerberg static ssize_t margining_mode_write(struct file *file,
1075d0f1e0c2SMika Westerberg const char __user *user_buf,
1076d0f1e0c2SMika Westerberg size_t count, loff_t *ppos)
1077d0f1e0c2SMika Westerberg {
1078d0f1e0c2SMika Westerberg struct seq_file *s = file->private_data;
1079ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1080ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1081d0f1e0c2SMika Westerberg int ret = 0;
1082d0f1e0c2SMika Westerberg char *buf;
1083d0f1e0c2SMika Westerberg
1084d0f1e0c2SMika Westerberg buf = validate_and_copy_from_user(user_buf, &count);
1085d0f1e0c2SMika Westerberg if (IS_ERR(buf))
1086d0f1e0c2SMika Westerberg return PTR_ERR(buf);
1087d0f1e0c2SMika Westerberg
1088d0f1e0c2SMika Westerberg buf[count - 1] = '\0';
1089d0f1e0c2SMika Westerberg
1090d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
1091d0f1e0c2SMika Westerberg ret = -ERESTARTSYS;
1092d0f1e0c2SMika Westerberg goto out_free;
1093d0f1e0c2SMika Westerberg }
1094d0f1e0c2SMika Westerberg
1095d0f1e0c2SMika Westerberg if (!strcmp(buf, "software")) {
1096ec6f888eSMika Westerberg if (supports_software(margining))
1097ec6f888eSMika Westerberg margining->software = true;
1098d0f1e0c2SMika Westerberg else
1099d0f1e0c2SMika Westerberg ret = -EINVAL;
1100d0f1e0c2SMika Westerberg } else if (!strcmp(buf, "hardware")) {
1101ec6f888eSMika Westerberg if (supports_hardware(margining))
1102ec6f888eSMika Westerberg margining->software = false;
1103d0f1e0c2SMika Westerberg else
1104d0f1e0c2SMika Westerberg ret = -EINVAL;
1105d0f1e0c2SMika Westerberg } else {
1106d0f1e0c2SMika Westerberg ret = -EINVAL;
1107d0f1e0c2SMika Westerberg }
1108d0f1e0c2SMika Westerberg
1109d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1110d0f1e0c2SMika Westerberg
1111d0f1e0c2SMika Westerberg out_free:
1112d0f1e0c2SMika Westerberg free_page((unsigned long)buf);
1113d0f1e0c2SMika Westerberg return ret ? ret : count;
1114d0f1e0c2SMika Westerberg }
1115d0f1e0c2SMika Westerberg
margining_mode_show(struct seq_file * s,void * not_used)1116d0f1e0c2SMika Westerberg static int margining_mode_show(struct seq_file *s, void *not_used)
1117d0f1e0c2SMika Westerberg {
1118ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1119ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1120d0f1e0c2SMika Westerberg const char *space = "";
1121d0f1e0c2SMika Westerberg
1122d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock))
1123d0f1e0c2SMika Westerberg return -ERESTARTSYS;
1124d0f1e0c2SMika Westerberg
1125ec6f888eSMika Westerberg if (supports_software(margining)) {
1126ec6f888eSMika Westerberg if (margining->software)
1127d0f1e0c2SMika Westerberg seq_puts(s, "[software]");
1128d0f1e0c2SMika Westerberg else
1129d0f1e0c2SMika Westerberg seq_puts(s, "software");
1130d0f1e0c2SMika Westerberg space = " ";
1131d0f1e0c2SMika Westerberg }
1132ec6f888eSMika Westerberg if (supports_hardware(margining)) {
1133ec6f888eSMika Westerberg if (margining->software)
1134d0f1e0c2SMika Westerberg seq_printf(s, "%shardware", space);
1135d0f1e0c2SMika Westerberg else
1136d0f1e0c2SMika Westerberg seq_printf(s, "%s[hardware]", space);
1137d0f1e0c2SMika Westerberg }
1138d0f1e0c2SMika Westerberg
1139d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1140d0f1e0c2SMika Westerberg
1141d0f1e0c2SMika Westerberg seq_puts(s, "\n");
1142d0f1e0c2SMika Westerberg return 0;
1143d0f1e0c2SMika Westerberg }
1144d0f1e0c2SMika Westerberg DEBUGFS_ATTR_RW(margining_mode);
1145d0f1e0c2SMika Westerberg
margining_run_sw(struct tb_margining * margining,struct usb4_port_margining_params * params)114610904df3SR Kannappan static int margining_run_sw(struct tb_margining *margining,
114710904df3SR Kannappan struct usb4_port_margining_params *params)
114810904df3SR Kannappan {
114910904df3SR Kannappan u32 nsamples = margining->dwell_time / DWELL_SAMPLE_INTERVAL;
115010904df3SR Kannappan int ret, i;
115110904df3SR Kannappan
115210904df3SR Kannappan ret = usb4_port_sw_margin(margining->port, margining->target, margining->index,
115310904df3SR Kannappan params, margining->results);
115410904df3SR Kannappan if (ret)
115510904df3SR Kannappan goto out_stop;
115610904df3SR Kannappan
115710904df3SR Kannappan for (i = 0; i <= nsamples; i++) {
115810904df3SR Kannappan u32 errors = 0;
115910904df3SR Kannappan
116010904df3SR Kannappan ret = usb4_port_sw_margin_errors(margining->port, margining->target,
116110904df3SR Kannappan margining->index, &margining->results[1]);
116210904df3SR Kannappan if (ret)
116310904df3SR Kannappan break;
116410904df3SR Kannappan
11653bf090e9SAapo Vienamo if (margining->lanes == USB4_MARGINING_LANE_RX0)
116610904df3SR Kannappan errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_0_MASK,
116710904df3SR Kannappan margining->results[1]);
11683bf090e9SAapo Vienamo else if (margining->lanes == USB4_MARGINING_LANE_RX1)
116910904df3SR Kannappan errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_1_MASK,
117010904df3SR Kannappan margining->results[1]);
1171916f26f1SAapo Vienamo else if (margining->lanes == USB4_MARGINING_LANE_RX2)
1172916f26f1SAapo Vienamo errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_2_MASK,
1173916f26f1SAapo Vienamo margining->results[1]);
11743bf090e9SAapo Vienamo else if (margining->lanes == USB4_MARGINING_LANE_ALL)
117510904df3SR Kannappan errors = margining->results[1];
117610904df3SR Kannappan
117710904df3SR Kannappan /* Any errors stop the test */
117810904df3SR Kannappan if (errors)
117910904df3SR Kannappan break;
118010904df3SR Kannappan
118110904df3SR Kannappan fsleep(DWELL_SAMPLE_INTERVAL * USEC_PER_MSEC);
118210904df3SR Kannappan }
118310904df3SR Kannappan
118410904df3SR Kannappan out_stop:
118510904df3SR Kannappan /*
118610904df3SR Kannappan * Stop the counters but don't clear them to allow the
118710904df3SR Kannappan * different error counter configurations.
118810904df3SR Kannappan */
118910904df3SR Kannappan margining_modify_error_counter(margining, margining->lanes,
119010904df3SR Kannappan USB4_MARGIN_SW_ERROR_COUNTER_STOP);
119110904df3SR Kannappan return ret;
119210904df3SR Kannappan }
119310904df3SR Kannappan
validate_margining(struct tb_margining * margining)1194916f26f1SAapo Vienamo static int validate_margining(struct tb_margining *margining)
1195916f26f1SAapo Vienamo {
1196916f26f1SAapo Vienamo /*
1197916f26f1SAapo Vienamo * For running on RX2 the link must be asymmetric with 3
1198916f26f1SAapo Vienamo * receivers. Because this is can change dynamically, check it
1199916f26f1SAapo Vienamo * here before we start the margining and report back error if
1200916f26f1SAapo Vienamo * expectations are not met.
1201916f26f1SAapo Vienamo */
1202916f26f1SAapo Vienamo if (margining->lanes == USB4_MARGINING_LANE_RX2) {
1203916f26f1SAapo Vienamo int ret;
1204916f26f1SAapo Vienamo
1205916f26f1SAapo Vienamo ret = tb_port_get_link_width(margining->port);
1206916f26f1SAapo Vienamo if (ret < 0)
1207916f26f1SAapo Vienamo return ret;
1208916f26f1SAapo Vienamo if (ret != TB_LINK_WIDTH_ASYM_RX) {
1209916f26f1SAapo Vienamo tb_port_warn(margining->port, "link is %s expected %s",
1210916f26f1SAapo Vienamo tb_width_name(ret),
1211916f26f1SAapo Vienamo tb_width_name(TB_LINK_WIDTH_ASYM_RX));
1212916f26f1SAapo Vienamo return -EINVAL;
1213916f26f1SAapo Vienamo }
1214916f26f1SAapo Vienamo }
1215916f26f1SAapo Vienamo
1216916f26f1SAapo Vienamo return 0;
1217916f26f1SAapo Vienamo }
1218916f26f1SAapo Vienamo
margining_run_write(void * data,u64 val)1219d0f1e0c2SMika Westerberg static int margining_run_write(void *data, u64 val)
1220d0f1e0c2SMika Westerberg {
1221ec6f888eSMika Westerberg struct tb_margining *margining = data;
1222ec6f888eSMika Westerberg struct tb_port *port = margining->port;
1223ff6ab055SMika Westerberg struct device *dev = margining->dev;
1224d0f1e0c2SMika Westerberg struct tb_switch *sw = port->sw;
12254a420eb1SMika Westerberg struct tb_switch *down_sw;
1226d0f1e0c2SMika Westerberg struct tb *tb = sw->tb;
12274a420eb1SMika Westerberg int ret, clx;
1228d0f1e0c2SMika Westerberg
1229d0f1e0c2SMika Westerberg if (val != 1)
1230d0f1e0c2SMika Westerberg return -EINVAL;
1231d0f1e0c2SMika Westerberg
1232ff6ab055SMika Westerberg pm_runtime_get_sync(dev);
1233d0f1e0c2SMika Westerberg
1234d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
1235d0f1e0c2SMika Westerberg ret = -ERESTARTSYS;
1236d0f1e0c2SMika Westerberg goto out_rpm_put;
1237d0f1e0c2SMika Westerberg }
1238d0f1e0c2SMika Westerberg
1239916f26f1SAapo Vienamo ret = validate_margining(margining);
1240916f26f1SAapo Vienamo if (ret)
1241916f26f1SAapo Vienamo goto out_unlock;
1242916f26f1SAapo Vienamo
12434a420eb1SMika Westerberg if (tb_is_upstream_port(port))
12444a420eb1SMika Westerberg down_sw = sw;
12454a420eb1SMika Westerberg else if (port->remote)
12464a420eb1SMika Westerberg down_sw = port->remote->sw;
12474a420eb1SMika Westerberg else
12484a420eb1SMika Westerberg down_sw = NULL;
12494a420eb1SMika Westerberg
12504a420eb1SMika Westerberg if (down_sw) {
1251d0f1e0c2SMika Westerberg /*
12524a420eb1SMika Westerberg * CL states may interfere with lane margining so
12534a420eb1SMika Westerberg * disable them temporarily now.
1254d0f1e0c2SMika Westerberg */
12554a420eb1SMika Westerberg ret = tb_switch_clx_disable(down_sw);
12564a420eb1SMika Westerberg if (ret < 0) {
12574a420eb1SMika Westerberg tb_sw_warn(down_sw, "failed to disable CL states\n");
1258d0f1e0c2SMika Westerberg goto out_unlock;
1259d0f1e0c2SMika Westerberg }
12604a420eb1SMika Westerberg clx = ret;
12614a420eb1SMika Westerberg }
1262d0f1e0c2SMika Westerberg
126310904df3SR Kannappan /* Clear the results */
126410904df3SR Kannappan memset(margining->results, 0, sizeof(margining->results));
126510904df3SR Kannappan
1266d0f1e0c2SMika Westerberg if (margining->software) {
126781f848d2SRene Sapiens struct usb4_port_margining_params params = {
126881f848d2SRene Sapiens .error_counter = USB4_MARGIN_SW_ERROR_COUNTER_CLEAR,
126981f848d2SRene Sapiens .lanes = margining->lanes,
127081f848d2SRene Sapiens .time = margining->time,
127110904df3SR Kannappan .voltage_time_offset = margining->voltage_time_offset,
127281f848d2SRene Sapiens .right_high = margining->right_high,
1273c8c08fd9SAapo Vienamo .upper_eye = margining->upper_eye,
12749fafd46bSRene Sapiens .optional_voltage_offset_range = margining->optional_voltage_offset_range,
127581f848d2SRene Sapiens };
127681f848d2SRene Sapiens
1277ff6ab055SMika Westerberg tb_port_dbg(port,
1278ff6ab055SMika Westerberg "running software %s lane margining for %s lanes %u\n",
1279ff6ab055SMika Westerberg margining->time ? "time" : "voltage", dev_name(dev),
1280ff6ab055SMika Westerberg margining->lanes);
128181f848d2SRene Sapiens
128210904df3SR Kannappan ret = margining_run_sw(margining, ¶ms);
1283d0f1e0c2SMika Westerberg } else {
128481f848d2SRene Sapiens struct usb4_port_margining_params params = {
128581f848d2SRene Sapiens .ber_level = margining->ber_level,
128681f848d2SRene Sapiens .lanes = margining->lanes,
128781f848d2SRene Sapiens .time = margining->time,
128881f848d2SRene Sapiens .right_high = margining->right_high,
1289c8c08fd9SAapo Vienamo .upper_eye = margining->upper_eye,
12909fafd46bSRene Sapiens .optional_voltage_offset_range = margining->optional_voltage_offset_range,
129181f848d2SRene Sapiens };
129281f848d2SRene Sapiens
1293ff6ab055SMika Westerberg tb_port_dbg(port,
1294ff6ab055SMika Westerberg "running hardware %s lane margining for %s lanes %u\n",
1295ff6ab055SMika Westerberg margining->time ? "time" : "voltage", dev_name(dev),
1296ff6ab055SMika Westerberg margining->lanes);
129781f848d2SRene Sapiens
129881f848d2SRene Sapiens ret = usb4_port_hw_margin(port, margining->target, margining->index, ¶ms,
1299750365efSAapo Vienamo margining->results, ARRAY_SIZE(margining->results));
1300d0f1e0c2SMika Westerberg }
1301d0f1e0c2SMika Westerberg
13024a420eb1SMika Westerberg if (down_sw)
13034a420eb1SMika Westerberg tb_switch_clx_enable(down_sw, clx);
1304d0f1e0c2SMika Westerberg out_unlock:
1305d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1306d0f1e0c2SMika Westerberg out_rpm_put:
1307ff6ab055SMika Westerberg pm_runtime_mark_last_busy(dev);
1308ff6ab055SMika Westerberg pm_runtime_put_autosuspend(dev);
1309d0f1e0c2SMika Westerberg
1310d0f1e0c2SMika Westerberg return ret;
1311d0f1e0c2SMika Westerberg }
1312d0f1e0c2SMika Westerberg DEFINE_DEBUGFS_ATTRIBUTE(margining_run_fops, NULL, margining_run_write,
1313d0f1e0c2SMika Westerberg "%llu\n");
1314d0f1e0c2SMika Westerberg
margining_results_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1315d0f1e0c2SMika Westerberg static ssize_t margining_results_write(struct file *file,
1316d0f1e0c2SMika Westerberg const char __user *user_buf,
1317d0f1e0c2SMika Westerberg size_t count, loff_t *ppos)
1318d0f1e0c2SMika Westerberg {
1319d0f1e0c2SMika Westerberg struct seq_file *s = file->private_data;
1320ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1321ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1322d0f1e0c2SMika Westerberg
1323d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock))
1324d0f1e0c2SMika Westerberg return -ERESTARTSYS;
1325d0f1e0c2SMika Westerberg
1326d0f1e0c2SMika Westerberg /* Just clear the results */
1327750365efSAapo Vienamo memset(margining->results, 0, sizeof(margining->results));
1328d0f1e0c2SMika Westerberg
132910904df3SR Kannappan if (margining->software) {
133010904df3SR Kannappan /* Clear the error counters */
133110904df3SR Kannappan margining_modify_error_counter(margining,
13323bf090e9SAapo Vienamo USB4_MARGINING_LANE_ALL,
133310904df3SR Kannappan USB4_MARGIN_SW_ERROR_COUNTER_CLEAR);
133410904df3SR Kannappan }
133510904df3SR Kannappan
1336d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1337d0f1e0c2SMika Westerberg return count;
1338d0f1e0c2SMika Westerberg }
1339d0f1e0c2SMika Westerberg
voltage_margin_show(struct seq_file * s,const struct tb_margining * margining,u8 val)1340d0f1e0c2SMika Westerberg static void voltage_margin_show(struct seq_file *s,
1341d0f1e0c2SMika Westerberg const struct tb_margining *margining, u8 val)
1342d0f1e0c2SMika Westerberg {
1343d0f1e0c2SMika Westerberg unsigned int tmp, voltage;
1344d0f1e0c2SMika Westerberg
13453499c0a9SAapo Vienamo tmp = FIELD_GET(USB4_MARGIN_HW_RES_MARGIN_MASK, val);
1346d0f1e0c2SMika Westerberg voltage = tmp * margining->max_voltage_offset / margining->voltage_steps;
1347d0f1e0c2SMika Westerberg seq_printf(s, "%u mV (%u)", voltage, tmp);
13483499c0a9SAapo Vienamo if (val & USB4_MARGIN_HW_RES_EXCEEDS)
1349d0f1e0c2SMika Westerberg seq_puts(s, " exceeds maximum");
1350d0f1e0c2SMika Westerberg seq_puts(s, "\n");
13519fafd46bSRene Sapiens if (margining->optional_voltage_offset_range)
13529fafd46bSRene Sapiens seq_puts(s, " optional voltage offset range enabled\n");
1353d0f1e0c2SMika Westerberg }
1354d0f1e0c2SMika Westerberg
time_margin_show(struct seq_file * s,const struct tb_margining * margining,u8 val)1355d0f1e0c2SMika Westerberg static void time_margin_show(struct seq_file *s,
1356d0f1e0c2SMika Westerberg const struct tb_margining *margining, u8 val)
1357d0f1e0c2SMika Westerberg {
1358d0f1e0c2SMika Westerberg unsigned int tmp, interval;
1359d0f1e0c2SMika Westerberg
13603499c0a9SAapo Vienamo tmp = FIELD_GET(USB4_MARGIN_HW_RES_MARGIN_MASK, val);
1361d0f1e0c2SMika Westerberg interval = tmp * margining->max_time_offset / margining->time_steps;
1362d0f1e0c2SMika Westerberg seq_printf(s, "%u mUI (%u)", interval, tmp);
13633499c0a9SAapo Vienamo if (val & USB4_MARGIN_HW_RES_EXCEEDS)
1364d0f1e0c2SMika Westerberg seq_puts(s, " exceeds maximum");
1365d0f1e0c2SMika Westerberg seq_puts(s, "\n");
1366d0f1e0c2SMika Westerberg }
1367d0f1e0c2SMika Westerberg
margining_hw_result_val(const u32 * results,enum usb4_margining_lane lane,bool right_high)13683499c0a9SAapo Vienamo static u8 margining_hw_result_val(const u32 *results,
13693499c0a9SAapo Vienamo enum usb4_margining_lane lane,
13703499c0a9SAapo Vienamo bool right_high)
13713499c0a9SAapo Vienamo {
13723499c0a9SAapo Vienamo u32 val;
13733499c0a9SAapo Vienamo
13743499c0a9SAapo Vienamo if (lane == USB4_MARGINING_LANE_RX0)
13753499c0a9SAapo Vienamo val = results[1];
13763499c0a9SAapo Vienamo else if (lane == USB4_MARGINING_LANE_RX1)
13773499c0a9SAapo Vienamo val = results[1] >> USB4_MARGIN_HW_RES_LANE_SHIFT;
1378916f26f1SAapo Vienamo else if (lane == USB4_MARGINING_LANE_RX2)
1379916f26f1SAapo Vienamo val = results[2];
13803499c0a9SAapo Vienamo else
13813499c0a9SAapo Vienamo val = 0;
13823499c0a9SAapo Vienamo
13833499c0a9SAapo Vienamo return right_high ? val : val >> USB4_MARGIN_HW_RES_LL_SHIFT;
13843499c0a9SAapo Vienamo }
13853499c0a9SAapo Vienamo
margining_hw_result_format(struct seq_file * s,const struct tb_margining * margining,enum usb4_margining_lane lane)13863499c0a9SAapo Vienamo static void margining_hw_result_format(struct seq_file *s,
13873499c0a9SAapo Vienamo const struct tb_margining *margining,
13883499c0a9SAapo Vienamo enum usb4_margining_lane lane)
13893499c0a9SAapo Vienamo {
13903499c0a9SAapo Vienamo u8 val;
13913499c0a9SAapo Vienamo
13923499c0a9SAapo Vienamo if (margining->time) {
13933499c0a9SAapo Vienamo val = margining_hw_result_val(margining->results, lane, true);
13943499c0a9SAapo Vienamo seq_printf(s, "# lane %u right time margin: ", lane);
13953499c0a9SAapo Vienamo time_margin_show(s, margining, val);
13963499c0a9SAapo Vienamo val = margining_hw_result_val(margining->results, lane, false);
13973499c0a9SAapo Vienamo seq_printf(s, "# lane %u left time margin: ", lane);
13983499c0a9SAapo Vienamo time_margin_show(s, margining, val);
13993499c0a9SAapo Vienamo } else {
14003499c0a9SAapo Vienamo val = margining_hw_result_val(margining->results, lane, true);
14013499c0a9SAapo Vienamo seq_printf(s, "# lane %u high voltage margin: ", lane);
14023499c0a9SAapo Vienamo voltage_margin_show(s, margining, val);
14033499c0a9SAapo Vienamo val = margining_hw_result_val(margining->results, lane, false);
14043499c0a9SAapo Vienamo seq_printf(s, "# lane %u low voltage margin: ", lane);
14053499c0a9SAapo Vienamo voltage_margin_show(s, margining, val);
14063499c0a9SAapo Vienamo }
14073499c0a9SAapo Vienamo }
14083499c0a9SAapo Vienamo
margining_results_show(struct seq_file * s,void * not_used)1409d0f1e0c2SMika Westerberg static int margining_results_show(struct seq_file *s, void *not_used)
1410d0f1e0c2SMika Westerberg {
1411ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1412ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1413d0f1e0c2SMika Westerberg
1414d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock))
1415d0f1e0c2SMika Westerberg return -ERESTARTSYS;
1416d0f1e0c2SMika Westerberg
1417d0f1e0c2SMika Westerberg /* Dump the raw results first */
1418d0f1e0c2SMika Westerberg seq_printf(s, "0x%08x\n", margining->results[0]);
1419d0f1e0c2SMika Westerberg /* Only the hardware margining has two result dwords */
1420d0f1e0c2SMika Westerberg if (!margining->software) {
1421750365efSAapo Vienamo for (int i = 1; i < ARRAY_SIZE(margining->results); i++)
1422750365efSAapo Vienamo seq_printf(s, "0x%08x\n", margining->results[i]);
1423d0f1e0c2SMika Westerberg
14243499c0a9SAapo Vienamo if (margining->lanes == USB4_MARGINING_LANE_ALL) {
14253499c0a9SAapo Vienamo margining_hw_result_format(s, margining,
14263499c0a9SAapo Vienamo USB4_MARGINING_LANE_RX0);
14273499c0a9SAapo Vienamo margining_hw_result_format(s, margining,
14283499c0a9SAapo Vienamo USB4_MARGINING_LANE_RX1);
1429916f26f1SAapo Vienamo if (margining->asym_rx)
1430916f26f1SAapo Vienamo margining_hw_result_format(s, margining,
1431916f26f1SAapo Vienamo USB4_MARGINING_LANE_RX2);
1432d0f1e0c2SMika Westerberg } else {
14333499c0a9SAapo Vienamo margining_hw_result_format(s, margining,
14343499c0a9SAapo Vienamo margining->lanes);
1435d0f1e0c2SMika Westerberg }
143610904df3SR Kannappan } else {
143710904df3SR Kannappan u32 lane_errors, result;
143810904df3SR Kannappan
143910904df3SR Kannappan seq_printf(s, "0x%08x\n", margining->results[1]);
144010904df3SR Kannappan
14413bf090e9SAapo Vienamo result = FIELD_GET(USB4_MARGIN_SW_LANES_MASK, margining->results[0]);
14423bf090e9SAapo Vienamo if (result == USB4_MARGINING_LANE_RX0 ||
14433bf090e9SAapo Vienamo result == USB4_MARGINING_LANE_ALL) {
144410904df3SR Kannappan lane_errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_0_MASK,
144510904df3SR Kannappan margining->results[1]);
144610904df3SR Kannappan seq_printf(s, "# lane 0 errors: %u\n", lane_errors);
144710904df3SR Kannappan }
14483bf090e9SAapo Vienamo if (result == USB4_MARGINING_LANE_RX1 ||
14493bf090e9SAapo Vienamo result == USB4_MARGINING_LANE_ALL) {
145010904df3SR Kannappan lane_errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_1_MASK,
145110904df3SR Kannappan margining->results[1]);
145210904df3SR Kannappan seq_printf(s, "# lane 1 errors: %u\n", lane_errors);
145310904df3SR Kannappan }
1454916f26f1SAapo Vienamo if (margining->asym_rx &&
1455916f26f1SAapo Vienamo (result == USB4_MARGINING_LANE_RX2 ||
1456916f26f1SAapo Vienamo result == USB4_MARGINING_LANE_ALL)) {
1457916f26f1SAapo Vienamo lane_errors = FIELD_GET(USB4_MARGIN_SW_ERR_COUNTER_LANE_2_MASK,
1458916f26f1SAapo Vienamo margining->results[1]);
1459916f26f1SAapo Vienamo seq_printf(s, "# lane 2 errors: %u\n", lane_errors);
1460916f26f1SAapo Vienamo }
1461d0f1e0c2SMika Westerberg }
1462d0f1e0c2SMika Westerberg
1463d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1464d0f1e0c2SMika Westerberg return 0;
1465d0f1e0c2SMika Westerberg }
1466d0f1e0c2SMika Westerberg DEBUGFS_ATTR_RW(margining_results);
1467d0f1e0c2SMika Westerberg
margining_test_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1468d0f1e0c2SMika Westerberg static ssize_t margining_test_write(struct file *file,
1469d0f1e0c2SMika Westerberg const char __user *user_buf,
1470d0f1e0c2SMika Westerberg size_t count, loff_t *ppos)
1471d0f1e0c2SMika Westerberg {
1472d0f1e0c2SMika Westerberg struct seq_file *s = file->private_data;
1473ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1474ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1475d0f1e0c2SMika Westerberg int ret = 0;
1476d0f1e0c2SMika Westerberg char *buf;
1477d0f1e0c2SMika Westerberg
1478d0f1e0c2SMika Westerberg buf = validate_and_copy_from_user(user_buf, &count);
1479d0f1e0c2SMika Westerberg if (IS_ERR(buf))
1480d0f1e0c2SMika Westerberg return PTR_ERR(buf);
1481d0f1e0c2SMika Westerberg
1482d0f1e0c2SMika Westerberg buf[count - 1] = '\0';
1483d0f1e0c2SMika Westerberg
1484d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
1485d0f1e0c2SMika Westerberg ret = -ERESTARTSYS;
1486d0f1e0c2SMika Westerberg goto out_free;
1487d0f1e0c2SMika Westerberg }
1488d0f1e0c2SMika Westerberg
1489ec6f888eSMika Westerberg if (!strcmp(buf, "time") && supports_time(margining))
1490ec6f888eSMika Westerberg margining->time = true;
1491d0f1e0c2SMika Westerberg else if (!strcmp(buf, "voltage"))
1492ec6f888eSMika Westerberg margining->time = false;
1493d0f1e0c2SMika Westerberg else
1494d0f1e0c2SMika Westerberg ret = -EINVAL;
1495d0f1e0c2SMika Westerberg
1496d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1497d0f1e0c2SMika Westerberg
1498d0f1e0c2SMika Westerberg out_free:
1499d0f1e0c2SMika Westerberg free_page((unsigned long)buf);
1500d0f1e0c2SMika Westerberg return ret ? ret : count;
1501d0f1e0c2SMika Westerberg }
1502d0f1e0c2SMika Westerberg
margining_test_show(struct seq_file * s,void * not_used)1503d0f1e0c2SMika Westerberg static int margining_test_show(struct seq_file *s, void *not_used)
1504d0f1e0c2SMika Westerberg {
1505ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1506ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1507d0f1e0c2SMika Westerberg
1508d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock))
1509d0f1e0c2SMika Westerberg return -ERESTARTSYS;
1510d0f1e0c2SMika Westerberg
1511ec6f888eSMika Westerberg if (supports_time(margining)) {
1512ec6f888eSMika Westerberg if (margining->time)
1513d0f1e0c2SMika Westerberg seq_puts(s, "voltage [time]\n");
1514d0f1e0c2SMika Westerberg else
1515d0f1e0c2SMika Westerberg seq_puts(s, "[voltage] time\n");
1516d0f1e0c2SMika Westerberg } else {
1517d0f1e0c2SMika Westerberg seq_puts(s, "[voltage]\n");
1518d0f1e0c2SMika Westerberg }
1519d0f1e0c2SMika Westerberg
1520d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1521d0f1e0c2SMika Westerberg return 0;
1522d0f1e0c2SMika Westerberg }
1523d0f1e0c2SMika Westerberg DEBUGFS_ATTR_RW(margining_test);
1524d0f1e0c2SMika Westerberg
margining_margin_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1525d0f1e0c2SMika Westerberg static ssize_t margining_margin_write(struct file *file,
1526d0f1e0c2SMika Westerberg const char __user *user_buf,
1527d0f1e0c2SMika Westerberg size_t count, loff_t *ppos)
1528d0f1e0c2SMika Westerberg {
1529d0f1e0c2SMika Westerberg struct seq_file *s = file->private_data;
1530ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1531ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1532d0f1e0c2SMika Westerberg int ret = 0;
1533d0f1e0c2SMika Westerberg char *buf;
1534d0f1e0c2SMika Westerberg
1535d0f1e0c2SMika Westerberg buf = validate_and_copy_from_user(user_buf, &count);
1536d0f1e0c2SMika Westerberg if (IS_ERR(buf))
1537d0f1e0c2SMika Westerberg return PTR_ERR(buf);
1538d0f1e0c2SMika Westerberg
1539d0f1e0c2SMika Westerberg buf[count - 1] = '\0';
1540d0f1e0c2SMika Westerberg
1541d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
1542d0f1e0c2SMika Westerberg ret = -ERESTARTSYS;
1543d0f1e0c2SMika Westerberg goto out_free;
1544d0f1e0c2SMika Westerberg }
1545d0f1e0c2SMika Westerberg
1546ec6f888eSMika Westerberg if (margining->time) {
1547d0f1e0c2SMika Westerberg if (!strcmp(buf, "left"))
1548ec6f888eSMika Westerberg margining->right_high = false;
1549d0f1e0c2SMika Westerberg else if (!strcmp(buf, "right"))
1550ec6f888eSMika Westerberg margining->right_high = true;
1551d0f1e0c2SMika Westerberg else
1552d0f1e0c2SMika Westerberg ret = -EINVAL;
1553d0f1e0c2SMika Westerberg } else {
1554d0f1e0c2SMika Westerberg if (!strcmp(buf, "low"))
1555ec6f888eSMika Westerberg margining->right_high = false;
1556d0f1e0c2SMika Westerberg else if (!strcmp(buf, "high"))
1557ec6f888eSMika Westerberg margining->right_high = true;
1558d0f1e0c2SMika Westerberg else
1559d0f1e0c2SMika Westerberg ret = -EINVAL;
1560d0f1e0c2SMika Westerberg }
1561d0f1e0c2SMika Westerberg
1562d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1563d0f1e0c2SMika Westerberg
1564d0f1e0c2SMika Westerberg out_free:
1565d0f1e0c2SMika Westerberg free_page((unsigned long)buf);
1566d0f1e0c2SMika Westerberg return ret ? ret : count;
1567d0f1e0c2SMika Westerberg }
1568d0f1e0c2SMika Westerberg
margining_margin_show(struct seq_file * s,void * not_used)1569d0f1e0c2SMika Westerberg static int margining_margin_show(struct seq_file *s, void *not_used)
1570d0f1e0c2SMika Westerberg {
1571ec6f888eSMika Westerberg struct tb_margining *margining = s->private;
1572ec6f888eSMika Westerberg struct tb *tb = margining->port->sw->tb;
1573d0f1e0c2SMika Westerberg
1574d0f1e0c2SMika Westerberg if (mutex_lock_interruptible(&tb->lock))
1575d0f1e0c2SMika Westerberg return -ERESTARTSYS;
1576d0f1e0c2SMika Westerberg
1577ec6f888eSMika Westerberg if (margining->time) {
1578ec6f888eSMika Westerberg if (margining->right_high)
1579d0f1e0c2SMika Westerberg seq_puts(s, "left [right]\n");
1580d0f1e0c2SMika Westerberg else
1581d0f1e0c2SMika Westerberg seq_puts(s, "[left] right\n");
1582d0f1e0c2SMika Westerberg } else {
1583ec6f888eSMika Westerberg if (margining->right_high)
1584d0f1e0c2SMika Westerberg seq_puts(s, "low [high]\n");
1585d0f1e0c2SMika Westerberg else
1586d0f1e0c2SMika Westerberg seq_puts(s, "[low] high\n");
1587d0f1e0c2SMika Westerberg }
1588d0f1e0c2SMika Westerberg
1589d0f1e0c2SMika Westerberg mutex_unlock(&tb->lock);
1590d0f1e0c2SMika Westerberg return 0;
1591d0f1e0c2SMika Westerberg }
1592d0f1e0c2SMika Westerberg DEBUGFS_ATTR_RW(margining_margin);
1593d0f1e0c2SMika Westerberg
margining_eye_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)1594c8c08fd9SAapo Vienamo static ssize_t margining_eye_write(struct file *file,
1595c8c08fd9SAapo Vienamo const char __user *user_buf,
1596c8c08fd9SAapo Vienamo size_t count, loff_t *ppos)
1597c8c08fd9SAapo Vienamo {
1598c8c08fd9SAapo Vienamo struct seq_file *s = file->private_data;
1599c8c08fd9SAapo Vienamo struct tb_port *port = s->private;
1600c8c08fd9SAapo Vienamo struct usb4_port *usb4 = port->usb4;
1601c8c08fd9SAapo Vienamo struct tb *tb = port->sw->tb;
1602c8c08fd9SAapo Vienamo int ret = 0;
1603c8c08fd9SAapo Vienamo char *buf;
1604c8c08fd9SAapo Vienamo
1605c8c08fd9SAapo Vienamo buf = validate_and_copy_from_user(user_buf, &count);
1606c8c08fd9SAapo Vienamo if (IS_ERR(buf))
1607c8c08fd9SAapo Vienamo return PTR_ERR(buf);
1608c8c08fd9SAapo Vienamo
1609c8c08fd9SAapo Vienamo buf[count - 1] = '\0';
1610c8c08fd9SAapo Vienamo
1611c8c08fd9SAapo Vienamo scoped_cond_guard(mutex_intr, ret = -ERESTARTSYS, &tb->lock) {
1612c8c08fd9SAapo Vienamo if (!strcmp(buf, "lower"))
1613c8c08fd9SAapo Vienamo usb4->margining->upper_eye = false;
1614c8c08fd9SAapo Vienamo else if (!strcmp(buf, "upper"))
1615c8c08fd9SAapo Vienamo usb4->margining->upper_eye = true;
1616c8c08fd9SAapo Vienamo else
1617c8c08fd9SAapo Vienamo ret = -EINVAL;
1618c8c08fd9SAapo Vienamo }
1619c8c08fd9SAapo Vienamo
1620c8c08fd9SAapo Vienamo free_page((unsigned long)buf);
1621c8c08fd9SAapo Vienamo return ret ? ret : count;
1622c8c08fd9SAapo Vienamo }
1623c8c08fd9SAapo Vienamo
margining_eye_show(struct seq_file * s,void * not_used)1624c8c08fd9SAapo Vienamo static int margining_eye_show(struct seq_file *s, void *not_used)
1625c8c08fd9SAapo Vienamo {
1626c8c08fd9SAapo Vienamo struct tb_port *port = s->private;
1627c8c08fd9SAapo Vienamo struct usb4_port *usb4 = port->usb4;
1628c8c08fd9SAapo Vienamo struct tb *tb = port->sw->tb;
1629c8c08fd9SAapo Vienamo
1630c8c08fd9SAapo Vienamo scoped_guard(mutex_intr, &tb->lock) {
1631c8c08fd9SAapo Vienamo if (usb4->margining->upper_eye)
1632c8c08fd9SAapo Vienamo seq_puts(s, "lower [upper]\n");
1633c8c08fd9SAapo Vienamo else
1634c8c08fd9SAapo Vienamo seq_puts(s, "[lower] upper\n");
1635c8c08fd9SAapo Vienamo
1636c8c08fd9SAapo Vienamo return 0;
1637c8c08fd9SAapo Vienamo }
1638c8c08fd9SAapo Vienamo
1639c8c08fd9SAapo Vienamo return -ERESTARTSYS;
1640c8c08fd9SAapo Vienamo }
1641c8c08fd9SAapo Vienamo DEBUGFS_ATTR_RW(margining_eye);
1642c8c08fd9SAapo Vienamo
margining_alloc(struct tb_port * port,struct device * dev,enum usb4_sb_target target,u8 index,struct dentry * parent)1643ff6ab055SMika Westerberg static struct tb_margining *margining_alloc(struct tb_port *port,
1644ff6ab055SMika Westerberg struct device *dev,
1645ff6ab055SMika Westerberg enum usb4_sb_target target,
1646ff6ab055SMika Westerberg u8 index, struct dentry *parent)
1647d0f1e0c2SMika Westerberg {
1648d0f1e0c2SMika Westerberg struct tb_margining *margining;
1649ff6ab055SMika Westerberg struct dentry *dir;
1650d0f1e0c2SMika Westerberg unsigned int val;
1651d0f1e0c2SMika Westerberg int ret;
1652d0f1e0c2SMika Westerberg
1653c9077d59SAapo Vienamo ret = tb_port_get_link_generation(port);
1654c9077d59SAapo Vienamo if (ret < 0) {
1655c9077d59SAapo Vienamo tb_port_warn(port, "failed to read link generation\n");
1656c9077d59SAapo Vienamo return NULL;
1657c9077d59SAapo Vienamo }
1658c9077d59SAapo Vienamo
1659d0f1e0c2SMika Westerberg margining = kzalloc(sizeof(*margining), GFP_KERNEL);
1660d0f1e0c2SMika Westerberg if (!margining)
1661ff6ab055SMika Westerberg return NULL;
1662d0f1e0c2SMika Westerberg
1663ec6f888eSMika Westerberg margining->port = port;
1664ff6ab055SMika Westerberg margining->target = target;
1665ff6ab055SMika Westerberg margining->index = index;
1666ff6ab055SMika Westerberg margining->dev = dev;
1667c9077d59SAapo Vienamo margining->gen = ret;
1668916f26f1SAapo Vienamo margining->asym_rx = tb_port_width_supported(port, TB_LINK_WIDTH_ASYM_RX);
1669ec6f888eSMika Westerberg
1670480ebc2eSAapo Vienamo ret = usb4_port_margining_caps(port, target, index, margining->caps,
1671480ebc2eSAapo Vienamo ARRAY_SIZE(margining->caps));
1672d0f1e0c2SMika Westerberg if (ret) {
1673d0f1e0c2SMika Westerberg kfree(margining);
1674ff6ab055SMika Westerberg return NULL;
1675d0f1e0c2SMika Westerberg }
1676d0f1e0c2SMika Westerberg
1677d0f1e0c2SMika Westerberg /* Set the initial mode */
1678ec6f888eSMika Westerberg if (supports_software(margining))
1679d0f1e0c2SMika Westerberg margining->software = true;
1680d0f1e0c2SMika Westerberg
1681c9077d59SAapo Vienamo if (margining->gen < 4) {
168249056c95SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_0_VOLTAGE_STEPS_MASK, margining->caps[0]);
1683d0f1e0c2SMika Westerberg margining->voltage_steps = val;
168449056c95SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_0_MAX_VOLTAGE_OFFSET_MASK, margining->caps[0]);
1685d0f1e0c2SMika Westerberg margining->max_voltage_offset = 74 + val * 2;
1686c9077d59SAapo Vienamo } else {
1687c9077d59SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_2_VOLTAGE_STEPS_MASK, margining->caps[2]);
1688c9077d59SAapo Vienamo margining->voltage_steps = val;
1689c9077d59SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_2_MAX_VOLTAGE_OFFSET_MASK, margining->caps[2]);
1690c9077d59SAapo Vienamo margining->max_voltage_offset = 74 + val * 2;
1691c9077d59SAapo Vienamo }
1692d0f1e0c2SMika Westerberg
16939fafd46bSRene Sapiens if (supports_optional_voltage_offset_range(margining)) {
16949fafd46bSRene Sapiens val = FIELD_GET(USB4_MARGIN_CAP_0_VOLT_STEPS_OPT_MASK,
16959fafd46bSRene Sapiens margining->caps[0]);
16969fafd46bSRene Sapiens margining->voltage_steps_optional_range = val;
16979fafd46bSRene Sapiens val = FIELD_GET(USB4_MARGIN_CAP_1_MAX_VOLT_OFS_OPT_MASK,
16989fafd46bSRene Sapiens margining->caps[1]);
16999fafd46bSRene Sapiens margining->max_voltage_offset_optional_range = 74 + val * 2;
17009fafd46bSRene Sapiens }
17019fafd46bSRene Sapiens
1702ec6f888eSMika Westerberg if (supports_time(margining)) {
170349056c95SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_1_TIME_STEPS_MASK, margining->caps[1]);
1704d0f1e0c2SMika Westerberg margining->time_steps = val;
170549056c95SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_1_TIME_OFFSET_MASK, margining->caps[1]);
1706d0f1e0c2SMika Westerberg /*
1707d0f1e0c2SMika Westerberg * Store it as mUI (milli Unit Interval) because we want
1708d0f1e0c2SMika Westerberg * to keep it as integer.
1709d0f1e0c2SMika Westerberg */
1710d0f1e0c2SMika Westerberg margining->max_time_offset = 200 + 10 * val;
1711d0f1e0c2SMika Westerberg }
1712d0f1e0c2SMika Westerberg
1713d0f1e0c2SMika Westerberg dir = debugfs_create_dir("margining", parent);
1714ec6f888eSMika Westerberg if (supports_hardware(margining)) {
171549056c95SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_1_MIN_BER_MASK, margining->caps[1]);
1716d0f1e0c2SMika Westerberg margining->min_ber_level = val;
171749056c95SAapo Vienamo val = FIELD_GET(USB4_MARGIN_CAP_1_MAX_BER_MASK, margining->caps[1]);
1718d0f1e0c2SMika Westerberg margining->max_ber_level = val;
1719d0f1e0c2SMika Westerberg
1720d0f1e0c2SMika Westerberg /* Set the default to minimum */
1721d0f1e0c2SMika Westerberg margining->ber_level = margining->min_ber_level;
1722d0f1e0c2SMika Westerberg
1723ec6f888eSMika Westerberg debugfs_create_file("ber_level_contour", 0400, dir, margining,
1724d0f1e0c2SMika Westerberg &margining_ber_level_fops);
1725d0f1e0c2SMika Westerberg }
1726ec6f888eSMika Westerberg debugfs_create_file("caps", 0400, dir, margining, &margining_caps_fops);
1727ec6f888eSMika Westerberg debugfs_create_file("lanes", 0600, dir, margining, &margining_lanes_fops);
1728ec6f888eSMika Westerberg debugfs_create_file("mode", 0600, dir, margining, &margining_mode_fops);
1729ec6f888eSMika Westerberg debugfs_create_file("run", 0600, dir, margining, &margining_run_fops);
1730ec6f888eSMika Westerberg debugfs_create_file("results", 0600, dir, margining,
1731ec6f888eSMika Westerberg &margining_results_fops);
1732ec6f888eSMika Westerberg debugfs_create_file("test", 0600, dir, margining, &margining_test_fops);
1733c9077d59SAapo Vienamo if (independent_voltage_margins(margining) == USB4_MARGIN_CAP_VOLTAGE_INDP_GEN_2_3_HL ||
1734ec6f888eSMika Westerberg (supports_time(margining) &&
1735c9077d59SAapo Vienamo independent_time_margins(margining) == USB4_MARGIN_CAP_TIME_INDP_GEN_2_3_LR))
1736c9077d59SAapo Vienamo debugfs_create_file("margin", 0600, dir, margining, &margining_margin_fops);
17379fafd46bSRene Sapiens
173810904df3SR Kannappan margining->error_counter = USB4_MARGIN_SW_ERROR_COUNTER_CLEAR;
173910904df3SR Kannappan margining->dwell_time = MIN_DWELL_TIME;
174010904df3SR Kannappan
17419fafd46bSRene Sapiens if (supports_optional_voltage_offset_range(margining))
17429fafd46bSRene Sapiens debugfs_create_file("optional_voltage_offset", DEBUGFS_MODE, dir, margining,
17439fafd46bSRene Sapiens &margining_optional_voltage_offset_fops);
174410904df3SR Kannappan
174510904df3SR Kannappan if (supports_software(margining)) {
174610904df3SR Kannappan debugfs_create_file("voltage_time_offset", DEBUGFS_MODE, dir, margining,
174710904df3SR Kannappan &margining_voltage_time_offset_fops);
174810904df3SR Kannappan debugfs_create_file("error_counter", DEBUGFS_MODE, dir, margining,
174910904df3SR Kannappan &margining_error_counter_fops);
175010904df3SR Kannappan debugfs_create_file("dwell_time", DEBUGFS_MODE, dir, margining,
175110904df3SR Kannappan &margining_dwell_time_fops);
175210904df3SR Kannappan }
1753c8c08fd9SAapo Vienamo
1754c8c08fd9SAapo Vienamo if (margining->gen >= 4)
1755c8c08fd9SAapo Vienamo debugfs_create_file("eye", 0600, dir, port, &margining_eye_fops);
1756c8c08fd9SAapo Vienamo
1757ff6ab055SMika Westerberg return margining;
1758ff6ab055SMika Westerberg }
1759ec6f888eSMika Westerberg
margining_port_init(struct tb_port * port)1760ff6ab055SMika Westerberg static void margining_port_init(struct tb_port *port)
1761ff6ab055SMika Westerberg {
1762ff6ab055SMika Westerberg struct dentry *parent;
1763ff6ab055SMika Westerberg char dir_name[10];
1764ff6ab055SMika Westerberg
1765ff6ab055SMika Westerberg if (!port->usb4)
1766ff6ab055SMika Westerberg return;
1767ff6ab055SMika Westerberg
1768ff6ab055SMika Westerberg snprintf(dir_name, sizeof(dir_name), "port%d", port->port);
1769ff6ab055SMika Westerberg parent = debugfs_lookup(dir_name, port->sw->debugfs_dir);
1770ff6ab055SMika Westerberg port->usb4->margining = margining_alloc(port, &port->usb4->dev,
1771ff6ab055SMika Westerberg USB4_SB_TARGET_ROUTER, 0,
1772ff6ab055SMika Westerberg parent);
1773d0f1e0c2SMika Westerberg }
1774d0f1e0c2SMika Westerberg
margining_port_remove(struct tb_port * port)1775d0f1e0c2SMika Westerberg static void margining_port_remove(struct tb_port *port)
1776d0f1e0c2SMika Westerberg {
1777d0f1e0c2SMika Westerberg struct dentry *parent;
1778d0f1e0c2SMika Westerberg char dir_name[10];
1779d0f1e0c2SMika Westerberg
1780d0f1e0c2SMika Westerberg if (!port->usb4)
1781d0f1e0c2SMika Westerberg return;
1782d0f1e0c2SMika Westerberg
1783d0f1e0c2SMika Westerberg snprintf(dir_name, sizeof(dir_name), "port%d", port->port);
1784d0f1e0c2SMika Westerberg parent = debugfs_lookup(dir_name, port->sw->debugfs_dir);
1785acec7264SMika Westerberg if (parent)
1786ac43c912SYaxiong Tian debugfs_lookup_and_remove("margining", parent);
1787d0f1e0c2SMika Westerberg
1788d0f1e0c2SMika Westerberg kfree(port->usb4->margining);
1789d0f1e0c2SMika Westerberg port->usb4->margining = NULL;
1790d0f1e0c2SMika Westerberg }
1791d0f1e0c2SMika Westerberg
margining_switch_init(struct tb_switch * sw)1792d0f1e0c2SMika Westerberg static void margining_switch_init(struct tb_switch *sw)
1793d0f1e0c2SMika Westerberg {
1794d0f1e0c2SMika Westerberg struct tb_port *upstream, *downstream;
1795d0f1e0c2SMika Westerberg struct tb_switch *parent_sw;
1796d0f1e0c2SMika Westerberg u64 route = tb_route(sw);
1797d0f1e0c2SMika Westerberg
1798d0f1e0c2SMika Westerberg if (!route)
1799d0f1e0c2SMika Westerberg return;
1800d0f1e0c2SMika Westerberg
1801d0f1e0c2SMika Westerberg upstream = tb_upstream_port(sw);
1802d0f1e0c2SMika Westerberg parent_sw = tb_switch_parent(sw);
1803d0f1e0c2SMika Westerberg downstream = tb_port_at(route, parent_sw);
1804d0f1e0c2SMika Westerberg
1805d0f1e0c2SMika Westerberg margining_port_init(downstream);
1806d0f1e0c2SMika Westerberg margining_port_init(upstream);
1807d0f1e0c2SMika Westerberg }
1808d0f1e0c2SMika Westerberg
margining_switch_remove(struct tb_switch * sw)1809d0f1e0c2SMika Westerberg static void margining_switch_remove(struct tb_switch *sw)
1810d0f1e0c2SMika Westerberg {
1811acec7264SMika Westerberg struct tb_port *upstream, *downstream;
1812d0f1e0c2SMika Westerberg struct tb_switch *parent_sw;
1813d0f1e0c2SMika Westerberg u64 route = tb_route(sw);
1814d0f1e0c2SMika Westerberg
1815d0f1e0c2SMika Westerberg if (!route)
1816d0f1e0c2SMika Westerberg return;
1817d0f1e0c2SMika Westerberg
1818acec7264SMika Westerberg upstream = tb_upstream_port(sw);
1819d0f1e0c2SMika Westerberg parent_sw = tb_switch_parent(sw);
1820d0f1e0c2SMika Westerberg downstream = tb_port_at(route, parent_sw);
1821acec7264SMika Westerberg
1822acec7264SMika Westerberg margining_port_remove(upstream);
1823d0f1e0c2SMika Westerberg margining_port_remove(downstream);
1824d0f1e0c2SMika Westerberg }
1825d0f1e0c2SMika Westerberg
margining_xdomain_init(struct tb_xdomain * xd)1826d0f1e0c2SMika Westerberg static void margining_xdomain_init(struct tb_xdomain *xd)
1827d0f1e0c2SMika Westerberg {
1828d0f1e0c2SMika Westerberg struct tb_switch *parent_sw;
1829d0f1e0c2SMika Westerberg struct tb_port *downstream;
1830d0f1e0c2SMika Westerberg
1831d0f1e0c2SMika Westerberg parent_sw = tb_xdomain_parent(xd);
1832d0f1e0c2SMika Westerberg downstream = tb_port_at(xd->route, parent_sw);
1833d0f1e0c2SMika Westerberg
1834d0f1e0c2SMika Westerberg margining_port_init(downstream);
1835d0f1e0c2SMika Westerberg }
1836d0f1e0c2SMika Westerberg
margining_xdomain_remove(struct tb_xdomain * xd)1837d0f1e0c2SMika Westerberg static void margining_xdomain_remove(struct tb_xdomain *xd)
1838d0f1e0c2SMika Westerberg {
1839d0f1e0c2SMika Westerberg struct tb_switch *parent_sw;
1840d0f1e0c2SMika Westerberg struct tb_port *downstream;
1841d0f1e0c2SMika Westerberg
1842d0f1e0c2SMika Westerberg parent_sw = tb_xdomain_parent(xd);
1843d0f1e0c2SMika Westerberg downstream = tb_port_at(xd->route, parent_sw);
1844d0f1e0c2SMika Westerberg margining_port_remove(downstream);
1845d0f1e0c2SMika Westerberg }
1846ff6ab055SMika Westerberg
margining_retimer_init(struct tb_retimer * rt,struct dentry * debugfs_dir)1847ff6ab055SMika Westerberg static void margining_retimer_init(struct tb_retimer *rt, struct dentry *debugfs_dir)
1848ff6ab055SMika Westerberg {
1849ff6ab055SMika Westerberg rt->margining = margining_alloc(rt->port, &rt->dev,
1850ff6ab055SMika Westerberg USB4_SB_TARGET_RETIMER, rt->index,
1851ff6ab055SMika Westerberg debugfs_dir);
1852ff6ab055SMika Westerberg }
1853ff6ab055SMika Westerberg
margining_retimer_remove(struct tb_retimer * rt)1854ff6ab055SMika Westerberg static void margining_retimer_remove(struct tb_retimer *rt)
1855ff6ab055SMika Westerberg {
1856ff6ab055SMika Westerberg kfree(rt->margining);
1857ff6ab055SMika Westerberg rt->margining = NULL;
1858ff6ab055SMika Westerberg }
1859d0f1e0c2SMika Westerberg #else
margining_switch_init(struct tb_switch * sw)1860d0f1e0c2SMika Westerberg static inline void margining_switch_init(struct tb_switch *sw) { }
margining_switch_remove(struct tb_switch * sw)1861d0f1e0c2SMika Westerberg static inline void margining_switch_remove(struct tb_switch *sw) { }
margining_xdomain_init(struct tb_xdomain * xd)1862d0f1e0c2SMika Westerberg static inline void margining_xdomain_init(struct tb_xdomain *xd) { }
margining_xdomain_remove(struct tb_xdomain * xd)1863d0f1e0c2SMika Westerberg static inline void margining_xdomain_remove(struct tb_xdomain *xd) { }
margining_retimer_init(struct tb_retimer * rt,struct dentry * debugfs_dir)1864ff6ab055SMika Westerberg static inline void margining_retimer_init(struct tb_retimer *rt,
1865ff6ab055SMika Westerberg struct dentry *debugfs_dir) { }
margining_retimer_remove(struct tb_retimer * rt)1866ff6ab055SMika Westerberg static inline void margining_retimer_remove(struct tb_retimer *rt) { }
1867d0f1e0c2SMika Westerberg #endif
1868d0f1e0c2SMika Westerberg
port_clear_all_counters(struct tb_port * port)186954e41810SGil Fine static int port_clear_all_counters(struct tb_port *port)
187054e41810SGil Fine {
187154e41810SGil Fine u32 *buf;
187254e41810SGil Fine int ret;
187354e41810SGil Fine
187454e41810SGil Fine buf = kcalloc(COUNTER_SET_LEN * port->config.max_counters, sizeof(u32),
187554e41810SGil Fine GFP_KERNEL);
187654e41810SGil Fine if (!buf)
187754e41810SGil Fine return -ENOMEM;
187854e41810SGil Fine
187954e41810SGil Fine ret = tb_port_write(port, buf, TB_CFG_COUNTERS, 0,
188054e41810SGil Fine COUNTER_SET_LEN * port->config.max_counters);
188154e41810SGil Fine kfree(buf);
188254e41810SGil Fine
188354e41810SGil Fine return ret;
188454e41810SGil Fine }
188554e41810SGil Fine
counters_write(struct file * file,const char __user * user_buf,size_t count,loff_t * ppos)188654e41810SGil Fine static ssize_t counters_write(struct file *file, const char __user *user_buf,
188754e41810SGil Fine size_t count, loff_t *ppos)
188854e41810SGil Fine {
188954e41810SGil Fine struct seq_file *s = file->private_data;
189054e41810SGil Fine struct tb_port *port = s->private;
189154e41810SGil Fine struct tb_switch *sw = port->sw;
189254e41810SGil Fine struct tb *tb = port->sw->tb;
189354e41810SGil Fine char *buf;
189454e41810SGil Fine int ret;
189554e41810SGil Fine
189654e41810SGil Fine buf = validate_and_copy_from_user(user_buf, &count);
189754e41810SGil Fine if (IS_ERR(buf))
189854e41810SGil Fine return PTR_ERR(buf);
189954e41810SGil Fine
190054e41810SGil Fine pm_runtime_get_sync(&sw->dev);
190154e41810SGil Fine
190254e41810SGil Fine if (mutex_lock_interruptible(&tb->lock)) {
190354e41810SGil Fine ret = -ERESTARTSYS;
190454e41810SGil Fine goto out;
190554e41810SGil Fine }
190654e41810SGil Fine
190754e41810SGil Fine /* If written delimiter only, clear all counters in one shot */
190854e41810SGil Fine if (buf[0] == '\n') {
190954e41810SGil Fine ret = port_clear_all_counters(port);
191054e41810SGil Fine } else {
191154e41810SGil Fine char *line = buf;
191254e41810SGil Fine u32 val, offset;
191354e41810SGil Fine
191477e4907fSDan Carpenter ret = -EINVAL;
191554e41810SGil Fine while (parse_line(&line, &offset, &val, 1, 4)) {
191654e41810SGil Fine ret = tb_port_write(port, &val, TB_CFG_COUNTERS,
191754e41810SGil Fine offset, 1);
191854e41810SGil Fine if (ret)
191954e41810SGil Fine break;
192054e41810SGil Fine }
192154e41810SGil Fine }
192254e41810SGil Fine
192354e41810SGil Fine mutex_unlock(&tb->lock);
192454e41810SGil Fine
192554e41810SGil Fine out:
192654e41810SGil Fine pm_runtime_mark_last_busy(&sw->dev);
192754e41810SGil Fine pm_runtime_put_autosuspend(&sw->dev);
192854e41810SGil Fine free_page((unsigned long)buf);
192954e41810SGil Fine
193054e41810SGil Fine return ret < 0 ? ret : count;
193154e41810SGil Fine }
193254e41810SGil Fine
cap_show_by_dw(struct seq_file * s,struct tb_switch * sw,struct tb_port * port,unsigned int cap,unsigned int offset,u8 cap_id,u8 vsec_id,int dwords)1933815f421bSGil Fine static void cap_show_by_dw(struct seq_file *s, struct tb_switch *sw,
1934815f421bSGil Fine struct tb_port *port, unsigned int cap,
1935815f421bSGil Fine unsigned int offset, u8 cap_id, u8 vsec_id,
1936815f421bSGil Fine int dwords)
1937815f421bSGil Fine {
1938815f421bSGil Fine int i, ret;
1939815f421bSGil Fine u32 data;
1940815f421bSGil Fine
1941815f421bSGil Fine for (i = 0; i < dwords; i++) {
1942815f421bSGil Fine if (port)
1943815f421bSGil Fine ret = tb_port_read(port, &data, TB_CFG_PORT, cap + offset + i, 1);
1944815f421bSGil Fine else
1945815f421bSGil Fine ret = tb_sw_read(sw, &data, TB_CFG_SWITCH, cap + offset + i, 1);
1946815f421bSGil Fine if (ret) {
19473382665aSGil Fine seq_printf(s, "0x%04x <not accessible>\n", cap + offset + i);
19483382665aSGil Fine continue;
1949815f421bSGil Fine }
1950815f421bSGil Fine
1951815f421bSGil Fine seq_printf(s, "0x%04x %4d 0x%02x 0x%02x 0x%08x\n", cap + offset + i,
1952815f421bSGil Fine offset + i, cap_id, vsec_id, data);
1953815f421bSGil Fine }
1954815f421bSGil Fine }
1955815f421bSGil Fine
cap_show(struct seq_file * s,struct tb_switch * sw,struct tb_port * port,unsigned int cap,u8 cap_id,u8 vsec_id,int length)195654e41810SGil Fine static void cap_show(struct seq_file *s, struct tb_switch *sw,
195754e41810SGil Fine struct tb_port *port, unsigned int cap, u8 cap_id,
195854e41810SGil Fine u8 vsec_id, int length)
195954e41810SGil Fine {
196054e41810SGil Fine int ret, offset = 0;
196154e41810SGil Fine
196254e41810SGil Fine while (length > 0) {
196354e41810SGil Fine int i, dwords = min(length, TB_MAX_CONFIG_RW_LENGTH);
196454e41810SGil Fine u32 data[TB_MAX_CONFIG_RW_LENGTH];
196554e41810SGil Fine
196654e41810SGil Fine if (port)
196754e41810SGil Fine ret = tb_port_read(port, data, TB_CFG_PORT, cap + offset,
196854e41810SGil Fine dwords);
196954e41810SGil Fine else
197054e41810SGil Fine ret = tb_sw_read(sw, data, TB_CFG_SWITCH, cap + offset, dwords);
197154e41810SGil Fine if (ret) {
19723382665aSGil Fine cap_show_by_dw(s, sw, port, cap, offset, cap_id, vsec_id, length);
197354e41810SGil Fine return;
197454e41810SGil Fine }
197554e41810SGil Fine
197654e41810SGil Fine for (i = 0; i < dwords; i++) {
197754e41810SGil Fine seq_printf(s, "0x%04x %4d 0x%02x 0x%02x 0x%08x\n",
197854e41810SGil Fine cap + offset + i, offset + i,
197954e41810SGil Fine cap_id, vsec_id, data[i]);
198054e41810SGil Fine }
198154e41810SGil Fine
198254e41810SGil Fine length -= dwords;
198354e41810SGil Fine offset += dwords;
198454e41810SGil Fine }
198554e41810SGil Fine }
198654e41810SGil Fine
port_cap_show(struct tb_port * port,struct seq_file * s,unsigned int cap)198754e41810SGil Fine static void port_cap_show(struct tb_port *port, struct seq_file *s,
198854e41810SGil Fine unsigned int cap)
198954e41810SGil Fine {
199054e41810SGil Fine struct tb_cap_any header;
199154e41810SGil Fine u8 vsec_id = 0;
199254e41810SGil Fine size_t length;
199354e41810SGil Fine int ret;
199454e41810SGil Fine
199554e41810SGil Fine ret = tb_port_read(port, &header, TB_CFG_PORT, cap, 1);
199654e41810SGil Fine if (ret) {
199754e41810SGil Fine seq_printf(s, "0x%04x <capability read failed>\n", cap);
199854e41810SGil Fine return;
199954e41810SGil Fine }
200054e41810SGil Fine
200154e41810SGil Fine switch (header.basic.cap) {
200254e41810SGil Fine case TB_PORT_CAP_PHY:
200354e41810SGil Fine length = PORT_CAP_LANE_LEN;
200454e41810SGil Fine break;
200554e41810SGil Fine
200654e41810SGil Fine case TB_PORT_CAP_TIME1:
2007ee22d52aSGil Fine if (usb4_switch_version(port->sw) < 2)
2008ee22d52aSGil Fine length = PORT_CAP_TMU_V1_LEN;
2009ee22d52aSGil Fine else
2010ee22d52aSGil Fine length = PORT_CAP_TMU_V2_LEN;
201154e41810SGil Fine break;
201254e41810SGil Fine
201354e41810SGil Fine case TB_PORT_CAP_POWER:
201454e41810SGil Fine length = PORT_CAP_POWER_LEN;
201554e41810SGil Fine break;
201654e41810SGil Fine
201754e41810SGil Fine case TB_PORT_CAP_ADAP:
201854e41810SGil Fine if (tb_port_is_pcie_down(port) || tb_port_is_pcie_up(port)) {
20190209c808SGil Fine if (usb4_switch_version(port->sw) < 2)
20200209c808SGil Fine length = PORT_CAP_V1_PCIE_LEN;
20210209c808SGil Fine else
20220209c808SGil Fine length = PORT_CAP_V2_PCIE_LEN;
202375abb4f5SGil Fine } else if (tb_port_is_dpin(port)) {
202475abb4f5SGil Fine if (usb4_switch_version(port->sw) < 2)
202575abb4f5SGil Fine length = PORT_CAP_DP_V1_LEN;
2026630f211bSMika Westerberg else
202775abb4f5SGil Fine length = PORT_CAP_DP_V2_LEN;
202875abb4f5SGil Fine } else if (tb_port_is_dpout(port)) {
202975abb4f5SGil Fine length = PORT_CAP_DP_V1_LEN;
203054e41810SGil Fine } else if (tb_port_is_usb3_down(port) ||
203154e41810SGil Fine tb_port_is_usb3_up(port)) {
203254e41810SGil Fine length = PORT_CAP_USB3_LEN;
203354e41810SGil Fine } else {
203454e41810SGil Fine seq_printf(s, "0x%04x <unsupported capability 0x%02x>\n",
203554e41810SGil Fine cap, header.basic.cap);
203654e41810SGil Fine return;
203754e41810SGil Fine }
203854e41810SGil Fine break;
203954e41810SGil Fine
204054e41810SGil Fine case TB_PORT_CAP_VSE:
204154e41810SGil Fine if (!header.extended_short.length) {
204254e41810SGil Fine ret = tb_port_read(port, (u32 *)&header + 1, TB_CFG_PORT,
204354e41810SGil Fine cap + 1, 1);
204454e41810SGil Fine if (ret) {
204554e41810SGil Fine seq_printf(s, "0x%04x <capability read failed>\n",
204654e41810SGil Fine cap + 1);
204754e41810SGil Fine return;
204854e41810SGil Fine }
204954e41810SGil Fine length = header.extended_long.length;
205054e41810SGil Fine vsec_id = header.extended_short.vsec_id;
205154e41810SGil Fine } else {
205254e41810SGil Fine length = header.extended_short.length;
205354e41810SGil Fine vsec_id = header.extended_short.vsec_id;
205454e41810SGil Fine }
205554e41810SGil Fine break;
205654e41810SGil Fine
205754e41810SGil Fine case TB_PORT_CAP_USB4:
205854e41810SGil Fine length = PORT_CAP_USB4_LEN;
205954e41810SGil Fine break;
206054e41810SGil Fine
206154e41810SGil Fine default:
206254e41810SGil Fine seq_printf(s, "0x%04x <unsupported capability 0x%02x>\n",
206354e41810SGil Fine cap, header.basic.cap);
206454e41810SGil Fine return;
206554e41810SGil Fine }
206654e41810SGil Fine
206754e41810SGil Fine cap_show(s, NULL, port, cap, header.basic.cap, vsec_id, length);
206854e41810SGil Fine }
206954e41810SGil Fine
port_caps_show(struct tb_port * port,struct seq_file * s)207054e41810SGil Fine static void port_caps_show(struct tb_port *port, struct seq_file *s)
207154e41810SGil Fine {
207254e41810SGil Fine int cap;
207354e41810SGil Fine
207454e41810SGil Fine cap = tb_port_next_cap(port, 0);
207554e41810SGil Fine while (cap > 0) {
207654e41810SGil Fine port_cap_show(port, s, cap);
207754e41810SGil Fine cap = tb_port_next_cap(port, cap);
207854e41810SGil Fine }
207954e41810SGil Fine }
208054e41810SGil Fine
port_basic_regs_show(struct tb_port * port,struct seq_file * s)208154e41810SGil Fine static int port_basic_regs_show(struct tb_port *port, struct seq_file *s)
208254e41810SGil Fine {
208354e41810SGil Fine u32 data[PORT_CAP_BASIC_LEN];
208454e41810SGil Fine int ret, i;
208554e41810SGil Fine
208654e41810SGil Fine ret = tb_port_read(port, data, TB_CFG_PORT, 0, ARRAY_SIZE(data));
208754e41810SGil Fine if (ret)
208854e41810SGil Fine return ret;
208954e41810SGil Fine
209054e41810SGil Fine for (i = 0; i < ARRAY_SIZE(data); i++)
209154e41810SGil Fine seq_printf(s, "0x%04x %4d 0x00 0x00 0x%08x\n", i, i, data[i]);
209254e41810SGil Fine
209354e41810SGil Fine return 0;
209454e41810SGil Fine }
209554e41810SGil Fine
port_regs_show(struct seq_file * s,void * not_used)209654e41810SGil Fine static int port_regs_show(struct seq_file *s, void *not_used)
209754e41810SGil Fine {
209854e41810SGil Fine struct tb_port *port = s->private;
209954e41810SGil Fine struct tb_switch *sw = port->sw;
210054e41810SGil Fine struct tb *tb = sw->tb;
210154e41810SGil Fine int ret;
210254e41810SGil Fine
210354e41810SGil Fine pm_runtime_get_sync(&sw->dev);
210454e41810SGil Fine
210554e41810SGil Fine if (mutex_lock_interruptible(&tb->lock)) {
210654e41810SGil Fine ret = -ERESTARTSYS;
210754e41810SGil Fine goto out_rpm_put;
210854e41810SGil Fine }
210954e41810SGil Fine
211054e41810SGil Fine seq_puts(s, "# offset relative_offset cap_id vs_cap_id value\n");
211154e41810SGil Fine
211254e41810SGil Fine ret = port_basic_regs_show(port, s);
211354e41810SGil Fine if (ret)
211454e41810SGil Fine goto out_unlock;
211554e41810SGil Fine
211654e41810SGil Fine port_caps_show(port, s);
211754e41810SGil Fine
211854e41810SGil Fine out_unlock:
211954e41810SGil Fine mutex_unlock(&tb->lock);
212054e41810SGil Fine out_rpm_put:
212154e41810SGil Fine pm_runtime_mark_last_busy(&sw->dev);
212254e41810SGil Fine pm_runtime_put_autosuspend(&sw->dev);
212354e41810SGil Fine
212454e41810SGil Fine return ret;
212554e41810SGil Fine }
212654e41810SGil Fine DEBUGFS_ATTR_RW(port_regs);
212754e41810SGil Fine
switch_cap_show(struct tb_switch * sw,struct seq_file * s,unsigned int cap)212854e41810SGil Fine static void switch_cap_show(struct tb_switch *sw, struct seq_file *s,
212954e41810SGil Fine unsigned int cap)
213054e41810SGil Fine {
213154e41810SGil Fine struct tb_cap_any header;
213254e41810SGil Fine int ret, length;
213354e41810SGil Fine u8 vsec_id = 0;
213454e41810SGil Fine
213554e41810SGil Fine ret = tb_sw_read(sw, &header, TB_CFG_SWITCH, cap, 1);
213654e41810SGil Fine if (ret) {
213754e41810SGil Fine seq_printf(s, "0x%04x <capability read failed>\n", cap);
213854e41810SGil Fine return;
213954e41810SGil Fine }
214054e41810SGil Fine
214154e41810SGil Fine if (header.basic.cap == TB_SWITCH_CAP_VSE) {
214254e41810SGil Fine if (!header.extended_short.length) {
214354e41810SGil Fine ret = tb_sw_read(sw, (u32 *)&header + 1, TB_CFG_SWITCH,
214454e41810SGil Fine cap + 1, 1);
214554e41810SGil Fine if (ret) {
214654e41810SGil Fine seq_printf(s, "0x%04x <capability read failed>\n",
214754e41810SGil Fine cap + 1);
214854e41810SGil Fine return;
214954e41810SGil Fine }
215054e41810SGil Fine length = header.extended_long.length;
215154e41810SGil Fine } else {
215254e41810SGil Fine length = header.extended_short.length;
215354e41810SGil Fine }
215454e41810SGil Fine vsec_id = header.extended_short.vsec_id;
215554e41810SGil Fine } else {
215654e41810SGil Fine if (header.basic.cap == TB_SWITCH_CAP_TMU) {
215754e41810SGil Fine length = SWITCH_CAP_TMU_LEN;
215854e41810SGil Fine } else {
215954e41810SGil Fine seq_printf(s, "0x%04x <unknown capability 0x%02x>\n",
216054e41810SGil Fine cap, header.basic.cap);
216154e41810SGil Fine return;
216254e41810SGil Fine }
216354e41810SGil Fine }
216454e41810SGil Fine
216554e41810SGil Fine cap_show(s, sw, NULL, cap, header.basic.cap, vsec_id, length);
216654e41810SGil Fine }
216754e41810SGil Fine
switch_caps_show(struct tb_switch * sw,struct seq_file * s)216854e41810SGil Fine static void switch_caps_show(struct tb_switch *sw, struct seq_file *s)
216954e41810SGil Fine {
217054e41810SGil Fine int cap;
217154e41810SGil Fine
217254e41810SGil Fine cap = tb_switch_next_cap(sw, 0);
217354e41810SGil Fine while (cap > 0) {
217454e41810SGil Fine switch_cap_show(sw, s, cap);
217554e41810SGil Fine cap = tb_switch_next_cap(sw, cap);
217654e41810SGil Fine }
217754e41810SGil Fine }
217854e41810SGil Fine
switch_basic_regs_show(struct tb_switch * sw,struct seq_file * s)217954e41810SGil Fine static int switch_basic_regs_show(struct tb_switch *sw, struct seq_file *s)
218054e41810SGil Fine {
218154e41810SGil Fine u32 data[SWITCH_CAP_BASIC_LEN];
218254e41810SGil Fine size_t dwords;
218354e41810SGil Fine int ret, i;
218454e41810SGil Fine
218554e41810SGil Fine /* Only USB4 has the additional registers */
218654e41810SGil Fine if (tb_switch_is_usb4(sw))
218754e41810SGil Fine dwords = ARRAY_SIZE(data);
218854e41810SGil Fine else
2189a3ad3a90SMika Westerberg dwords = 5;
219054e41810SGil Fine
219154e41810SGil Fine ret = tb_sw_read(sw, data, TB_CFG_SWITCH, 0, dwords);
219254e41810SGil Fine if (ret)
219354e41810SGil Fine return ret;
219454e41810SGil Fine
219554e41810SGil Fine for (i = 0; i < dwords; i++)
219654e41810SGil Fine seq_printf(s, "0x%04x %4d 0x00 0x00 0x%08x\n", i, i, data[i]);
219754e41810SGil Fine
219854e41810SGil Fine return 0;
219954e41810SGil Fine }
220054e41810SGil Fine
switch_regs_show(struct seq_file * s,void * not_used)220154e41810SGil Fine static int switch_regs_show(struct seq_file *s, void *not_used)
220254e41810SGil Fine {
220354e41810SGil Fine struct tb_switch *sw = s->private;
220454e41810SGil Fine struct tb *tb = sw->tb;
220554e41810SGil Fine int ret;
220654e41810SGil Fine
220754e41810SGil Fine pm_runtime_get_sync(&sw->dev);
220854e41810SGil Fine
220954e41810SGil Fine if (mutex_lock_interruptible(&tb->lock)) {
221054e41810SGil Fine ret = -ERESTARTSYS;
221154e41810SGil Fine goto out_rpm_put;
221254e41810SGil Fine }
221354e41810SGil Fine
221454e41810SGil Fine seq_puts(s, "# offset relative_offset cap_id vs_cap_id value\n");
221554e41810SGil Fine
221654e41810SGil Fine ret = switch_basic_regs_show(sw, s);
221754e41810SGil Fine if (ret)
221854e41810SGil Fine goto out_unlock;
221954e41810SGil Fine
222054e41810SGil Fine switch_caps_show(sw, s);
222154e41810SGil Fine
222254e41810SGil Fine out_unlock:
222354e41810SGil Fine mutex_unlock(&tb->lock);
222454e41810SGil Fine out_rpm_put:
222554e41810SGil Fine pm_runtime_mark_last_busy(&sw->dev);
222654e41810SGil Fine pm_runtime_put_autosuspend(&sw->dev);
222754e41810SGil Fine
222854e41810SGil Fine return ret;
222954e41810SGil Fine }
223054e41810SGil Fine DEBUGFS_ATTR_RW(switch_regs);
223154e41810SGil Fine
path_show_one(struct tb_port * port,struct seq_file * s,int hopid)223254e41810SGil Fine static int path_show_one(struct tb_port *port, struct seq_file *s, int hopid)
223354e41810SGil Fine {
223454e41810SGil Fine u32 data[PATH_LEN];
223554e41810SGil Fine int ret, i;
223654e41810SGil Fine
223754e41810SGil Fine ret = tb_port_read(port, data, TB_CFG_HOPS, hopid * PATH_LEN,
223854e41810SGil Fine ARRAY_SIZE(data));
223954e41810SGil Fine if (ret) {
224054e41810SGil Fine seq_printf(s, "0x%04x <not accessible>\n", hopid * PATH_LEN);
224154e41810SGil Fine return ret;
224254e41810SGil Fine }
224354e41810SGil Fine
224454e41810SGil Fine for (i = 0; i < ARRAY_SIZE(data); i++) {
224554e41810SGil Fine seq_printf(s, "0x%04x %4d 0x%02x 0x%08x\n",
224654e41810SGil Fine hopid * PATH_LEN + i, i, hopid, data[i]);
224754e41810SGil Fine }
224854e41810SGil Fine
224954e41810SGil Fine return 0;
225054e41810SGil Fine }
225154e41810SGil Fine
path_show(struct seq_file * s,void * not_used)225254e41810SGil Fine static int path_show(struct seq_file *s, void *not_used)
225354e41810SGil Fine {
225454e41810SGil Fine struct tb_port *port = s->private;
225554e41810SGil Fine struct tb_switch *sw = port->sw;
225654e41810SGil Fine struct tb *tb = sw->tb;
225754e41810SGil Fine int start, i, ret = 0;
225854e41810SGil Fine
225954e41810SGil Fine pm_runtime_get_sync(&sw->dev);
226054e41810SGil Fine
226154e41810SGil Fine if (mutex_lock_interruptible(&tb->lock)) {
226254e41810SGil Fine ret = -ERESTARTSYS;
226354e41810SGil Fine goto out_rpm_put;
226454e41810SGil Fine }
226554e41810SGil Fine
226654e41810SGil Fine seq_puts(s, "# offset relative_offset in_hop_id value\n");
226754e41810SGil Fine
226854e41810SGil Fine /* NHI and lane adapters have entry for path 0 */
226954e41810SGil Fine if (tb_port_is_null(port) || tb_port_is_nhi(port)) {
227054e41810SGil Fine ret = path_show_one(port, s, 0);
227154e41810SGil Fine if (ret)
227254e41810SGil Fine goto out_unlock;
227354e41810SGil Fine }
227454e41810SGil Fine
227554e41810SGil Fine start = tb_port_is_nhi(port) ? 1 : TB_PATH_MIN_HOPID;
227654e41810SGil Fine
227754e41810SGil Fine for (i = start; i <= port->config.max_in_hop_id; i++) {
227854e41810SGil Fine ret = path_show_one(port, s, i);
227954e41810SGil Fine if (ret)
228054e41810SGil Fine break;
228154e41810SGil Fine }
228254e41810SGil Fine
228354e41810SGil Fine out_unlock:
228454e41810SGil Fine mutex_unlock(&tb->lock);
228554e41810SGil Fine out_rpm_put:
228654e41810SGil Fine pm_runtime_mark_last_busy(&sw->dev);
228754e41810SGil Fine pm_runtime_put_autosuspend(&sw->dev);
228854e41810SGil Fine
228954e41810SGil Fine return ret;
229054e41810SGil Fine }
2291398da8e6SGil Fine DEBUGFS_ATTR_RW(path);
229254e41810SGil Fine
counter_set_regs_show(struct tb_port * port,struct seq_file * s,int counter)229354e41810SGil Fine static int counter_set_regs_show(struct tb_port *port, struct seq_file *s,
229454e41810SGil Fine int counter)
229554e41810SGil Fine {
229654e41810SGil Fine u32 data[COUNTER_SET_LEN];
229754e41810SGil Fine int ret, i;
229854e41810SGil Fine
229954e41810SGil Fine ret = tb_port_read(port, data, TB_CFG_COUNTERS,
230054e41810SGil Fine counter * COUNTER_SET_LEN, ARRAY_SIZE(data));
230154e41810SGil Fine if (ret) {
230254e41810SGil Fine seq_printf(s, "0x%04x <not accessible>\n",
230354e41810SGil Fine counter * COUNTER_SET_LEN);
230454e41810SGil Fine return ret;
230554e41810SGil Fine }
230654e41810SGil Fine
230754e41810SGil Fine for (i = 0; i < ARRAY_SIZE(data); i++) {
230854e41810SGil Fine seq_printf(s, "0x%04x %4d 0x%02x 0x%08x\n",
230954e41810SGil Fine counter * COUNTER_SET_LEN + i, i, counter, data[i]);
231054e41810SGil Fine }
231154e41810SGil Fine
231254e41810SGil Fine return 0;
231354e41810SGil Fine }
231454e41810SGil Fine
counters_show(struct seq_file * s,void * not_used)231554e41810SGil Fine static int counters_show(struct seq_file *s, void *not_used)
231654e41810SGil Fine {
231754e41810SGil Fine struct tb_port *port = s->private;
231854e41810SGil Fine struct tb_switch *sw = port->sw;
231954e41810SGil Fine struct tb *tb = sw->tb;
232054e41810SGil Fine int i, ret = 0;
232154e41810SGil Fine
232254e41810SGil Fine pm_runtime_get_sync(&sw->dev);
232354e41810SGil Fine
232454e41810SGil Fine if (mutex_lock_interruptible(&tb->lock)) {
232554e41810SGil Fine ret = -ERESTARTSYS;
232654e41810SGil Fine goto out;
232754e41810SGil Fine }
232854e41810SGil Fine
232954e41810SGil Fine seq_puts(s, "# offset relative_offset counter_id value\n");
233054e41810SGil Fine
233154e41810SGil Fine for (i = 0; i < port->config.max_counters; i++) {
233254e41810SGil Fine ret = counter_set_regs_show(port, s, i);
233354e41810SGil Fine if (ret)
233454e41810SGil Fine break;
233554e41810SGil Fine }
233654e41810SGil Fine
233754e41810SGil Fine mutex_unlock(&tb->lock);
233854e41810SGil Fine
233954e41810SGil Fine out:
234054e41810SGil Fine pm_runtime_mark_last_busy(&sw->dev);
234154e41810SGil Fine pm_runtime_put_autosuspend(&sw->dev);
234254e41810SGil Fine
234354e41810SGil Fine return ret;
234454e41810SGil Fine }
234554e41810SGil Fine DEBUGFS_ATTR_RW(counters);
234654e41810SGil Fine
sb_regs_show(struct tb_port * port,const struct sb_reg * sb_regs,size_t size,enum usb4_sb_target target,u8 index,struct seq_file * s)23476d241fa0SMika Westerberg static int sb_regs_show(struct tb_port *port, const struct sb_reg *sb_regs,
23486d241fa0SMika Westerberg size_t size, enum usb4_sb_target target, u8 index,
23496d241fa0SMika Westerberg struct seq_file *s)
23506d241fa0SMika Westerberg {
23516d241fa0SMika Westerberg int ret, i;
23526d241fa0SMika Westerberg
23536d241fa0SMika Westerberg seq_puts(s, "# register value\n");
23546d241fa0SMika Westerberg
23556d241fa0SMika Westerberg for (i = 0; i < size; i++) {
23566d241fa0SMika Westerberg const struct sb_reg *regs = &sb_regs[i];
23576d241fa0SMika Westerberg u8 data[64];
23586d241fa0SMika Westerberg int j;
23596d241fa0SMika Westerberg
23606d241fa0SMika Westerberg memset(data, 0, sizeof(data));
23616d241fa0SMika Westerberg ret = usb4_port_sb_read(port, target, index, regs->reg, data,
23626d241fa0SMika Westerberg regs->size);
23636d241fa0SMika Westerberg if (ret)
23646d241fa0SMika Westerberg return ret;
23656d241fa0SMika Westerberg
23666d241fa0SMika Westerberg seq_printf(s, "0x%02x", regs->reg);
23676d241fa0SMika Westerberg for (j = 0; j < regs->size; j++)
23686d241fa0SMika Westerberg seq_printf(s, " 0x%02x", data[j]);
23696d241fa0SMika Westerberg seq_puts(s, "\n");
23706d241fa0SMika Westerberg }
23716d241fa0SMika Westerberg
23726d241fa0SMika Westerberg return 0;
23736d241fa0SMika Westerberg }
23746d241fa0SMika Westerberg
port_sb_regs_show(struct seq_file * s,void * not_used)23756d241fa0SMika Westerberg static int port_sb_regs_show(struct seq_file *s, void *not_used)
23766d241fa0SMika Westerberg {
23776d241fa0SMika Westerberg struct tb_port *port = s->private;
23786d241fa0SMika Westerberg struct tb_switch *sw = port->sw;
23796d241fa0SMika Westerberg struct tb *tb = sw->tb;
23806d241fa0SMika Westerberg int ret;
23816d241fa0SMika Westerberg
23826d241fa0SMika Westerberg pm_runtime_get_sync(&sw->dev);
23836d241fa0SMika Westerberg
23846d241fa0SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
23856d241fa0SMika Westerberg ret = -ERESTARTSYS;
23866d241fa0SMika Westerberg goto out_rpm_put;
23876d241fa0SMika Westerberg }
23886d241fa0SMika Westerberg
23896d241fa0SMika Westerberg ret = sb_regs_show(port, port_sb_regs, ARRAY_SIZE(port_sb_regs),
23906d241fa0SMika Westerberg USB4_SB_TARGET_ROUTER, 0, s);
23916d241fa0SMika Westerberg
23926d241fa0SMika Westerberg mutex_unlock(&tb->lock);
23936d241fa0SMika Westerberg out_rpm_put:
23946d241fa0SMika Westerberg pm_runtime_mark_last_busy(&sw->dev);
23956d241fa0SMika Westerberg pm_runtime_put_autosuspend(&sw->dev);
23966d241fa0SMika Westerberg
23976d241fa0SMika Westerberg return ret;
23986d241fa0SMika Westerberg }
23996d241fa0SMika Westerberg DEBUGFS_ATTR_RW(port_sb_regs);
24006d241fa0SMika Westerberg
240154e41810SGil Fine /**
240254e41810SGil Fine * tb_switch_debugfs_init() - Add debugfs entries for router
240354e41810SGil Fine * @sw: Pointer to the router
240454e41810SGil Fine *
240554e41810SGil Fine * Adds debugfs directories and files for given router.
240654e41810SGil Fine */
tb_switch_debugfs_init(struct tb_switch * sw)240754e41810SGil Fine void tb_switch_debugfs_init(struct tb_switch *sw)
240854e41810SGil Fine {
240954e41810SGil Fine struct dentry *debugfs_dir;
241054e41810SGil Fine struct tb_port *port;
241154e41810SGil Fine
241254e41810SGil Fine debugfs_dir = debugfs_create_dir(dev_name(&sw->dev), tb_debugfs_root);
241354e41810SGil Fine sw->debugfs_dir = debugfs_dir;
241454e41810SGil Fine debugfs_create_file("regs", DEBUGFS_MODE, debugfs_dir, sw,
241554e41810SGil Fine &switch_regs_fops);
2416*43d84701SMika Westerberg if (sw->drom)
2417*43d84701SMika Westerberg debugfs_create_blob("drom", 0400, debugfs_dir, &sw->drom_blob);
241854e41810SGil Fine
241954e41810SGil Fine tb_switch_for_each_port(sw, port) {
242054e41810SGil Fine struct dentry *debugfs_dir;
242154e41810SGil Fine char dir_name[10];
242254e41810SGil Fine
242354e41810SGil Fine if (port->disabled)
242454e41810SGil Fine continue;
242554e41810SGil Fine if (port->config.type == TB_TYPE_INACTIVE)
242654e41810SGil Fine continue;
242754e41810SGil Fine
242854e41810SGil Fine snprintf(dir_name, sizeof(dir_name), "port%d", port->port);
242954e41810SGil Fine debugfs_dir = debugfs_create_dir(dir_name, sw->debugfs_dir);
243054e41810SGil Fine debugfs_create_file("regs", DEBUGFS_MODE, debugfs_dir,
243154e41810SGil Fine port, &port_regs_fops);
243254e41810SGil Fine debugfs_create_file("path", 0400, debugfs_dir, port,
243354e41810SGil Fine &path_fops);
243454e41810SGil Fine if (port->config.counters_support)
243554e41810SGil Fine debugfs_create_file("counters", 0600, debugfs_dir, port,
243654e41810SGil Fine &counters_fops);
24376d241fa0SMika Westerberg if (port->usb4)
24386d241fa0SMika Westerberg debugfs_create_file("sb_regs", DEBUGFS_MODE, debugfs_dir,
24396d241fa0SMika Westerberg port, &port_sb_regs_fops);
244054e41810SGil Fine }
2441d0f1e0c2SMika Westerberg
2442d0f1e0c2SMika Westerberg margining_switch_init(sw);
244354e41810SGil Fine }
244454e41810SGil Fine
244554e41810SGil Fine /**
244654e41810SGil Fine * tb_switch_debugfs_remove() - Remove all router debugfs entries
244754e41810SGil Fine * @sw: Pointer to the router
244854e41810SGil Fine *
244954e41810SGil Fine * Removes all previously added debugfs entries under this router.
245054e41810SGil Fine */
tb_switch_debugfs_remove(struct tb_switch * sw)245154e41810SGil Fine void tb_switch_debugfs_remove(struct tb_switch *sw)
245254e41810SGil Fine {
2453d0f1e0c2SMika Westerberg margining_switch_remove(sw);
245454e41810SGil Fine debugfs_remove_recursive(sw->debugfs_dir);
245554e41810SGil Fine }
245654e41810SGil Fine
tb_xdomain_debugfs_init(struct tb_xdomain * xd)2457d0f1e0c2SMika Westerberg void tb_xdomain_debugfs_init(struct tb_xdomain *xd)
2458d0f1e0c2SMika Westerberg {
2459d0f1e0c2SMika Westerberg margining_xdomain_init(xd);
2460d0f1e0c2SMika Westerberg }
2461d0f1e0c2SMika Westerberg
tb_xdomain_debugfs_remove(struct tb_xdomain * xd)2462d0f1e0c2SMika Westerberg void tb_xdomain_debugfs_remove(struct tb_xdomain *xd)
2463d0f1e0c2SMika Westerberg {
2464d0f1e0c2SMika Westerberg margining_xdomain_remove(xd);
2465d0f1e0c2SMika Westerberg }
2466d0f1e0c2SMika Westerberg
2467407ac931SMika Westerberg /**
2468407ac931SMika Westerberg * tb_service_debugfs_init() - Add debugfs directory for service
2469407ac931SMika Westerberg * @svc: Thunderbolt service pointer
2470407ac931SMika Westerberg *
2471407ac931SMika Westerberg * Adds debugfs directory for service.
2472407ac931SMika Westerberg */
tb_service_debugfs_init(struct tb_service * svc)2473407ac931SMika Westerberg void tb_service_debugfs_init(struct tb_service *svc)
2474407ac931SMika Westerberg {
2475407ac931SMika Westerberg svc->debugfs_dir = debugfs_create_dir(dev_name(&svc->dev),
2476407ac931SMika Westerberg tb_debugfs_root);
2477407ac931SMika Westerberg }
2478407ac931SMika Westerberg
2479407ac931SMika Westerberg /**
2480407ac931SMika Westerberg * tb_service_debugfs_remove() - Remove service debugfs directory
2481407ac931SMika Westerberg * @svc: Thunderbolt service pointer
2482407ac931SMika Westerberg *
2483407ac931SMika Westerberg * Removes the previously created debugfs directory for @svc.
2484407ac931SMika Westerberg */
tb_service_debugfs_remove(struct tb_service * svc)2485407ac931SMika Westerberg void tb_service_debugfs_remove(struct tb_service *svc)
2486407ac931SMika Westerberg {
2487407ac931SMika Westerberg debugfs_remove_recursive(svc->debugfs_dir);
2488407ac931SMika Westerberg svc->debugfs_dir = NULL;
2489407ac931SMika Westerberg }
2490407ac931SMika Westerberg
retimer_sb_regs_show(struct seq_file * s,void * not_used)24916d241fa0SMika Westerberg static int retimer_sb_regs_show(struct seq_file *s, void *not_used)
24926d241fa0SMika Westerberg {
24936d241fa0SMika Westerberg struct tb_retimer *rt = s->private;
24946d241fa0SMika Westerberg struct tb *tb = rt->tb;
24956d241fa0SMika Westerberg int ret;
24966d241fa0SMika Westerberg
24976d241fa0SMika Westerberg pm_runtime_get_sync(&rt->dev);
24986d241fa0SMika Westerberg
24996d241fa0SMika Westerberg if (mutex_lock_interruptible(&tb->lock)) {
25006d241fa0SMika Westerberg ret = -ERESTARTSYS;
25016d241fa0SMika Westerberg goto out_rpm_put;
25026d241fa0SMika Westerberg }
25036d241fa0SMika Westerberg
25046d241fa0SMika Westerberg ret = sb_regs_show(rt->port, retimer_sb_regs, ARRAY_SIZE(retimer_sb_regs),
25056d241fa0SMika Westerberg USB4_SB_TARGET_RETIMER, rt->index, s);
25066d241fa0SMika Westerberg
25076d241fa0SMika Westerberg mutex_unlock(&tb->lock);
25086d241fa0SMika Westerberg out_rpm_put:
25096d241fa0SMika Westerberg pm_runtime_mark_last_busy(&rt->dev);
25106d241fa0SMika Westerberg pm_runtime_put_autosuspend(&rt->dev);
25116d241fa0SMika Westerberg
25126d241fa0SMika Westerberg return ret;
25136d241fa0SMika Westerberg }
25146d241fa0SMika Westerberg DEBUGFS_ATTR_RW(retimer_sb_regs);
25156d241fa0SMika Westerberg
25166d241fa0SMika Westerberg /**
25176d241fa0SMika Westerberg * tb_retimer_debugfs_init() - Add debugfs directory for retimer
25186d241fa0SMika Westerberg * @rt: Pointer to retimer structure
25196d241fa0SMika Westerberg *
25206d241fa0SMika Westerberg * Adds and populates retimer debugfs directory.
25216d241fa0SMika Westerberg */
tb_retimer_debugfs_init(struct tb_retimer * rt)25226d241fa0SMika Westerberg void tb_retimer_debugfs_init(struct tb_retimer *rt)
25236d241fa0SMika Westerberg {
25246d241fa0SMika Westerberg struct dentry *debugfs_dir;
25256d241fa0SMika Westerberg
25266d241fa0SMika Westerberg debugfs_dir = debugfs_create_dir(dev_name(&rt->dev), tb_debugfs_root);
25276d241fa0SMika Westerberg debugfs_create_file("sb_regs", DEBUGFS_MODE, debugfs_dir, rt,
25286d241fa0SMika Westerberg &retimer_sb_regs_fops);
2529ff6ab055SMika Westerberg margining_retimer_init(rt, debugfs_dir);
25306d241fa0SMika Westerberg }
25316d241fa0SMika Westerberg
25326d241fa0SMika Westerberg /**
25336d241fa0SMika Westerberg * tb_retimer_debugfs_remove() - Remove retimer debugfs directory
25346d241fa0SMika Westerberg * @rt: Pointer to retimer structure
25356d241fa0SMika Westerberg *
25366d241fa0SMika Westerberg * Removes the retimer debugfs directory along with its contents.
25376d241fa0SMika Westerberg */
tb_retimer_debugfs_remove(struct tb_retimer * rt)25386d241fa0SMika Westerberg void tb_retimer_debugfs_remove(struct tb_retimer *rt)
25396d241fa0SMika Westerberg {
25406d241fa0SMika Westerberg debugfs_lookup_and_remove(dev_name(&rt->dev), tb_debugfs_root);
2541ff6ab055SMika Westerberg margining_retimer_remove(rt);
25426d241fa0SMika Westerberg }
25436d241fa0SMika Westerberg
tb_debugfs_init(void)254454e41810SGil Fine void tb_debugfs_init(void)
254554e41810SGil Fine {
254654e41810SGil Fine tb_debugfs_root = debugfs_create_dir("thunderbolt", NULL);
254754e41810SGil Fine }
254854e41810SGil Fine
tb_debugfs_exit(void)254954e41810SGil Fine void tb_debugfs_exit(void)
255054e41810SGil Fine {
255154e41810SGil Fine debugfs_remove_recursive(tb_debugfs_root);
255254e41810SGil Fine }
2553