1 /*
2  * Copyright 2017 IBM Corporation
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version
7  * 2 of the License, or (at your option) any later version.
8  */
9 
10 #include <linux/clk.h>
11 #include <linux/mfd/syscon.h>
12 #include <linux/miscdevice.h>
13 #include <linux/mm.h>
14 #include <linux/module.h>
15 #include <linux/of_address.h>
16 #include <linux/platform_device.h>
17 #include <linux/poll.h>
18 #include <linux/regmap.h>
19 
20 #include <linux/aspeed-lpc-ctrl.h>
21 
22 #define DEVICE_NAME	"aspeed-lpc-ctrl"
23 
24 #define HICR5 0x0
25 #define HICR5_ENL2H	BIT(8)
26 #define HICR5_ENFWH	BIT(10)
27 
28 #define HICR7 0x8
29 #define HICR8 0xc
30 
31 struct aspeed_lpc_ctrl {
32 	struct miscdevice	miscdev;
33 	struct regmap		*regmap;
34 	struct clk		*clk;
35 	phys_addr_t		mem_base;
36 	resource_size_t		mem_size;
37 	u32		pnor_size;
38 	u32		pnor_base;
39 };
40 
41 static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
42 {
43 	return container_of(file->private_data, struct aspeed_lpc_ctrl,
44 			miscdev);
45 }
46 
47 static int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
48 {
49 	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
50 	unsigned long vsize = vma->vm_end - vma->vm_start;
51 	pgprot_t prot = vma->vm_page_prot;
52 
53 	if (vma->vm_pgoff + vsize > lpc_ctrl->mem_base + lpc_ctrl->mem_size)
54 		return -EINVAL;
55 
56 	/* ast2400/2500 AHB accesses are not cache coherent */
57 	prot = pgprot_noncached(prot);
58 
59 	if (remap_pfn_range(vma, vma->vm_start,
60 		(lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
61 		vsize, prot))
62 		return -EAGAIN;
63 
64 	return 0;
65 }
66 
67 static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
68 		unsigned long param)
69 {
70 	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
71 	struct device *dev = file->private_data;
72 	void __user *p = (void __user *)param;
73 	struct aspeed_lpc_ctrl_mapping map;
74 	u32 addr;
75 	u32 size;
76 	long rc;
77 
78 	if (copy_from_user(&map, p, sizeof(map)))
79 		return -EFAULT;
80 
81 	if (map.flags != 0)
82 		return -EINVAL;
83 
84 	switch (cmd) {
85 	case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
86 		/* The flash windows don't report their size */
87 		if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
88 			return -EINVAL;
89 
90 		/* Support more than one window id in the future */
91 		if (map.window_id != 0)
92 			return -EINVAL;
93 
94 		/* If memory-region is not described in device tree */
95 		if (!lpc_ctrl->mem_size) {
96 			dev_dbg(dev, "Didn't find reserved memory\n");
97 			return -ENXIO;
98 		}
99 
100 		map.size = lpc_ctrl->mem_size;
101 
102 		return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
103 	case ASPEED_LPC_CTRL_IOCTL_MAP:
104 
105 		/*
106 		 * The top half of HICR7 is the MSB of the BMC address of the
107 		 * mapping.
108 		 * The bottom half of HICR7 is the MSB of the HOST LPC
109 		 * firmware space address of the mapping.
110 		 *
111 		 * The 1 bits in the top of half of HICR8 represent the bits
112 		 * (in the requested address) that should be ignored and
113 		 * replaced with those from the top half of HICR7.
114 		 * The 1 bits in the bottom half of HICR8 represent the bits
115 		 * (in the requested address) that should be kept and pass
116 		 * into the BMC address space.
117 		 */
118 
119 		/*
120 		 * It doesn't make sense to talk about a size or offset with
121 		 * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
122 		 * bits of addresses and sizes.
123 		 */
124 
125 		if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
126 			return -EINVAL;
127 
128 		/*
129 		 * Because of the way the masks work in HICR8 offset has to
130 		 * be a multiple of size.
131 		 */
132 		if (map.offset & (map.size - 1))
133 			return -EINVAL;
134 
135 		if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
136 			if (!lpc_ctrl->pnor_size) {
137 				dev_dbg(dev, "Didn't find host pnor flash\n");
138 				return -ENXIO;
139 			}
140 			addr = lpc_ctrl->pnor_base;
141 			size = lpc_ctrl->pnor_size;
142 		} else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
143 			/* If memory-region is not described in device tree */
144 			if (!lpc_ctrl->mem_size) {
145 				dev_dbg(dev, "Didn't find reserved memory\n");
146 				return -ENXIO;
147 			}
148 			addr = lpc_ctrl->mem_base;
149 			size = lpc_ctrl->mem_size;
150 		} else {
151 			return -EINVAL;
152 		}
153 
154 		/* Check overflow first! */
155 		if (map.offset + map.size < map.offset ||
156 			map.offset + map.size > size)
157 			return -EINVAL;
158 
159 		if (map.size == 0 || map.size > size)
160 			return -EINVAL;
161 
162 		addr += map.offset;
163 
164 		/*
165 		 * addr (host lpc address) is safe regardless of values. This
166 		 * simply changes the address the host has to request on its
167 		 * side of the LPC bus. This cannot impact the hosts own
168 		 * memory space by surprise as LPC specific accessors are
169 		 * required. The only strange thing that could be done is
170 		 * setting the lower 16 bits but the shift takes care of that.
171 		 */
172 
173 		rc = regmap_write(lpc_ctrl->regmap, HICR7,
174 				(addr | (map.addr >> 16)));
175 		if (rc)
176 			return rc;
177 
178 		rc = regmap_write(lpc_ctrl->regmap, HICR8,
179 				(~(map.size - 1)) | ((map.size >> 16) - 1));
180 		if (rc)
181 			return rc;
182 
183 		/*
184 		 * Enable LPC FHW cycles. This is required for the host to
185 		 * access the regions specified.
186 		 */
187 		return regmap_update_bits(lpc_ctrl->regmap, HICR5,
188 				HICR5_ENFWH | HICR5_ENL2H,
189 				HICR5_ENFWH | HICR5_ENL2H);
190 	}
191 
192 	return -EINVAL;
193 }
194 
195 static const struct file_operations aspeed_lpc_ctrl_fops = {
196 	.owner		= THIS_MODULE,
197 	.mmap		= aspeed_lpc_ctrl_mmap,
198 	.unlocked_ioctl	= aspeed_lpc_ctrl_ioctl,
199 };
200 
201 static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
202 {
203 	struct aspeed_lpc_ctrl *lpc_ctrl;
204 	struct device_node *node;
205 	struct resource resm;
206 	struct device *dev;
207 	int rc;
208 
209 	dev = &pdev->dev;
210 
211 	lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
212 	if (!lpc_ctrl)
213 		return -ENOMEM;
214 
215 	/* If flash is described in device tree then store */
216 	node = of_parse_phandle(dev->of_node, "flash", 0);
217 	if (!node) {
218 		dev_dbg(dev, "Didn't find host pnor flash node\n");
219 	} else {
220 		rc = of_address_to_resource(node, 1, &resm);
221 		of_node_put(node);
222 		if (rc) {
223 			dev_err(dev, "Couldn't address to resource for flash\n");
224 			return rc;
225 		}
226 
227 		lpc_ctrl->pnor_size = resource_size(&resm);
228 		lpc_ctrl->pnor_base = resm.start;
229 	}
230 
231 
232 	dev_set_drvdata(&pdev->dev, lpc_ctrl);
233 
234 	/* If memory-region is described in device tree then store */
235 	node = of_parse_phandle(dev->of_node, "memory-region", 0);
236 	if (!node) {
237 		dev_dbg(dev, "Didn't find reserved memory\n");
238 	} else {
239 		rc = of_address_to_resource(node, 0, &resm);
240 		of_node_put(node);
241 		if (rc) {
242 			dev_err(dev, "Couldn't address to resource for reserved memory\n");
243 			return -ENXIO;
244 		}
245 
246 		lpc_ctrl->mem_size = resource_size(&resm);
247 		lpc_ctrl->mem_base = resm.start;
248 	}
249 
250 	lpc_ctrl->regmap = syscon_node_to_regmap(
251 			pdev->dev.parent->of_node);
252 	if (IS_ERR(lpc_ctrl->regmap)) {
253 		dev_err(dev, "Couldn't get regmap\n");
254 		return -ENODEV;
255 	}
256 
257 	lpc_ctrl->clk = devm_clk_get(dev, NULL);
258 	if (IS_ERR(lpc_ctrl->clk)) {
259 		dev_err(dev, "couldn't get clock\n");
260 		return PTR_ERR(lpc_ctrl->clk);
261 	}
262 	rc = clk_prepare_enable(lpc_ctrl->clk);
263 	if (rc) {
264 		dev_err(dev, "couldn't enable clock\n");
265 		return rc;
266 	}
267 
268 	lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
269 	lpc_ctrl->miscdev.name = DEVICE_NAME;
270 	lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
271 	lpc_ctrl->miscdev.parent = dev;
272 	rc = misc_register(&lpc_ctrl->miscdev);
273 	if (rc) {
274 		dev_err(dev, "Unable to register device\n");
275 		goto err;
276 	}
277 
278 	return 0;
279 
280 err:
281 	clk_disable_unprepare(lpc_ctrl->clk);
282 	return rc;
283 }
284 
285 static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
286 {
287 	struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
288 
289 	misc_deregister(&lpc_ctrl->miscdev);
290 	clk_disable_unprepare(lpc_ctrl->clk);
291 
292 	return 0;
293 }
294 
295 static const struct of_device_id aspeed_lpc_ctrl_match[] = {
296 	{ .compatible = "aspeed,ast2400-lpc-ctrl" },
297 	{ .compatible = "aspeed,ast2500-lpc-ctrl" },
298 	{ },
299 };
300 
301 static struct platform_driver aspeed_lpc_ctrl_driver = {
302 	.driver = {
303 		.name		= DEVICE_NAME,
304 		.of_match_table = aspeed_lpc_ctrl_match,
305 	},
306 	.probe = aspeed_lpc_ctrl_probe,
307 	.remove = aspeed_lpc_ctrl_remove,
308 };
309 
310 module_platform_driver(aspeed_lpc_ctrl_driver);
311 
312 MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
313 MODULE_LICENSE("GPL");
314 MODULE_AUTHOR("Cyril Bur <[email protected]>");
315 MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");
316