1 // SPDX-License-Identifier: GPL-2.0-only 2 /* rtc-ds1343.c 3 * 4 * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible 5 * Real Time Clock 6 * 7 * Author : Raghavendra Chandra Ganiga <[email protected]> 8 * Ankur Srivastava <[email protected]> : DS1343 Nvram Support 9 */ 10 11 #include <linux/init.h> 12 #include <linux/module.h> 13 #include <linux/interrupt.h> 14 #include <linux/device.h> 15 #include <linux/spi/spi.h> 16 #include <linux/regmap.h> 17 #include <linux/rtc.h> 18 #include <linux/bcd.h> 19 #include <linux/pm.h> 20 #include <linux/pm_wakeirq.h> 21 #include <linux/slab.h> 22 23 #define DALLAS_MAXIM_DS1343 0 24 #define DALLAS_MAXIM_DS1344 1 25 26 /* RTC DS1343 Registers */ 27 #define DS1343_SECONDS_REG 0x00 28 #define DS1343_MINUTES_REG 0x01 29 #define DS1343_HOURS_REG 0x02 30 #define DS1343_DAY_REG 0x03 31 #define DS1343_DATE_REG 0x04 32 #define DS1343_MONTH_REG 0x05 33 #define DS1343_YEAR_REG 0x06 34 #define DS1343_ALM0_SEC_REG 0x07 35 #define DS1343_ALM0_MIN_REG 0x08 36 #define DS1343_ALM0_HOUR_REG 0x09 37 #define DS1343_ALM0_DAY_REG 0x0A 38 #define DS1343_ALM1_SEC_REG 0x0B 39 #define DS1343_ALM1_MIN_REG 0x0C 40 #define DS1343_ALM1_HOUR_REG 0x0D 41 #define DS1343_ALM1_DAY_REG 0x0E 42 #define DS1343_CONTROL_REG 0x0F 43 #define DS1343_STATUS_REG 0x10 44 #define DS1343_TRICKLE_REG 0x11 45 #define DS1343_NVRAM 0x20 46 47 #define DS1343_NVRAM_LEN 96 48 49 /* DS1343 Control Registers bits */ 50 #define DS1343_EOSC 0x80 51 #define DS1343_DOSF 0x20 52 #define DS1343_EGFIL 0x10 53 #define DS1343_SQW 0x08 54 #define DS1343_INTCN 0x04 55 #define DS1343_A1IE 0x02 56 #define DS1343_A0IE 0x01 57 58 /* DS1343 Status Registers bits */ 59 #define DS1343_OSF 0x80 60 #define DS1343_IRQF1 0x02 61 #define DS1343_IRQF0 0x01 62 63 /* DS1343 Trickle Charger Registers bits */ 64 #define DS1343_TRICKLE_MAGIC 0xa0 65 #define DS1343_TRICKLE_DS1 0x08 66 #define DS1343_TRICKLE_1K 0x01 67 #define DS1343_TRICKLE_2K 0x02 68 #define DS1343_TRICKLE_4K 0x03 69 70 static const struct spi_device_id ds1343_id[] = { 71 { "ds1343", DALLAS_MAXIM_DS1343 }, 72 { "ds1344", DALLAS_MAXIM_DS1344 }, 73 { } 74 }; 75 MODULE_DEVICE_TABLE(spi, ds1343_id); 76 77 struct ds1343_priv { 78 struct spi_device *spi; 79 struct rtc_device *rtc; 80 struct regmap *map; 81 struct mutex mutex; 82 unsigned int irqen; 83 int irq; 84 int alarm_sec; 85 int alarm_min; 86 int alarm_hour; 87 int alarm_mday; 88 }; 89 90 static ssize_t ds1343_show_glitchfilter(struct device *dev, 91 struct device_attribute *attr, char *buf) 92 { 93 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 94 int glitch_filt_status, data; 95 int res; 96 97 res = regmap_read(priv->map, DS1343_CONTROL_REG, &data); 98 if (res) 99 return res; 100 101 glitch_filt_status = !!(data & DS1343_EGFIL); 102 103 if (glitch_filt_status) 104 return sprintf(buf, "enabled\n"); 105 else 106 return sprintf(buf, "disabled\n"); 107 } 108 109 static ssize_t ds1343_store_glitchfilter(struct device *dev, 110 struct device_attribute *attr, 111 const char *buf, size_t count) 112 { 113 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 114 int data = 0; 115 int res; 116 117 if (strncmp(buf, "enabled", 7) == 0) 118 data = DS1343_EGFIL; 119 else if (strncmp(buf, "disabled", 8)) 120 return -EINVAL; 121 122 res = regmap_update_bits(priv->map, DS1343_CONTROL_REG, 123 DS1343_EGFIL, data); 124 if (res) 125 return res; 126 127 return count; 128 } 129 130 static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter, 131 ds1343_store_glitchfilter); 132 133 static int ds1343_nvram_write(void *priv, unsigned int off, void *val, 134 size_t bytes) 135 { 136 struct ds1343_priv *ds1343 = priv; 137 138 return regmap_bulk_write(ds1343->map, DS1343_NVRAM + off, val, bytes); 139 } 140 141 static int ds1343_nvram_read(void *priv, unsigned int off, void *val, 142 size_t bytes) 143 { 144 struct ds1343_priv *ds1343 = priv; 145 146 return regmap_bulk_read(ds1343->map, DS1343_NVRAM + off, val, bytes); 147 } 148 149 static ssize_t ds1343_show_tricklecharger(struct device *dev, 150 struct device_attribute *attr, char *buf) 151 { 152 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 153 int res, data; 154 char *diodes = "disabled", *resistors = " "; 155 156 res = regmap_read(priv->map, DS1343_TRICKLE_REG, &data); 157 if (res) 158 return res; 159 160 if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) { 161 switch (data & 0x0c) { 162 case DS1343_TRICKLE_DS1: 163 diodes = "one diode,"; 164 break; 165 166 default: 167 diodes = "no diode,"; 168 break; 169 } 170 171 switch (data & 0x03) { 172 case DS1343_TRICKLE_1K: 173 resistors = "1k Ohm"; 174 break; 175 176 case DS1343_TRICKLE_2K: 177 resistors = "2k Ohm"; 178 break; 179 180 case DS1343_TRICKLE_4K: 181 resistors = "4k Ohm"; 182 break; 183 184 default: 185 diodes = "disabled"; 186 break; 187 } 188 } 189 190 return sprintf(buf, "%s %s\n", diodes, resistors); 191 } 192 193 static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL); 194 195 static struct attribute *ds1343_attrs[] = { 196 &dev_attr_glitch_filter.attr, 197 &dev_attr_trickle_charger.attr, 198 NULL 199 }; 200 201 static const struct attribute_group ds1343_attr_group = { 202 .attrs = ds1343_attrs, 203 }; 204 205 static int ds1343_read_time(struct device *dev, struct rtc_time *dt) 206 { 207 struct ds1343_priv *priv = dev_get_drvdata(dev); 208 unsigned char buf[7]; 209 int res; 210 211 res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7); 212 if (res) 213 return res; 214 215 dt->tm_sec = bcd2bin(buf[0]); 216 dt->tm_min = bcd2bin(buf[1]); 217 dt->tm_hour = bcd2bin(buf[2] & 0x3F); 218 dt->tm_wday = bcd2bin(buf[3]) - 1; 219 dt->tm_mday = bcd2bin(buf[4]); 220 dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1; 221 dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */ 222 223 return 0; 224 } 225 226 static int ds1343_set_time(struct device *dev, struct rtc_time *dt) 227 { 228 struct ds1343_priv *priv = dev_get_drvdata(dev); 229 u8 buf[7]; 230 231 buf[0] = bin2bcd(dt->tm_sec); 232 buf[1] = bin2bcd(dt->tm_min); 233 buf[2] = bin2bcd(dt->tm_hour) & 0x3F; 234 buf[3] = bin2bcd(dt->tm_wday + 1); 235 buf[4] = bin2bcd(dt->tm_mday); 236 buf[5] = bin2bcd(dt->tm_mon + 1); 237 buf[6] = bin2bcd(dt->tm_year - 100); 238 239 return regmap_bulk_write(priv->map, DS1343_SECONDS_REG, 240 buf, sizeof(buf)); 241 } 242 243 static int ds1343_update_alarm(struct device *dev) 244 { 245 struct ds1343_priv *priv = dev_get_drvdata(dev); 246 unsigned int control, stat; 247 unsigned char buf[4]; 248 int res = 0; 249 250 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); 251 if (res) 252 return res; 253 254 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 255 if (res) 256 return res; 257 258 control &= ~(DS1343_A0IE); 259 stat &= ~(DS1343_IRQF0); 260 261 res = regmap_write(priv->map, DS1343_CONTROL_REG, control); 262 if (res) 263 return res; 264 265 res = regmap_write(priv->map, DS1343_STATUS_REG, stat); 266 if (res) 267 return res; 268 269 buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ? 270 0x80 : bin2bcd(priv->alarm_sec) & 0x7F; 271 buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ? 272 0x80 : bin2bcd(priv->alarm_min) & 0x7F; 273 buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ? 274 0x80 : bin2bcd(priv->alarm_hour) & 0x3F; 275 buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ? 276 0x80 : bin2bcd(priv->alarm_mday) & 0x7F; 277 278 res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4); 279 if (res) 280 return res; 281 282 if (priv->irqen) { 283 control |= DS1343_A0IE; 284 res = regmap_write(priv->map, DS1343_CONTROL_REG, control); 285 } 286 287 return res; 288 } 289 290 static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 291 { 292 struct ds1343_priv *priv = dev_get_drvdata(dev); 293 int res = 0; 294 unsigned int stat; 295 296 if (priv->irq <= 0) 297 return -EINVAL; 298 299 mutex_lock(&priv->mutex); 300 301 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 302 if (res) 303 goto out; 304 305 alarm->enabled = !!(priv->irqen & RTC_AF); 306 alarm->pending = !!(stat & DS1343_IRQF0); 307 308 alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec; 309 alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min; 310 alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour; 311 alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday; 312 313 out: 314 mutex_unlock(&priv->mutex); 315 return res; 316 } 317 318 static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 319 { 320 struct ds1343_priv *priv = dev_get_drvdata(dev); 321 int res = 0; 322 323 if (priv->irq <= 0) 324 return -EINVAL; 325 326 mutex_lock(&priv->mutex); 327 328 priv->alarm_sec = alarm->time.tm_sec; 329 priv->alarm_min = alarm->time.tm_min; 330 priv->alarm_hour = alarm->time.tm_hour; 331 priv->alarm_mday = alarm->time.tm_mday; 332 333 if (alarm->enabled) 334 priv->irqen |= RTC_AF; 335 336 res = ds1343_update_alarm(dev); 337 338 mutex_unlock(&priv->mutex); 339 340 return res; 341 } 342 343 static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled) 344 { 345 struct ds1343_priv *priv = dev_get_drvdata(dev); 346 int res = 0; 347 348 if (priv->irq <= 0) 349 return -EINVAL; 350 351 mutex_lock(&priv->mutex); 352 353 if (enabled) 354 priv->irqen |= RTC_AF; 355 else 356 priv->irqen &= ~RTC_AF; 357 358 res = ds1343_update_alarm(dev); 359 360 mutex_unlock(&priv->mutex); 361 362 return res; 363 } 364 365 static irqreturn_t ds1343_thread(int irq, void *dev_id) 366 { 367 struct ds1343_priv *priv = dev_id; 368 unsigned int stat, control; 369 int res = 0; 370 371 mutex_lock(&priv->mutex); 372 373 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 374 if (res) 375 goto out; 376 377 if (stat & DS1343_IRQF0) { 378 stat &= ~DS1343_IRQF0; 379 regmap_write(priv->map, DS1343_STATUS_REG, stat); 380 381 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); 382 if (res) 383 goto out; 384 385 control &= ~DS1343_A0IE; 386 regmap_write(priv->map, DS1343_CONTROL_REG, control); 387 388 rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF); 389 } 390 391 out: 392 mutex_unlock(&priv->mutex); 393 return IRQ_HANDLED; 394 } 395 396 static const struct rtc_class_ops ds1343_rtc_ops = { 397 .read_time = ds1343_read_time, 398 .set_time = ds1343_set_time, 399 .read_alarm = ds1343_read_alarm, 400 .set_alarm = ds1343_set_alarm, 401 .alarm_irq_enable = ds1343_alarm_irq_enable, 402 }; 403 404 static int ds1343_probe(struct spi_device *spi) 405 { 406 struct ds1343_priv *priv; 407 struct regmap_config config = { .reg_bits = 8, .val_bits = 8, 408 .write_flag_mask = 0x80, }; 409 unsigned int data; 410 int res; 411 struct nvmem_config nvmem_cfg = { 412 .name = "ds1343-", 413 .word_size = 1, 414 .stride = 1, 415 .size = DS1343_NVRAM_LEN, 416 .reg_read = ds1343_nvram_read, 417 .reg_write = ds1343_nvram_write, 418 }; 419 420 priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL); 421 if (!priv) 422 return -ENOMEM; 423 424 priv->spi = spi; 425 mutex_init(&priv->mutex); 426 427 /* RTC DS1347 works in spi mode 3 and 428 * its chip select is active high 429 */ 430 spi->mode = SPI_MODE_3 | SPI_CS_HIGH; 431 spi->bits_per_word = 8; 432 res = spi_setup(spi); 433 if (res) 434 return res; 435 436 spi_set_drvdata(spi, priv); 437 438 priv->map = devm_regmap_init_spi(spi, &config); 439 440 if (IS_ERR(priv->map)) { 441 dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n"); 442 return PTR_ERR(priv->map); 443 } 444 445 res = regmap_read(priv->map, DS1343_SECONDS_REG, &data); 446 if (res) 447 return res; 448 449 regmap_read(priv->map, DS1343_CONTROL_REG, &data); 450 data |= DS1343_INTCN; 451 data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE); 452 regmap_write(priv->map, DS1343_CONTROL_REG, data); 453 454 regmap_read(priv->map, DS1343_STATUS_REG, &data); 455 data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0); 456 regmap_write(priv->map, DS1343_STATUS_REG, data); 457 458 priv->rtc = devm_rtc_allocate_device(&spi->dev); 459 if (IS_ERR(priv->rtc)) 460 return PTR_ERR(priv->rtc); 461 462 priv->rtc->nvram_old_abi = true; 463 priv->rtc->ops = &ds1343_rtc_ops; 464 priv->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 465 priv->rtc->range_max = RTC_TIMESTAMP_END_2099; 466 467 res = rtc_add_group(priv->rtc, &ds1343_attr_group); 468 if (res) 469 dev_err(&spi->dev, 470 "unable to create sysfs entries for rtc ds1343\n"); 471 472 res = rtc_register_device(priv->rtc); 473 if (res) 474 return res; 475 476 nvmem_cfg.priv = priv; 477 rtc_nvmem_register(priv->rtc, &nvmem_cfg); 478 479 priv->irq = spi->irq; 480 481 if (priv->irq >= 0) { 482 res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL, 483 ds1343_thread, IRQF_ONESHOT, 484 "ds1343", priv); 485 if (res) { 486 priv->irq = -1; 487 dev_err(&spi->dev, 488 "unable to request irq for rtc ds1343\n"); 489 } else { 490 device_init_wakeup(&spi->dev, true); 491 dev_pm_set_wake_irq(&spi->dev, spi->irq); 492 } 493 } 494 495 return 0; 496 } 497 498 static int ds1343_remove(struct spi_device *spi) 499 { 500 struct ds1343_priv *priv = spi_get_drvdata(spi); 501 502 if (spi->irq) { 503 mutex_lock(&priv->mutex); 504 priv->irqen &= ~RTC_AF; 505 mutex_unlock(&priv->mutex); 506 507 dev_pm_clear_wake_irq(&spi->dev); 508 device_init_wakeup(&spi->dev, false); 509 devm_free_irq(&spi->dev, spi->irq, priv); 510 } 511 512 spi_set_drvdata(spi, NULL); 513 514 return 0; 515 } 516 517 #ifdef CONFIG_PM_SLEEP 518 519 static int ds1343_suspend(struct device *dev) 520 { 521 struct spi_device *spi = to_spi_device(dev); 522 523 if (spi->irq >= 0 && device_may_wakeup(dev)) 524 enable_irq_wake(spi->irq); 525 526 return 0; 527 } 528 529 static int ds1343_resume(struct device *dev) 530 { 531 struct spi_device *spi = to_spi_device(dev); 532 533 if (spi->irq >= 0 && device_may_wakeup(dev)) 534 disable_irq_wake(spi->irq); 535 536 return 0; 537 } 538 539 #endif 540 541 static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume); 542 543 static struct spi_driver ds1343_driver = { 544 .driver = { 545 .name = "ds1343", 546 .pm = &ds1343_pm, 547 }, 548 .probe = ds1343_probe, 549 .remove = ds1343_remove, 550 .id_table = ds1343_id, 551 }; 552 553 module_spi_driver(ds1343_driver); 554 555 MODULE_DESCRIPTION("DS1343 RTC SPI Driver"); 556 MODULE_AUTHOR("Raghavendra Chandra Ganiga <[email protected]>," 557 "Ankur Srivastava <[email protected]>"); 558 MODULE_LICENSE("GPL v2"); 559