1 // SPDX-License-Identifier: GPL-2.0-only 2 /* rtc-ds1343.c 3 * 4 * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible 5 * Real Time Clock 6 * 7 * Author : Raghavendra Chandra Ganiga <[email protected]> 8 * Ankur Srivastava <[email protected]> : DS1343 Nvram Support 9 */ 10 11 #include <linux/init.h> 12 #include <linux/module.h> 13 #include <linux/interrupt.h> 14 #include <linux/device.h> 15 #include <linux/spi/spi.h> 16 #include <linux/regmap.h> 17 #include <linux/rtc.h> 18 #include <linux/bcd.h> 19 #include <linux/pm.h> 20 #include <linux/pm_wakeirq.h> 21 #include <linux/slab.h> 22 23 #define DALLAS_MAXIM_DS1343 0 24 #define DALLAS_MAXIM_DS1344 1 25 26 /* RTC DS1343 Registers */ 27 #define DS1343_SECONDS_REG 0x00 28 #define DS1343_MINUTES_REG 0x01 29 #define DS1343_HOURS_REG 0x02 30 #define DS1343_DAY_REG 0x03 31 #define DS1343_DATE_REG 0x04 32 #define DS1343_MONTH_REG 0x05 33 #define DS1343_YEAR_REG 0x06 34 #define DS1343_ALM0_SEC_REG 0x07 35 #define DS1343_ALM0_MIN_REG 0x08 36 #define DS1343_ALM0_HOUR_REG 0x09 37 #define DS1343_ALM0_DAY_REG 0x0A 38 #define DS1343_ALM1_SEC_REG 0x0B 39 #define DS1343_ALM1_MIN_REG 0x0C 40 #define DS1343_ALM1_HOUR_REG 0x0D 41 #define DS1343_ALM1_DAY_REG 0x0E 42 #define DS1343_CONTROL_REG 0x0F 43 #define DS1343_STATUS_REG 0x10 44 #define DS1343_TRICKLE_REG 0x11 45 #define DS1343_NVRAM 0x20 46 47 #define DS1343_NVRAM_LEN 96 48 49 /* DS1343 Control Registers bits */ 50 #define DS1343_EOSC 0x80 51 #define DS1343_DOSF 0x20 52 #define DS1343_EGFIL 0x10 53 #define DS1343_SQW 0x08 54 #define DS1343_INTCN 0x04 55 #define DS1343_A1IE 0x02 56 #define DS1343_A0IE 0x01 57 58 /* DS1343 Status Registers bits */ 59 #define DS1343_OSF 0x80 60 #define DS1343_IRQF1 0x02 61 #define DS1343_IRQF0 0x01 62 63 /* DS1343 Trickle Charger Registers bits */ 64 #define DS1343_TRICKLE_MAGIC 0xa0 65 #define DS1343_TRICKLE_DS1 0x08 66 #define DS1343_TRICKLE_1K 0x01 67 #define DS1343_TRICKLE_2K 0x02 68 #define DS1343_TRICKLE_4K 0x03 69 70 static const struct spi_device_id ds1343_id[] = { 71 { "ds1343", DALLAS_MAXIM_DS1343 }, 72 { "ds1344", DALLAS_MAXIM_DS1344 }, 73 { } 74 }; 75 MODULE_DEVICE_TABLE(spi, ds1343_id); 76 77 struct ds1343_priv { 78 struct spi_device *spi; 79 struct rtc_device *rtc; 80 struct regmap *map; 81 struct mutex mutex; 82 unsigned int irqen; 83 int irq; 84 int alarm_sec; 85 int alarm_min; 86 int alarm_hour; 87 int alarm_mday; 88 }; 89 90 static ssize_t ds1343_show_glitchfilter(struct device *dev, 91 struct device_attribute *attr, char *buf) 92 { 93 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 94 int glitch_filt_status, data; 95 96 regmap_read(priv->map, DS1343_CONTROL_REG, &data); 97 98 glitch_filt_status = !!(data & DS1343_EGFIL); 99 100 if (glitch_filt_status) 101 return sprintf(buf, "enabled\n"); 102 else 103 return sprintf(buf, "disabled\n"); 104 } 105 106 static ssize_t ds1343_store_glitchfilter(struct device *dev, 107 struct device_attribute *attr, 108 const char *buf, size_t count) 109 { 110 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 111 int data = 0; 112 int res; 113 114 if (strncmp(buf, "enabled", 7) == 0) 115 data = DS1343_EGFIL; 116 else if (strncmp(buf, "disabled", 8)) 117 return -EINVAL; 118 119 res = regmap_update_bits(priv->map, DS1343_CONTROL_REG, 120 DS1343_EGFIL, data); 121 if (res) 122 return res; 123 124 return count; 125 } 126 127 static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter, 128 ds1343_store_glitchfilter); 129 130 static int ds1343_nvram_write(void *priv, unsigned int off, void *val, 131 size_t bytes) 132 { 133 struct ds1343_priv *ds1343 = priv; 134 135 return regmap_bulk_write(ds1343->map, DS1343_NVRAM + off, val, bytes); 136 } 137 138 static int ds1343_nvram_read(void *priv, unsigned int off, void *val, 139 size_t bytes) 140 { 141 struct ds1343_priv *ds1343 = priv; 142 143 return regmap_bulk_read(ds1343->map, DS1343_NVRAM + off, val, bytes); 144 } 145 146 static ssize_t ds1343_show_tricklecharger(struct device *dev, 147 struct device_attribute *attr, char *buf) 148 { 149 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 150 int data; 151 char *diodes = "disabled", *resistors = " "; 152 153 regmap_read(priv->map, DS1343_TRICKLE_REG, &data); 154 155 if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) { 156 switch (data & 0x0c) { 157 case DS1343_TRICKLE_DS1: 158 diodes = "one diode,"; 159 break; 160 161 default: 162 diodes = "no diode,"; 163 break; 164 } 165 166 switch (data & 0x03) { 167 case DS1343_TRICKLE_1K: 168 resistors = "1k Ohm"; 169 break; 170 171 case DS1343_TRICKLE_2K: 172 resistors = "2k Ohm"; 173 break; 174 175 case DS1343_TRICKLE_4K: 176 resistors = "4k Ohm"; 177 break; 178 179 default: 180 diodes = "disabled"; 181 break; 182 } 183 } 184 185 return sprintf(buf, "%s %s\n", diodes, resistors); 186 } 187 188 static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL); 189 190 static struct attribute *ds1343_attrs[] = { 191 &dev_attr_glitch_filter.attr, 192 &dev_attr_trickle_charger.attr, 193 NULL 194 }; 195 196 static const struct attribute_group ds1343_attr_group = { 197 .attrs = ds1343_attrs, 198 }; 199 200 static int ds1343_read_time(struct device *dev, struct rtc_time *dt) 201 { 202 struct ds1343_priv *priv = dev_get_drvdata(dev); 203 unsigned char buf[7]; 204 int res; 205 206 res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7); 207 if (res) 208 return res; 209 210 dt->tm_sec = bcd2bin(buf[0]); 211 dt->tm_min = bcd2bin(buf[1]); 212 dt->tm_hour = bcd2bin(buf[2] & 0x3F); 213 dt->tm_wday = bcd2bin(buf[3]) - 1; 214 dt->tm_mday = bcd2bin(buf[4]); 215 dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1; 216 dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */ 217 218 return 0; 219 } 220 221 static int ds1343_set_time(struct device *dev, struct rtc_time *dt) 222 { 223 struct ds1343_priv *priv = dev_get_drvdata(dev); 224 u8 buf[7]; 225 226 buf[0] = bin2bcd(dt->tm_sec); 227 buf[1] = bin2bcd(dt->tm_min); 228 buf[2] = bin2bcd(dt->tm_hour) & 0x3F; 229 buf[3] = bin2bcd(dt->tm_wday + 1); 230 buf[4] = bin2bcd(dt->tm_mday); 231 buf[5] = bin2bcd(dt->tm_mon + 1); 232 buf[6] = bin2bcd(dt->tm_year - 100); 233 234 return regmap_bulk_write(priv->map, DS1343_SECONDS_REG, 235 buf, sizeof(buf)); 236 } 237 238 static int ds1343_update_alarm(struct device *dev) 239 { 240 struct ds1343_priv *priv = dev_get_drvdata(dev); 241 unsigned int control, stat; 242 unsigned char buf[4]; 243 int res = 0; 244 245 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); 246 if (res) 247 return res; 248 249 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 250 if (res) 251 return res; 252 253 control &= ~(DS1343_A0IE); 254 stat &= ~(DS1343_IRQF0); 255 256 res = regmap_write(priv->map, DS1343_CONTROL_REG, control); 257 if (res) 258 return res; 259 260 res = regmap_write(priv->map, DS1343_STATUS_REG, stat); 261 if (res) 262 return res; 263 264 buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ? 265 0x80 : bin2bcd(priv->alarm_sec) & 0x7F; 266 buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ? 267 0x80 : bin2bcd(priv->alarm_min) & 0x7F; 268 buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ? 269 0x80 : bin2bcd(priv->alarm_hour) & 0x3F; 270 buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ? 271 0x80 : bin2bcd(priv->alarm_mday) & 0x7F; 272 273 res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4); 274 if (res) 275 return res; 276 277 if (priv->irqen) { 278 control |= DS1343_A0IE; 279 res = regmap_write(priv->map, DS1343_CONTROL_REG, control); 280 } 281 282 return res; 283 } 284 285 static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 286 { 287 struct ds1343_priv *priv = dev_get_drvdata(dev); 288 int res = 0; 289 unsigned int stat; 290 291 if (priv->irq <= 0) 292 return -EINVAL; 293 294 mutex_lock(&priv->mutex); 295 296 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 297 if (res) 298 goto out; 299 300 alarm->enabled = !!(priv->irqen & RTC_AF); 301 alarm->pending = !!(stat & DS1343_IRQF0); 302 303 alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec; 304 alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min; 305 alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour; 306 alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday; 307 308 out: 309 mutex_unlock(&priv->mutex); 310 return res; 311 } 312 313 static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 314 { 315 struct ds1343_priv *priv = dev_get_drvdata(dev); 316 int res = 0; 317 318 if (priv->irq <= 0) 319 return -EINVAL; 320 321 mutex_lock(&priv->mutex); 322 323 priv->alarm_sec = alarm->time.tm_sec; 324 priv->alarm_min = alarm->time.tm_min; 325 priv->alarm_hour = alarm->time.tm_hour; 326 priv->alarm_mday = alarm->time.tm_mday; 327 328 if (alarm->enabled) 329 priv->irqen |= RTC_AF; 330 331 res = ds1343_update_alarm(dev); 332 333 mutex_unlock(&priv->mutex); 334 335 return res; 336 } 337 338 static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled) 339 { 340 struct ds1343_priv *priv = dev_get_drvdata(dev); 341 int res = 0; 342 343 if (priv->irq <= 0) 344 return -EINVAL; 345 346 mutex_lock(&priv->mutex); 347 348 if (enabled) 349 priv->irqen |= RTC_AF; 350 else 351 priv->irqen &= ~RTC_AF; 352 353 res = ds1343_update_alarm(dev); 354 355 mutex_unlock(&priv->mutex); 356 357 return res; 358 } 359 360 static irqreturn_t ds1343_thread(int irq, void *dev_id) 361 { 362 struct ds1343_priv *priv = dev_id; 363 unsigned int stat, control; 364 int res = 0; 365 366 mutex_lock(&priv->mutex); 367 368 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 369 if (res) 370 goto out; 371 372 if (stat & DS1343_IRQF0) { 373 stat &= ~DS1343_IRQF0; 374 regmap_write(priv->map, DS1343_STATUS_REG, stat); 375 376 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); 377 if (res) 378 goto out; 379 380 control &= ~DS1343_A0IE; 381 regmap_write(priv->map, DS1343_CONTROL_REG, control); 382 383 rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF); 384 } 385 386 out: 387 mutex_unlock(&priv->mutex); 388 return IRQ_HANDLED; 389 } 390 391 static const struct rtc_class_ops ds1343_rtc_ops = { 392 .read_time = ds1343_read_time, 393 .set_time = ds1343_set_time, 394 .read_alarm = ds1343_read_alarm, 395 .set_alarm = ds1343_set_alarm, 396 .alarm_irq_enable = ds1343_alarm_irq_enable, 397 }; 398 399 static int ds1343_probe(struct spi_device *spi) 400 { 401 struct ds1343_priv *priv; 402 struct regmap_config config = { .reg_bits = 8, .val_bits = 8, 403 .write_flag_mask = 0x80, }; 404 unsigned int data; 405 int res; 406 struct nvmem_config nvmem_cfg = { 407 .name = "ds1343-", 408 .word_size = 1, 409 .stride = 1, 410 .size = DS1343_NVRAM_LEN, 411 .reg_read = ds1343_nvram_read, 412 .reg_write = ds1343_nvram_write, 413 }; 414 415 priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL); 416 if (!priv) 417 return -ENOMEM; 418 419 priv->spi = spi; 420 mutex_init(&priv->mutex); 421 422 /* RTC DS1347 works in spi mode 3 and 423 * its chip select is active high 424 */ 425 spi->mode = SPI_MODE_3 | SPI_CS_HIGH; 426 spi->bits_per_word = 8; 427 res = spi_setup(spi); 428 if (res) 429 return res; 430 431 spi_set_drvdata(spi, priv); 432 433 priv->map = devm_regmap_init_spi(spi, &config); 434 435 if (IS_ERR(priv->map)) { 436 dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n"); 437 return PTR_ERR(priv->map); 438 } 439 440 res = regmap_read(priv->map, DS1343_SECONDS_REG, &data); 441 if (res) 442 return res; 443 444 regmap_read(priv->map, DS1343_CONTROL_REG, &data); 445 data |= DS1343_INTCN; 446 data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE); 447 regmap_write(priv->map, DS1343_CONTROL_REG, data); 448 449 regmap_read(priv->map, DS1343_STATUS_REG, &data); 450 data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0); 451 regmap_write(priv->map, DS1343_STATUS_REG, data); 452 453 priv->rtc = devm_rtc_allocate_device(&spi->dev); 454 if (IS_ERR(priv->rtc)) 455 return PTR_ERR(priv->rtc); 456 457 priv->rtc->nvram_old_abi = true; 458 priv->rtc->ops = &ds1343_rtc_ops; 459 priv->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 460 priv->rtc->range_max = RTC_TIMESTAMP_END_2099; 461 462 res = rtc_add_group(priv->rtc, &ds1343_attr_group); 463 if (res) 464 dev_err(&spi->dev, 465 "unable to create sysfs entries for rtc ds1343\n"); 466 467 res = rtc_register_device(priv->rtc); 468 if (res) 469 return res; 470 471 nvmem_cfg.priv = priv; 472 rtc_nvmem_register(priv->rtc, &nvmem_cfg); 473 474 priv->irq = spi->irq; 475 476 if (priv->irq >= 0) { 477 res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL, 478 ds1343_thread, IRQF_ONESHOT, 479 "ds1343", priv); 480 if (res) { 481 priv->irq = -1; 482 dev_err(&spi->dev, 483 "unable to request irq for rtc ds1343\n"); 484 } else { 485 device_init_wakeup(&spi->dev, true); 486 dev_pm_set_wake_irq(&spi->dev, spi->irq); 487 } 488 } 489 490 return 0; 491 } 492 493 static int ds1343_remove(struct spi_device *spi) 494 { 495 struct ds1343_priv *priv = spi_get_drvdata(spi); 496 497 if (spi->irq) { 498 mutex_lock(&priv->mutex); 499 priv->irqen &= ~RTC_AF; 500 mutex_unlock(&priv->mutex); 501 502 dev_pm_clear_wake_irq(&spi->dev); 503 device_init_wakeup(&spi->dev, false); 504 devm_free_irq(&spi->dev, spi->irq, priv); 505 } 506 507 spi_set_drvdata(spi, NULL); 508 509 return 0; 510 } 511 512 #ifdef CONFIG_PM_SLEEP 513 514 static int ds1343_suspend(struct device *dev) 515 { 516 struct spi_device *spi = to_spi_device(dev); 517 518 if (spi->irq >= 0 && device_may_wakeup(dev)) 519 enable_irq_wake(spi->irq); 520 521 return 0; 522 } 523 524 static int ds1343_resume(struct device *dev) 525 { 526 struct spi_device *spi = to_spi_device(dev); 527 528 if (spi->irq >= 0 && device_may_wakeup(dev)) 529 disable_irq_wake(spi->irq); 530 531 return 0; 532 } 533 534 #endif 535 536 static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume); 537 538 static struct spi_driver ds1343_driver = { 539 .driver = { 540 .name = "ds1343", 541 .pm = &ds1343_pm, 542 }, 543 .probe = ds1343_probe, 544 .remove = ds1343_remove, 545 .id_table = ds1343_id, 546 }; 547 548 module_spi_driver(ds1343_driver); 549 550 MODULE_DESCRIPTION("DS1343 RTC SPI Driver"); 551 MODULE_AUTHOR("Raghavendra Chandra Ganiga <[email protected]>," 552 "Ankur Srivastava <[email protected]>"); 553 MODULE_LICENSE("GPL v2"); 554