1 // SPDX-License-Identifier: GPL-2.0-only 2 /* rtc-ds1343.c 3 * 4 * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible 5 * Real Time Clock 6 * 7 * Author : Raghavendra Chandra Ganiga <[email protected]> 8 * Ankur Srivastava <[email protected]> : DS1343 Nvram Support 9 */ 10 11 #include <linux/init.h> 12 #include <linux/module.h> 13 #include <linux/interrupt.h> 14 #include <linux/device.h> 15 #include <linux/spi/spi.h> 16 #include <linux/regmap.h> 17 #include <linux/rtc.h> 18 #include <linux/bcd.h> 19 #include <linux/pm.h> 20 #include <linux/pm_wakeirq.h> 21 #include <linux/slab.h> 22 23 #define DALLAS_MAXIM_DS1343 0 24 #define DALLAS_MAXIM_DS1344 1 25 26 /* RTC DS1343 Registers */ 27 #define DS1343_SECONDS_REG 0x00 28 #define DS1343_MINUTES_REG 0x01 29 #define DS1343_HOURS_REG 0x02 30 #define DS1343_DAY_REG 0x03 31 #define DS1343_DATE_REG 0x04 32 #define DS1343_MONTH_REG 0x05 33 #define DS1343_YEAR_REG 0x06 34 #define DS1343_ALM0_SEC_REG 0x07 35 #define DS1343_ALM0_MIN_REG 0x08 36 #define DS1343_ALM0_HOUR_REG 0x09 37 #define DS1343_ALM0_DAY_REG 0x0A 38 #define DS1343_ALM1_SEC_REG 0x0B 39 #define DS1343_ALM1_MIN_REG 0x0C 40 #define DS1343_ALM1_HOUR_REG 0x0D 41 #define DS1343_ALM1_DAY_REG 0x0E 42 #define DS1343_CONTROL_REG 0x0F 43 #define DS1343_STATUS_REG 0x10 44 #define DS1343_TRICKLE_REG 0x11 45 #define DS1343_NVRAM 0x20 46 47 #define DS1343_NVRAM_LEN 96 48 49 /* DS1343 Control Registers bits */ 50 #define DS1343_EOSC 0x80 51 #define DS1343_DOSF 0x20 52 #define DS1343_EGFIL 0x10 53 #define DS1343_SQW 0x08 54 #define DS1343_INTCN 0x04 55 #define DS1343_A1IE 0x02 56 #define DS1343_A0IE 0x01 57 58 /* DS1343 Status Registers bits */ 59 #define DS1343_OSF 0x80 60 #define DS1343_IRQF1 0x02 61 #define DS1343_IRQF0 0x01 62 63 /* DS1343 Trickle Charger Registers bits */ 64 #define DS1343_TRICKLE_MAGIC 0xa0 65 #define DS1343_TRICKLE_DS1 0x08 66 #define DS1343_TRICKLE_1K 0x01 67 #define DS1343_TRICKLE_2K 0x02 68 #define DS1343_TRICKLE_4K 0x03 69 70 static const struct spi_device_id ds1343_id[] = { 71 { "ds1343", DALLAS_MAXIM_DS1343 }, 72 { "ds1344", DALLAS_MAXIM_DS1344 }, 73 { } 74 }; 75 MODULE_DEVICE_TABLE(spi, ds1343_id); 76 77 struct ds1343_priv { 78 struct spi_device *spi; 79 struct rtc_device *rtc; 80 struct regmap *map; 81 unsigned int irqen; 82 int irq; 83 int alarm_sec; 84 int alarm_min; 85 int alarm_hour; 86 int alarm_mday; 87 }; 88 89 static ssize_t ds1343_show_glitchfilter(struct device *dev, 90 struct device_attribute *attr, char *buf) 91 { 92 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 93 int glitch_filt_status, data; 94 int res; 95 96 res = regmap_read(priv->map, DS1343_CONTROL_REG, &data); 97 if (res) 98 return res; 99 100 glitch_filt_status = !!(data & DS1343_EGFIL); 101 102 if (glitch_filt_status) 103 return sprintf(buf, "enabled\n"); 104 else 105 return sprintf(buf, "disabled\n"); 106 } 107 108 static ssize_t ds1343_store_glitchfilter(struct device *dev, 109 struct device_attribute *attr, 110 const char *buf, size_t count) 111 { 112 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 113 int data = 0; 114 int res; 115 116 if (strncmp(buf, "enabled", 7) == 0) 117 data = DS1343_EGFIL; 118 else if (strncmp(buf, "disabled", 8)) 119 return -EINVAL; 120 121 res = regmap_update_bits(priv->map, DS1343_CONTROL_REG, 122 DS1343_EGFIL, data); 123 if (res) 124 return res; 125 126 return count; 127 } 128 129 static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter, 130 ds1343_store_glitchfilter); 131 132 static int ds1343_nvram_write(void *priv, unsigned int off, void *val, 133 size_t bytes) 134 { 135 struct ds1343_priv *ds1343 = priv; 136 137 return regmap_bulk_write(ds1343->map, DS1343_NVRAM + off, val, bytes); 138 } 139 140 static int ds1343_nvram_read(void *priv, unsigned int off, void *val, 141 size_t bytes) 142 { 143 struct ds1343_priv *ds1343 = priv; 144 145 return regmap_bulk_read(ds1343->map, DS1343_NVRAM + off, val, bytes); 146 } 147 148 static ssize_t ds1343_show_tricklecharger(struct device *dev, 149 struct device_attribute *attr, char *buf) 150 { 151 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 152 int res, data; 153 char *diodes = "disabled", *resistors = " "; 154 155 res = regmap_read(priv->map, DS1343_TRICKLE_REG, &data); 156 if (res) 157 return res; 158 159 if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) { 160 switch (data & 0x0c) { 161 case DS1343_TRICKLE_DS1: 162 diodes = "one diode,"; 163 break; 164 165 default: 166 diodes = "no diode,"; 167 break; 168 } 169 170 switch (data & 0x03) { 171 case DS1343_TRICKLE_1K: 172 resistors = "1k Ohm"; 173 break; 174 175 case DS1343_TRICKLE_2K: 176 resistors = "2k Ohm"; 177 break; 178 179 case DS1343_TRICKLE_4K: 180 resistors = "4k Ohm"; 181 break; 182 183 default: 184 diodes = "disabled"; 185 break; 186 } 187 } 188 189 return sprintf(buf, "%s %s\n", diodes, resistors); 190 } 191 192 static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL); 193 194 static struct attribute *ds1343_attrs[] = { 195 &dev_attr_glitch_filter.attr, 196 &dev_attr_trickle_charger.attr, 197 NULL 198 }; 199 200 static const struct attribute_group ds1343_attr_group = { 201 .attrs = ds1343_attrs, 202 }; 203 204 static int ds1343_read_time(struct device *dev, struct rtc_time *dt) 205 { 206 struct ds1343_priv *priv = dev_get_drvdata(dev); 207 unsigned char buf[7]; 208 int res; 209 210 res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7); 211 if (res) 212 return res; 213 214 dt->tm_sec = bcd2bin(buf[0]); 215 dt->tm_min = bcd2bin(buf[1]); 216 dt->tm_hour = bcd2bin(buf[2] & 0x3F); 217 dt->tm_wday = bcd2bin(buf[3]) - 1; 218 dt->tm_mday = bcd2bin(buf[4]); 219 dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1; 220 dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */ 221 222 return 0; 223 } 224 225 static int ds1343_set_time(struct device *dev, struct rtc_time *dt) 226 { 227 struct ds1343_priv *priv = dev_get_drvdata(dev); 228 u8 buf[7]; 229 230 buf[0] = bin2bcd(dt->tm_sec); 231 buf[1] = bin2bcd(dt->tm_min); 232 buf[2] = bin2bcd(dt->tm_hour) & 0x3F; 233 buf[3] = bin2bcd(dt->tm_wday + 1); 234 buf[4] = bin2bcd(dt->tm_mday); 235 buf[5] = bin2bcd(dt->tm_mon + 1); 236 buf[6] = bin2bcd(dt->tm_year - 100); 237 238 return regmap_bulk_write(priv->map, DS1343_SECONDS_REG, 239 buf, sizeof(buf)); 240 } 241 242 static int ds1343_update_alarm(struct device *dev) 243 { 244 struct ds1343_priv *priv = dev_get_drvdata(dev); 245 unsigned int control, stat; 246 unsigned char buf[4]; 247 int res = 0; 248 249 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); 250 if (res) 251 return res; 252 253 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 254 if (res) 255 return res; 256 257 control &= ~(DS1343_A0IE); 258 stat &= ~(DS1343_IRQF0); 259 260 res = regmap_write(priv->map, DS1343_CONTROL_REG, control); 261 if (res) 262 return res; 263 264 res = regmap_write(priv->map, DS1343_STATUS_REG, stat); 265 if (res) 266 return res; 267 268 buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ? 269 0x80 : bin2bcd(priv->alarm_sec) & 0x7F; 270 buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ? 271 0x80 : bin2bcd(priv->alarm_min) & 0x7F; 272 buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ? 273 0x80 : bin2bcd(priv->alarm_hour) & 0x3F; 274 buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ? 275 0x80 : bin2bcd(priv->alarm_mday) & 0x7F; 276 277 res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4); 278 if (res) 279 return res; 280 281 if (priv->irqen) { 282 control |= DS1343_A0IE; 283 res = regmap_write(priv->map, DS1343_CONTROL_REG, control); 284 } 285 286 return res; 287 } 288 289 static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 290 { 291 struct ds1343_priv *priv = dev_get_drvdata(dev); 292 int res; 293 unsigned int stat; 294 295 if (priv->irq <= 0) 296 return -EINVAL; 297 298 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 299 if (res) 300 return res; 301 302 alarm->enabled = !!(priv->irqen & RTC_AF); 303 alarm->pending = !!(stat & DS1343_IRQF0); 304 305 alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec; 306 alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min; 307 alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour; 308 alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday; 309 310 return 0; 311 } 312 313 static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 314 { 315 struct ds1343_priv *priv = dev_get_drvdata(dev); 316 317 if (priv->irq <= 0) 318 return -EINVAL; 319 320 priv->alarm_sec = alarm->time.tm_sec; 321 priv->alarm_min = alarm->time.tm_min; 322 priv->alarm_hour = alarm->time.tm_hour; 323 priv->alarm_mday = alarm->time.tm_mday; 324 325 if (alarm->enabled) 326 priv->irqen |= RTC_AF; 327 328 return ds1343_update_alarm(dev); 329 } 330 331 static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled) 332 { 333 struct ds1343_priv *priv = dev_get_drvdata(dev); 334 335 if (priv->irq <= 0) 336 return -EINVAL; 337 338 if (enabled) 339 priv->irqen |= RTC_AF; 340 else 341 priv->irqen &= ~RTC_AF; 342 343 return ds1343_update_alarm(dev); 344 } 345 346 static irqreturn_t ds1343_thread(int irq, void *dev_id) 347 { 348 struct ds1343_priv *priv = dev_id; 349 unsigned int stat, control; 350 int res = 0; 351 352 rtc_lock(priv->rtc); 353 354 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 355 if (res) 356 goto out; 357 358 if (stat & DS1343_IRQF0) { 359 stat &= ~DS1343_IRQF0; 360 regmap_write(priv->map, DS1343_STATUS_REG, stat); 361 362 res = regmap_read(priv->map, DS1343_CONTROL_REG, &control); 363 if (res) 364 goto out; 365 366 control &= ~DS1343_A0IE; 367 regmap_write(priv->map, DS1343_CONTROL_REG, control); 368 369 rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF); 370 } 371 372 out: 373 rtc_unlock(priv->rtc); 374 return IRQ_HANDLED; 375 } 376 377 static const struct rtc_class_ops ds1343_rtc_ops = { 378 .read_time = ds1343_read_time, 379 .set_time = ds1343_set_time, 380 .read_alarm = ds1343_read_alarm, 381 .set_alarm = ds1343_set_alarm, 382 .alarm_irq_enable = ds1343_alarm_irq_enable, 383 }; 384 385 static int ds1343_probe(struct spi_device *spi) 386 { 387 struct ds1343_priv *priv; 388 struct regmap_config config = { .reg_bits = 8, .val_bits = 8, 389 .write_flag_mask = 0x80, }; 390 unsigned int data; 391 int res; 392 struct nvmem_config nvmem_cfg = { 393 .name = "ds1343-", 394 .word_size = 1, 395 .stride = 1, 396 .size = DS1343_NVRAM_LEN, 397 .reg_read = ds1343_nvram_read, 398 .reg_write = ds1343_nvram_write, 399 }; 400 401 priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL); 402 if (!priv) 403 return -ENOMEM; 404 405 priv->spi = spi; 406 407 /* RTC DS1347 works in spi mode 3 and 408 * its chip select is active high 409 */ 410 spi->mode = SPI_MODE_3 | SPI_CS_HIGH; 411 spi->bits_per_word = 8; 412 res = spi_setup(spi); 413 if (res) 414 return res; 415 416 spi_set_drvdata(spi, priv); 417 418 priv->map = devm_regmap_init_spi(spi, &config); 419 420 if (IS_ERR(priv->map)) { 421 dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n"); 422 return PTR_ERR(priv->map); 423 } 424 425 res = regmap_read(priv->map, DS1343_SECONDS_REG, &data); 426 if (res) 427 return res; 428 429 regmap_read(priv->map, DS1343_CONTROL_REG, &data); 430 data |= DS1343_INTCN; 431 data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE); 432 regmap_write(priv->map, DS1343_CONTROL_REG, data); 433 434 regmap_read(priv->map, DS1343_STATUS_REG, &data); 435 data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0); 436 regmap_write(priv->map, DS1343_STATUS_REG, data); 437 438 priv->rtc = devm_rtc_allocate_device(&spi->dev); 439 if (IS_ERR(priv->rtc)) 440 return PTR_ERR(priv->rtc); 441 442 priv->rtc->nvram_old_abi = true; 443 priv->rtc->ops = &ds1343_rtc_ops; 444 priv->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 445 priv->rtc->range_max = RTC_TIMESTAMP_END_2099; 446 447 res = rtc_add_group(priv->rtc, &ds1343_attr_group); 448 if (res) 449 dev_err(&spi->dev, 450 "unable to create sysfs entries for rtc ds1343\n"); 451 452 res = rtc_register_device(priv->rtc); 453 if (res) 454 return res; 455 456 nvmem_cfg.priv = priv; 457 rtc_nvmem_register(priv->rtc, &nvmem_cfg); 458 459 priv->irq = spi->irq; 460 461 if (priv->irq >= 0) { 462 res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL, 463 ds1343_thread, IRQF_ONESHOT, 464 "ds1343", priv); 465 if (res) { 466 priv->irq = -1; 467 dev_err(&spi->dev, 468 "unable to request irq for rtc ds1343\n"); 469 } else { 470 device_init_wakeup(&spi->dev, true); 471 dev_pm_set_wake_irq(&spi->dev, spi->irq); 472 } 473 } 474 475 return 0; 476 } 477 478 static int ds1343_remove(struct spi_device *spi) 479 { 480 struct ds1343_priv *priv = spi_get_drvdata(spi); 481 482 if (spi->irq) { 483 priv->irqen &= ~RTC_AF; 484 485 dev_pm_clear_wake_irq(&spi->dev); 486 device_init_wakeup(&spi->dev, false); 487 devm_free_irq(&spi->dev, spi->irq, priv); 488 } 489 490 spi_set_drvdata(spi, NULL); 491 492 return 0; 493 } 494 495 #ifdef CONFIG_PM_SLEEP 496 497 static int ds1343_suspend(struct device *dev) 498 { 499 struct spi_device *spi = to_spi_device(dev); 500 501 if (spi->irq >= 0 && device_may_wakeup(dev)) 502 enable_irq_wake(spi->irq); 503 504 return 0; 505 } 506 507 static int ds1343_resume(struct device *dev) 508 { 509 struct spi_device *spi = to_spi_device(dev); 510 511 if (spi->irq >= 0 && device_may_wakeup(dev)) 512 disable_irq_wake(spi->irq); 513 514 return 0; 515 } 516 517 #endif 518 519 static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume); 520 521 static struct spi_driver ds1343_driver = { 522 .driver = { 523 .name = "ds1343", 524 .pm = &ds1343_pm, 525 }, 526 .probe = ds1343_probe, 527 .remove = ds1343_remove, 528 .id_table = ds1343_id, 529 }; 530 531 module_spi_driver(ds1343_driver); 532 533 MODULE_DESCRIPTION("DS1343 RTC SPI Driver"); 534 MODULE_AUTHOR("Raghavendra Chandra Ganiga <[email protected]>," 535 "Ankur Srivastava <[email protected]>"); 536 MODULE_LICENSE("GPL v2"); 537