1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2015, Google Inc. 5 */ 6 7 #ifndef __PHY_TEGRA_XUSB_H 8 #define __PHY_TEGRA_XUSB_H 9 10 #include <linux/io.h> 11 #include <linux/mutex.h> 12 #include <linux/workqueue.h> 13 14 #include <linux/usb/otg.h> 15 #include <linux/usb/role.h> 16 17 /* legacy entry points for backwards-compatibility */ 18 int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev); 19 int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev); 20 21 struct phy; 22 struct phy_provider; 23 struct platform_device; 24 struct regulator; 25 26 /* 27 * lanes 28 */ 29 struct tegra_xusb_lane_soc { 30 const char *name; 31 32 unsigned int offset; 33 unsigned int shift; 34 unsigned int mask; 35 36 const char * const *funcs; 37 unsigned int num_funcs; 38 }; 39 40 struct tegra_xusb_lane { 41 const struct tegra_xusb_lane_soc *soc; 42 struct tegra_xusb_pad *pad; 43 struct device_node *np; 44 struct list_head list; 45 unsigned int function; 46 unsigned int index; 47 }; 48 49 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, 50 struct device_node *np); 51 52 struct tegra_xusb_usb3_lane { 53 struct tegra_xusb_lane base; 54 }; 55 56 static inline struct tegra_xusb_usb3_lane * 57 to_usb3_lane(struct tegra_xusb_lane *lane) 58 { 59 return container_of(lane, struct tegra_xusb_usb3_lane, base); 60 } 61 62 struct tegra_xusb_usb2_lane { 63 struct tegra_xusb_lane base; 64 65 u32 hs_curr_level_offset; 66 bool powered_on; 67 }; 68 69 static inline struct tegra_xusb_usb2_lane * 70 to_usb2_lane(struct tegra_xusb_lane *lane) 71 { 72 return container_of(lane, struct tegra_xusb_usb2_lane, base); 73 } 74 75 struct tegra_xusb_ulpi_lane { 76 struct tegra_xusb_lane base; 77 }; 78 79 static inline struct tegra_xusb_ulpi_lane * 80 to_ulpi_lane(struct tegra_xusb_lane *lane) 81 { 82 return container_of(lane, struct tegra_xusb_ulpi_lane, base); 83 } 84 85 struct tegra_xusb_hsic_lane { 86 struct tegra_xusb_lane base; 87 88 u32 strobe_trim; 89 u32 rx_strobe_trim; 90 u32 rx_data_trim; 91 u32 tx_rtune_n; 92 u32 tx_rtune_p; 93 u32 tx_rslew_n; 94 u32 tx_rslew_p; 95 bool auto_term; 96 }; 97 98 static inline struct tegra_xusb_hsic_lane * 99 to_hsic_lane(struct tegra_xusb_lane *lane) 100 { 101 return container_of(lane, struct tegra_xusb_hsic_lane, base); 102 } 103 104 struct tegra_xusb_pcie_lane { 105 struct tegra_xusb_lane base; 106 }; 107 108 static inline struct tegra_xusb_pcie_lane * 109 to_pcie_lane(struct tegra_xusb_lane *lane) 110 { 111 return container_of(lane, struct tegra_xusb_pcie_lane, base); 112 } 113 114 struct tegra_xusb_sata_lane { 115 struct tegra_xusb_lane base; 116 }; 117 118 static inline struct tegra_xusb_sata_lane * 119 to_sata_lane(struct tegra_xusb_lane *lane) 120 { 121 return container_of(lane, struct tegra_xusb_sata_lane, base); 122 } 123 124 struct tegra_xusb_lane_ops { 125 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad, 126 struct device_node *np, 127 unsigned int index); 128 void (*remove)(struct tegra_xusb_lane *lane); 129 }; 130 131 /* 132 * pads 133 */ 134 struct tegra_xusb_pad_soc; 135 struct tegra_xusb_padctl; 136 137 struct tegra_xusb_pad_ops { 138 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl, 139 const struct tegra_xusb_pad_soc *soc, 140 struct device_node *np); 141 void (*remove)(struct tegra_xusb_pad *pad); 142 }; 143 144 struct tegra_xusb_pad_soc { 145 const char *name; 146 147 const struct tegra_xusb_lane_soc *lanes; 148 unsigned int num_lanes; 149 150 const struct tegra_xusb_pad_ops *ops; 151 }; 152 153 struct tegra_xusb_pad { 154 const struct tegra_xusb_pad_soc *soc; 155 struct tegra_xusb_padctl *padctl; 156 struct phy_provider *provider; 157 struct phy **lanes; 158 struct device dev; 159 160 const struct tegra_xusb_lane_ops *ops; 161 162 struct list_head list; 163 }; 164 165 static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev) 166 { 167 return container_of(dev, struct tegra_xusb_pad, dev); 168 } 169 170 int tegra_xusb_pad_init(struct tegra_xusb_pad *pad, 171 struct tegra_xusb_padctl *padctl, 172 struct device_node *np); 173 int tegra_xusb_pad_register(struct tegra_xusb_pad *pad, 174 const struct phy_ops *ops); 175 void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad); 176 177 struct tegra_xusb_usb3_pad { 178 struct tegra_xusb_pad base; 179 180 unsigned int enable; 181 struct mutex lock; 182 }; 183 184 static inline struct tegra_xusb_usb3_pad * 185 to_usb3_pad(struct tegra_xusb_pad *pad) 186 { 187 return container_of(pad, struct tegra_xusb_usb3_pad, base); 188 } 189 190 struct tegra_xusb_usb2_pad { 191 struct tegra_xusb_pad base; 192 193 struct clk *clk; 194 unsigned int enable; 195 struct mutex lock; 196 }; 197 198 static inline struct tegra_xusb_usb2_pad * 199 to_usb2_pad(struct tegra_xusb_pad *pad) 200 { 201 return container_of(pad, struct tegra_xusb_usb2_pad, base); 202 } 203 204 struct tegra_xusb_ulpi_pad { 205 struct tegra_xusb_pad base; 206 }; 207 208 static inline struct tegra_xusb_ulpi_pad * 209 to_ulpi_pad(struct tegra_xusb_pad *pad) 210 { 211 return container_of(pad, struct tegra_xusb_ulpi_pad, base); 212 } 213 214 struct tegra_xusb_hsic_pad { 215 struct tegra_xusb_pad base; 216 217 struct regulator *supply; 218 struct clk *clk; 219 }; 220 221 static inline struct tegra_xusb_hsic_pad * 222 to_hsic_pad(struct tegra_xusb_pad *pad) 223 { 224 return container_of(pad, struct tegra_xusb_hsic_pad, base); 225 } 226 227 struct tegra_xusb_pcie_pad { 228 struct tegra_xusb_pad base; 229 230 struct reset_control *rst; 231 struct clk *pll; 232 233 unsigned int enable; 234 }; 235 236 static inline struct tegra_xusb_pcie_pad * 237 to_pcie_pad(struct tegra_xusb_pad *pad) 238 { 239 return container_of(pad, struct tegra_xusb_pcie_pad, base); 240 } 241 242 struct tegra_xusb_sata_pad { 243 struct tegra_xusb_pad base; 244 245 struct reset_control *rst; 246 struct clk *pll; 247 248 unsigned int enable; 249 }; 250 251 static inline struct tegra_xusb_sata_pad * 252 to_sata_pad(struct tegra_xusb_pad *pad) 253 { 254 return container_of(pad, struct tegra_xusb_sata_pad, base); 255 } 256 257 /* 258 * ports 259 */ 260 struct tegra_xusb_port_ops; 261 262 struct tegra_xusb_port { 263 struct tegra_xusb_padctl *padctl; 264 struct tegra_xusb_lane *lane; 265 unsigned int index; 266 267 struct list_head list; 268 struct device dev; 269 270 struct usb_role_switch *usb_role_sw; 271 272 const struct tegra_xusb_port_ops *ops; 273 }; 274 275 struct tegra_xusb_lane_map { 276 unsigned int port; 277 const char *type; 278 unsigned int index; 279 const char *func; 280 }; 281 282 struct tegra_xusb_lane * 283 tegra_xusb_port_find_lane(struct tegra_xusb_port *port, 284 const struct tegra_xusb_lane_map *map, 285 const char *function); 286 287 struct tegra_xusb_port * 288 tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type, 289 unsigned int index); 290 291 struct tegra_xusb_usb2_port { 292 struct tegra_xusb_port base; 293 294 struct regulator *supply; 295 enum usb_dr_mode mode; 296 bool internal; 297 int usb3_port_fake; 298 }; 299 300 static inline struct tegra_xusb_usb2_port * 301 to_usb2_port(struct tegra_xusb_port *port) 302 { 303 return container_of(port, struct tegra_xusb_usb2_port, base); 304 } 305 306 struct tegra_xusb_usb2_port * 307 tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl, 308 unsigned int index); 309 310 struct tegra_xusb_ulpi_port { 311 struct tegra_xusb_port base; 312 313 struct regulator *supply; 314 bool internal; 315 }; 316 317 static inline struct tegra_xusb_ulpi_port * 318 to_ulpi_port(struct tegra_xusb_port *port) 319 { 320 return container_of(port, struct tegra_xusb_ulpi_port, base); 321 } 322 323 struct tegra_xusb_hsic_port { 324 struct tegra_xusb_port base; 325 }; 326 327 static inline struct tegra_xusb_hsic_port * 328 to_hsic_port(struct tegra_xusb_port *port) 329 { 330 return container_of(port, struct tegra_xusb_hsic_port, base); 331 } 332 333 struct tegra_xusb_usb3_port { 334 struct tegra_xusb_port base; 335 struct regulator *supply; 336 bool context_saved; 337 unsigned int port; 338 bool internal; 339 340 u32 tap1; 341 u32 amp; 342 u32 ctle_z; 343 u32 ctle_g; 344 }; 345 346 static inline struct tegra_xusb_usb3_port * 347 to_usb3_port(struct tegra_xusb_port *port) 348 { 349 return container_of(port, struct tegra_xusb_usb3_port, base); 350 } 351 352 struct tegra_xusb_usb3_port * 353 tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl, 354 unsigned int index); 355 356 struct tegra_xusb_port_ops { 357 int (*enable)(struct tegra_xusb_port *port); 358 void (*disable)(struct tegra_xusb_port *port); 359 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port); 360 }; 361 362 /* 363 * pad controller 364 */ 365 struct tegra_xusb_padctl_soc; 366 367 struct tegra_xusb_padctl_ops { 368 struct tegra_xusb_padctl * 369 (*probe)(struct device *dev, 370 const struct tegra_xusb_padctl_soc *soc); 371 void (*remove)(struct tegra_xusb_padctl *padctl); 372 373 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl, 374 unsigned int index); 375 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl, 376 unsigned int index, bool idle); 377 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl, 378 unsigned int index, bool enable); 379 int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set); 380 int (*utmi_port_reset)(struct phy *phy); 381 }; 382 383 struct tegra_xusb_padctl_soc { 384 const struct tegra_xusb_pad_soc * const *pads; 385 unsigned int num_pads; 386 387 struct { 388 struct { 389 const struct tegra_xusb_port_ops *ops; 390 unsigned int count; 391 } usb2, ulpi, hsic, usb3; 392 } ports; 393 394 const struct tegra_xusb_padctl_ops *ops; 395 396 const char * const *supply_names; 397 unsigned int num_supplies; 398 bool need_fake_usb3_port; 399 }; 400 401 struct tegra_xusb_padctl { 402 struct device *dev; 403 void __iomem *regs; 404 struct mutex lock; 405 struct reset_control *rst; 406 407 const struct tegra_xusb_padctl_soc *soc; 408 409 struct tegra_xusb_pad *pcie; 410 struct tegra_xusb_pad *sata; 411 struct tegra_xusb_pad *ulpi; 412 struct tegra_xusb_pad *usb2; 413 struct tegra_xusb_pad *hsic; 414 415 struct list_head ports; 416 struct list_head lanes; 417 struct list_head pads; 418 419 unsigned int enable; 420 421 struct clk *clk; 422 423 struct regulator_bulk_data *supplies; 424 }; 425 426 static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value, 427 unsigned long offset) 428 { 429 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value); 430 writel(value, padctl->regs + offset); 431 } 432 433 static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl, 434 unsigned long offset) 435 { 436 u32 value = readl(padctl->regs + offset); 437 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value); 438 return value; 439 } 440 441 struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl, 442 const char *name, 443 unsigned int index); 444 445 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 446 extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc; 447 #endif 448 #if defined(CONFIG_ARCH_TEGRA_210_SOC) 449 extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc; 450 #endif 451 #if defined(CONFIG_ARCH_TEGRA_186_SOC) 452 extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc; 453 #endif 454 455 #endif /* __PHY_TEGRA_XUSB_H */ 456