1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2015, Google Inc. 5 */ 6 7 #ifndef __PHY_TEGRA_XUSB_H 8 #define __PHY_TEGRA_XUSB_H 9 10 #include <linux/io.h> 11 #include <linux/mutex.h> 12 #include <linux/workqueue.h> 13 14 #include <linux/usb/otg.h> 15 #include <linux/usb/role.h> 16 17 /* legacy entry points for backwards-compatibility */ 18 int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev); 19 int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev); 20 21 struct phy; 22 struct phy_provider; 23 struct platform_device; 24 struct regulator; 25 26 /* 27 * lanes 28 */ 29 struct tegra_xusb_lane_soc { 30 const char *name; 31 32 unsigned int offset; 33 unsigned int shift; 34 unsigned int mask; 35 36 const char * const *funcs; 37 unsigned int num_funcs; 38 }; 39 40 struct tegra_xusb_lane { 41 const struct tegra_xusb_lane_soc *soc; 42 struct tegra_xusb_pad *pad; 43 struct device_node *np; 44 struct list_head list; 45 unsigned int function; 46 unsigned int index; 47 }; 48 49 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, 50 struct device_node *np); 51 52 struct tegra_xusb_usb3_lane { 53 struct tegra_xusb_lane base; 54 }; 55 56 static inline struct tegra_xusb_usb3_lane * 57 to_usb3_lane(struct tegra_xusb_lane *lane) 58 { 59 return container_of(lane, struct tegra_xusb_usb3_lane, base); 60 } 61 62 struct tegra_xusb_usb2_lane { 63 struct tegra_xusb_lane base; 64 65 u32 hs_curr_level_offset; 66 bool powered_on; 67 }; 68 69 static inline struct tegra_xusb_usb2_lane * 70 to_usb2_lane(struct tegra_xusb_lane *lane) 71 { 72 return container_of(lane, struct tegra_xusb_usb2_lane, base); 73 } 74 75 struct tegra_xusb_ulpi_lane { 76 struct tegra_xusb_lane base; 77 }; 78 79 static inline struct tegra_xusb_ulpi_lane * 80 to_ulpi_lane(struct tegra_xusb_lane *lane) 81 { 82 return container_of(lane, struct tegra_xusb_ulpi_lane, base); 83 } 84 85 struct tegra_xusb_hsic_lane { 86 struct tegra_xusb_lane base; 87 88 u32 strobe_trim; 89 u32 rx_strobe_trim; 90 u32 rx_data_trim; 91 u32 tx_rtune_n; 92 u32 tx_rtune_p; 93 u32 tx_rslew_n; 94 u32 tx_rslew_p; 95 bool auto_term; 96 }; 97 98 static inline struct tegra_xusb_hsic_lane * 99 to_hsic_lane(struct tegra_xusb_lane *lane) 100 { 101 return container_of(lane, struct tegra_xusb_hsic_lane, base); 102 } 103 104 struct tegra_xusb_pcie_lane { 105 struct tegra_xusb_lane base; 106 }; 107 108 static inline struct tegra_xusb_pcie_lane * 109 to_pcie_lane(struct tegra_xusb_lane *lane) 110 { 111 return container_of(lane, struct tegra_xusb_pcie_lane, base); 112 } 113 114 struct tegra_xusb_sata_lane { 115 struct tegra_xusb_lane base; 116 }; 117 118 static inline struct tegra_xusb_sata_lane * 119 to_sata_lane(struct tegra_xusb_lane *lane) 120 { 121 return container_of(lane, struct tegra_xusb_sata_lane, base); 122 } 123 124 struct tegra_xusb_lane_ops { 125 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad, 126 struct device_node *np, 127 unsigned int index); 128 void (*remove)(struct tegra_xusb_lane *lane); 129 }; 130 131 /* 132 * pads 133 */ 134 struct tegra_xusb_pad_soc; 135 struct tegra_xusb_padctl; 136 137 struct tegra_xusb_pad_ops { 138 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl, 139 const struct tegra_xusb_pad_soc *soc, 140 struct device_node *np); 141 void (*remove)(struct tegra_xusb_pad *pad); 142 }; 143 144 struct tegra_xusb_pad_soc { 145 const char *name; 146 147 const struct tegra_xusb_lane_soc *lanes; 148 unsigned int num_lanes; 149 150 const struct tegra_xusb_pad_ops *ops; 151 }; 152 153 struct tegra_xusb_pad { 154 const struct tegra_xusb_pad_soc *soc; 155 struct tegra_xusb_padctl *padctl; 156 struct phy_provider *provider; 157 struct phy **lanes; 158 struct device dev; 159 160 const struct tegra_xusb_lane_ops *ops; 161 162 struct list_head list; 163 }; 164 165 static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev) 166 { 167 return container_of(dev, struct tegra_xusb_pad, dev); 168 } 169 170 int tegra_xusb_pad_init(struct tegra_xusb_pad *pad, 171 struct tegra_xusb_padctl *padctl, 172 struct device_node *np); 173 int tegra_xusb_pad_register(struct tegra_xusb_pad *pad, 174 const struct phy_ops *ops); 175 void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad); 176 177 struct tegra_xusb_usb3_pad { 178 struct tegra_xusb_pad base; 179 180 unsigned int enable; 181 struct mutex lock; 182 }; 183 184 static inline struct tegra_xusb_usb3_pad * 185 to_usb3_pad(struct tegra_xusb_pad *pad) 186 { 187 return container_of(pad, struct tegra_xusb_usb3_pad, base); 188 } 189 190 struct tegra_xusb_usb2_pad { 191 struct tegra_xusb_pad base; 192 193 struct clk *clk; 194 unsigned int enable; 195 struct mutex lock; 196 }; 197 198 static inline struct tegra_xusb_usb2_pad * 199 to_usb2_pad(struct tegra_xusb_pad *pad) 200 { 201 return container_of(pad, struct tegra_xusb_usb2_pad, base); 202 } 203 204 struct tegra_xusb_ulpi_pad { 205 struct tegra_xusb_pad base; 206 }; 207 208 static inline struct tegra_xusb_ulpi_pad * 209 to_ulpi_pad(struct tegra_xusb_pad *pad) 210 { 211 return container_of(pad, struct tegra_xusb_ulpi_pad, base); 212 } 213 214 struct tegra_xusb_hsic_pad { 215 struct tegra_xusb_pad base; 216 217 struct regulator *supply; 218 struct clk *clk; 219 }; 220 221 static inline struct tegra_xusb_hsic_pad * 222 to_hsic_pad(struct tegra_xusb_pad *pad) 223 { 224 return container_of(pad, struct tegra_xusb_hsic_pad, base); 225 } 226 227 struct tegra_xusb_pcie_pad { 228 struct tegra_xusb_pad base; 229 230 struct reset_control *rst; 231 struct clk *pll; 232 233 unsigned int enable; 234 }; 235 236 static inline struct tegra_xusb_pcie_pad * 237 to_pcie_pad(struct tegra_xusb_pad *pad) 238 { 239 return container_of(pad, struct tegra_xusb_pcie_pad, base); 240 } 241 242 struct tegra_xusb_sata_pad { 243 struct tegra_xusb_pad base; 244 245 struct reset_control *rst; 246 struct clk *pll; 247 248 unsigned int enable; 249 }; 250 251 static inline struct tegra_xusb_sata_pad * 252 to_sata_pad(struct tegra_xusb_pad *pad) 253 { 254 return container_of(pad, struct tegra_xusb_sata_pad, base); 255 } 256 257 /* 258 * ports 259 */ 260 struct tegra_xusb_port_ops; 261 262 struct tegra_xusb_port { 263 struct tegra_xusb_padctl *padctl; 264 struct tegra_xusb_lane *lane; 265 unsigned int index; 266 267 struct list_head list; 268 struct device dev; 269 270 struct usb_role_switch *usb_role_sw; 271 struct work_struct usb_phy_work; 272 struct usb_phy usb_phy; 273 274 const struct tegra_xusb_port_ops *ops; 275 }; 276 277 struct tegra_xusb_lane_map { 278 unsigned int port; 279 const char *type; 280 unsigned int index; 281 const char *func; 282 }; 283 284 struct tegra_xusb_lane * 285 tegra_xusb_port_find_lane(struct tegra_xusb_port *port, 286 const struct tegra_xusb_lane_map *map, 287 const char *function); 288 289 struct tegra_xusb_port * 290 tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type, 291 unsigned int index); 292 293 struct tegra_xusb_usb2_port { 294 struct tegra_xusb_port base; 295 296 struct regulator *supply; 297 enum usb_dr_mode mode; 298 bool internal; 299 int usb3_port_fake; 300 }; 301 302 static inline struct tegra_xusb_usb2_port * 303 to_usb2_port(struct tegra_xusb_port *port) 304 { 305 return container_of(port, struct tegra_xusb_usb2_port, base); 306 } 307 308 struct tegra_xusb_usb2_port * 309 tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl, 310 unsigned int index); 311 312 struct tegra_xusb_ulpi_port { 313 struct tegra_xusb_port base; 314 315 struct regulator *supply; 316 bool internal; 317 }; 318 319 static inline struct tegra_xusb_ulpi_port * 320 to_ulpi_port(struct tegra_xusb_port *port) 321 { 322 return container_of(port, struct tegra_xusb_ulpi_port, base); 323 } 324 325 struct tegra_xusb_hsic_port { 326 struct tegra_xusb_port base; 327 }; 328 329 static inline struct tegra_xusb_hsic_port * 330 to_hsic_port(struct tegra_xusb_port *port) 331 { 332 return container_of(port, struct tegra_xusb_hsic_port, base); 333 } 334 335 struct tegra_xusb_usb3_port { 336 struct tegra_xusb_port base; 337 struct regulator *supply; 338 bool context_saved; 339 unsigned int port; 340 bool internal; 341 342 u32 tap1; 343 u32 amp; 344 u32 ctle_z; 345 u32 ctle_g; 346 }; 347 348 static inline struct tegra_xusb_usb3_port * 349 to_usb3_port(struct tegra_xusb_port *port) 350 { 351 return container_of(port, struct tegra_xusb_usb3_port, base); 352 } 353 354 struct tegra_xusb_usb3_port * 355 tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl, 356 unsigned int index); 357 358 struct tegra_xusb_port_ops { 359 int (*enable)(struct tegra_xusb_port *port); 360 void (*disable)(struct tegra_xusb_port *port); 361 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port); 362 }; 363 364 /* 365 * pad controller 366 */ 367 struct tegra_xusb_padctl_soc; 368 369 struct tegra_xusb_padctl_ops { 370 struct tegra_xusb_padctl * 371 (*probe)(struct device *dev, 372 const struct tegra_xusb_padctl_soc *soc); 373 void (*remove)(struct tegra_xusb_padctl *padctl); 374 375 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl, 376 unsigned int index); 377 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl, 378 unsigned int index, bool idle); 379 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl, 380 unsigned int index, bool enable); 381 int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set); 382 int (*utmi_port_reset)(struct phy *phy); 383 }; 384 385 struct tegra_xusb_padctl_soc { 386 const struct tegra_xusb_pad_soc * const *pads; 387 unsigned int num_pads; 388 389 struct { 390 struct { 391 const struct tegra_xusb_port_ops *ops; 392 unsigned int count; 393 } usb2, ulpi, hsic, usb3; 394 } ports; 395 396 const struct tegra_xusb_padctl_ops *ops; 397 398 const char * const *supply_names; 399 unsigned int num_supplies; 400 bool need_fake_usb3_port; 401 }; 402 403 struct tegra_xusb_padctl { 404 struct device *dev; 405 void __iomem *regs; 406 struct mutex lock; 407 struct reset_control *rst; 408 409 const struct tegra_xusb_padctl_soc *soc; 410 411 struct tegra_xusb_pad *pcie; 412 struct tegra_xusb_pad *sata; 413 struct tegra_xusb_pad *ulpi; 414 struct tegra_xusb_pad *usb2; 415 struct tegra_xusb_pad *hsic; 416 417 struct list_head ports; 418 struct list_head lanes; 419 struct list_head pads; 420 421 unsigned int enable; 422 423 struct clk *clk; 424 425 struct regulator_bulk_data *supplies; 426 }; 427 428 static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value, 429 unsigned long offset) 430 { 431 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value); 432 writel(value, padctl->regs + offset); 433 } 434 435 static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl, 436 unsigned long offset) 437 { 438 u32 value = readl(padctl->regs + offset); 439 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value); 440 return value; 441 } 442 443 struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl, 444 const char *name, 445 unsigned int index); 446 447 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 448 extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc; 449 #endif 450 #if defined(CONFIG_ARCH_TEGRA_210_SOC) 451 extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc; 452 #endif 453 #if defined(CONFIG_ARCH_TEGRA_186_SOC) 454 extern const struct tegra_xusb_padctl_soc tegra186_xusb_padctl_soc; 455 #endif 456 457 #endif /* __PHY_TEGRA_XUSB_H */ 458