1 /* 2 * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved. 3 * Copyright (c) 2015, Google Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #ifndef __PHY_TEGRA_XUSB_H 16 #define __PHY_TEGRA_XUSB_H 17 18 #include <linux/io.h> 19 #include <linux/mutex.h> 20 #include <linux/workqueue.h> 21 22 #include <linux/usb/otg.h> 23 24 /* legacy entry points for backwards-compatibility */ 25 int tegra_xusb_padctl_legacy_probe(struct platform_device *pdev); 26 int tegra_xusb_padctl_legacy_remove(struct platform_device *pdev); 27 28 struct phy; 29 struct phy_provider; 30 struct platform_device; 31 struct regulator; 32 33 /* 34 * lanes 35 */ 36 struct tegra_xusb_lane_soc { 37 const char *name; 38 39 unsigned int offset; 40 unsigned int shift; 41 unsigned int mask; 42 43 const char * const *funcs; 44 unsigned int num_funcs; 45 }; 46 47 struct tegra_xusb_lane { 48 const struct tegra_xusb_lane_soc *soc; 49 struct tegra_xusb_pad *pad; 50 struct device_node *np; 51 struct list_head list; 52 unsigned int function; 53 unsigned int index; 54 }; 55 56 int tegra_xusb_lane_parse_dt(struct tegra_xusb_lane *lane, 57 struct device_node *np); 58 59 struct tegra_xusb_usb2_lane { 60 struct tegra_xusb_lane base; 61 62 u32 hs_curr_level_offset; 63 }; 64 65 static inline struct tegra_xusb_usb2_lane * 66 to_usb2_lane(struct tegra_xusb_lane *lane) 67 { 68 return container_of(lane, struct tegra_xusb_usb2_lane, base); 69 } 70 71 struct tegra_xusb_ulpi_lane { 72 struct tegra_xusb_lane base; 73 }; 74 75 static inline struct tegra_xusb_ulpi_lane * 76 to_ulpi_lane(struct tegra_xusb_lane *lane) 77 { 78 return container_of(lane, struct tegra_xusb_ulpi_lane, base); 79 } 80 81 struct tegra_xusb_hsic_lane { 82 struct tegra_xusb_lane base; 83 84 u32 strobe_trim; 85 u32 rx_strobe_trim; 86 u32 rx_data_trim; 87 u32 tx_rtune_n; 88 u32 tx_rtune_p; 89 u32 tx_rslew_n; 90 u32 tx_rslew_p; 91 bool auto_term; 92 }; 93 94 static inline struct tegra_xusb_hsic_lane * 95 to_hsic_lane(struct tegra_xusb_lane *lane) 96 { 97 return container_of(lane, struct tegra_xusb_hsic_lane, base); 98 } 99 100 struct tegra_xusb_pcie_lane { 101 struct tegra_xusb_lane base; 102 }; 103 104 static inline struct tegra_xusb_pcie_lane * 105 to_pcie_lane(struct tegra_xusb_lane *lane) 106 { 107 return container_of(lane, struct tegra_xusb_pcie_lane, base); 108 } 109 110 struct tegra_xusb_sata_lane { 111 struct tegra_xusb_lane base; 112 }; 113 114 static inline struct tegra_xusb_sata_lane * 115 to_sata_lane(struct tegra_xusb_lane *lane) 116 { 117 return container_of(lane, struct tegra_xusb_sata_lane, base); 118 } 119 120 struct tegra_xusb_lane_ops { 121 struct tegra_xusb_lane *(*probe)(struct tegra_xusb_pad *pad, 122 struct device_node *np, 123 unsigned int index); 124 void (*remove)(struct tegra_xusb_lane *lane); 125 }; 126 127 /* 128 * pads 129 */ 130 struct tegra_xusb_pad_soc; 131 struct tegra_xusb_padctl; 132 133 struct tegra_xusb_pad_ops { 134 struct tegra_xusb_pad *(*probe)(struct tegra_xusb_padctl *padctl, 135 const struct tegra_xusb_pad_soc *soc, 136 struct device_node *np); 137 void (*remove)(struct tegra_xusb_pad *pad); 138 }; 139 140 struct tegra_xusb_pad_soc { 141 const char *name; 142 143 const struct tegra_xusb_lane_soc *lanes; 144 unsigned int num_lanes; 145 146 const struct tegra_xusb_pad_ops *ops; 147 }; 148 149 struct tegra_xusb_pad { 150 const struct tegra_xusb_pad_soc *soc; 151 struct tegra_xusb_padctl *padctl; 152 struct phy_provider *provider; 153 struct phy **lanes; 154 struct device dev; 155 156 const struct tegra_xusb_lane_ops *ops; 157 158 struct list_head list; 159 }; 160 161 static inline struct tegra_xusb_pad *to_tegra_xusb_pad(struct device *dev) 162 { 163 return container_of(dev, struct tegra_xusb_pad, dev); 164 } 165 166 int tegra_xusb_pad_init(struct tegra_xusb_pad *pad, 167 struct tegra_xusb_padctl *padctl, 168 struct device_node *np); 169 int tegra_xusb_pad_register(struct tegra_xusb_pad *pad, 170 const struct phy_ops *ops); 171 void tegra_xusb_pad_unregister(struct tegra_xusb_pad *pad); 172 173 struct tegra_xusb_usb2_pad { 174 struct tegra_xusb_pad base; 175 176 struct clk *clk; 177 unsigned int enable; 178 struct mutex lock; 179 }; 180 181 static inline struct tegra_xusb_usb2_pad * 182 to_usb2_pad(struct tegra_xusb_pad *pad) 183 { 184 return container_of(pad, struct tegra_xusb_usb2_pad, base); 185 } 186 187 struct tegra_xusb_ulpi_pad { 188 struct tegra_xusb_pad base; 189 }; 190 191 static inline struct tegra_xusb_ulpi_pad * 192 to_ulpi_pad(struct tegra_xusb_pad *pad) 193 { 194 return container_of(pad, struct tegra_xusb_ulpi_pad, base); 195 } 196 197 struct tegra_xusb_hsic_pad { 198 struct tegra_xusb_pad base; 199 200 struct regulator *supply; 201 struct clk *clk; 202 }; 203 204 static inline struct tegra_xusb_hsic_pad * 205 to_hsic_pad(struct tegra_xusb_pad *pad) 206 { 207 return container_of(pad, struct tegra_xusb_hsic_pad, base); 208 } 209 210 struct tegra_xusb_pcie_pad { 211 struct tegra_xusb_pad base; 212 213 struct reset_control *rst; 214 struct clk *pll; 215 216 unsigned int enable; 217 }; 218 219 static inline struct tegra_xusb_pcie_pad * 220 to_pcie_pad(struct tegra_xusb_pad *pad) 221 { 222 return container_of(pad, struct tegra_xusb_pcie_pad, base); 223 } 224 225 struct tegra_xusb_sata_pad { 226 struct tegra_xusb_pad base; 227 228 struct reset_control *rst; 229 struct clk *pll; 230 231 unsigned int enable; 232 }; 233 234 static inline struct tegra_xusb_sata_pad * 235 to_sata_pad(struct tegra_xusb_pad *pad) 236 { 237 return container_of(pad, struct tegra_xusb_sata_pad, base); 238 } 239 240 /* 241 * ports 242 */ 243 struct tegra_xusb_port_ops; 244 245 struct tegra_xusb_port { 246 struct tegra_xusb_padctl *padctl; 247 struct tegra_xusb_lane *lane; 248 unsigned int index; 249 250 struct list_head list; 251 struct device dev; 252 253 const struct tegra_xusb_port_ops *ops; 254 }; 255 256 struct tegra_xusb_lane_map { 257 unsigned int port; 258 const char *type; 259 unsigned int index; 260 const char *func; 261 }; 262 263 struct tegra_xusb_lane * 264 tegra_xusb_port_find_lane(struct tegra_xusb_port *port, 265 const struct tegra_xusb_lane_map *map, 266 const char *function); 267 268 struct tegra_xusb_port * 269 tegra_xusb_find_port(struct tegra_xusb_padctl *padctl, const char *type, 270 unsigned int index); 271 272 struct tegra_xusb_usb2_port { 273 struct tegra_xusb_port base; 274 275 struct regulator *supply; 276 enum usb_dr_mode mode; 277 bool internal; 278 }; 279 280 static inline struct tegra_xusb_usb2_port * 281 to_usb2_port(struct tegra_xusb_port *port) 282 { 283 return container_of(port, struct tegra_xusb_usb2_port, base); 284 } 285 286 struct tegra_xusb_usb2_port * 287 tegra_xusb_find_usb2_port(struct tegra_xusb_padctl *padctl, 288 unsigned int index); 289 290 struct tegra_xusb_ulpi_port { 291 struct tegra_xusb_port base; 292 293 struct regulator *supply; 294 bool internal; 295 }; 296 297 static inline struct tegra_xusb_ulpi_port * 298 to_ulpi_port(struct tegra_xusb_port *port) 299 { 300 return container_of(port, struct tegra_xusb_ulpi_port, base); 301 } 302 303 struct tegra_xusb_hsic_port { 304 struct tegra_xusb_port base; 305 }; 306 307 static inline struct tegra_xusb_hsic_port * 308 to_hsic_port(struct tegra_xusb_port *port) 309 { 310 return container_of(port, struct tegra_xusb_hsic_port, base); 311 } 312 313 struct tegra_xusb_usb3_port { 314 struct tegra_xusb_port base; 315 struct regulator *supply; 316 bool context_saved; 317 unsigned int port; 318 bool internal; 319 320 u32 tap1; 321 u32 amp; 322 u32 ctle_z; 323 u32 ctle_g; 324 }; 325 326 static inline struct tegra_xusb_usb3_port * 327 to_usb3_port(struct tegra_xusb_port *port) 328 { 329 return container_of(port, struct tegra_xusb_usb3_port, base); 330 } 331 332 struct tegra_xusb_usb3_port * 333 tegra_xusb_find_usb3_port(struct tegra_xusb_padctl *padctl, 334 unsigned int index); 335 336 struct tegra_xusb_port_ops { 337 int (*enable)(struct tegra_xusb_port *port); 338 void (*disable)(struct tegra_xusb_port *port); 339 struct tegra_xusb_lane *(*map)(struct tegra_xusb_port *port); 340 }; 341 342 /* 343 * pad controller 344 */ 345 struct tegra_xusb_padctl_soc; 346 347 struct tegra_xusb_padctl_ops { 348 struct tegra_xusb_padctl * 349 (*probe)(struct device *dev, 350 const struct tegra_xusb_padctl_soc *soc); 351 void (*remove)(struct tegra_xusb_padctl *padctl); 352 353 int (*usb3_save_context)(struct tegra_xusb_padctl *padctl, 354 unsigned int index); 355 int (*hsic_set_idle)(struct tegra_xusb_padctl *padctl, 356 unsigned int index, bool idle); 357 int (*usb3_set_lfps_detect)(struct tegra_xusb_padctl *padctl, 358 unsigned int index, bool enable); 359 }; 360 361 struct tegra_xusb_padctl_soc { 362 const struct tegra_xusb_pad_soc * const *pads; 363 unsigned int num_pads; 364 365 struct { 366 struct { 367 const struct tegra_xusb_port_ops *ops; 368 unsigned int count; 369 } usb2, ulpi, hsic, usb3; 370 } ports; 371 372 const struct tegra_xusb_padctl_ops *ops; 373 }; 374 375 struct tegra_xusb_padctl { 376 struct device *dev; 377 void __iomem *regs; 378 struct mutex lock; 379 struct reset_control *rst; 380 381 const struct tegra_xusb_padctl_soc *soc; 382 383 struct tegra_xusb_pad *pcie; 384 struct tegra_xusb_pad *sata; 385 struct tegra_xusb_pad *ulpi; 386 struct tegra_xusb_pad *usb2; 387 struct tegra_xusb_pad *hsic; 388 389 struct list_head ports; 390 struct list_head lanes; 391 struct list_head pads; 392 393 unsigned int enable; 394 395 struct clk *clk; 396 }; 397 398 static inline void padctl_writel(struct tegra_xusb_padctl *padctl, u32 value, 399 unsigned long offset) 400 { 401 dev_dbg(padctl->dev, "%08lx < %08x\n", offset, value); 402 writel(value, padctl->regs + offset); 403 } 404 405 static inline u32 padctl_readl(struct tegra_xusb_padctl *padctl, 406 unsigned long offset) 407 { 408 u32 value = readl(padctl->regs + offset); 409 dev_dbg(padctl->dev, "%08lx > %08x\n", offset, value); 410 return value; 411 } 412 413 struct tegra_xusb_lane *tegra_xusb_find_lane(struct tegra_xusb_padctl *padctl, 414 const char *name, 415 unsigned int index); 416 417 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 418 extern const struct tegra_xusb_padctl_soc tegra124_xusb_padctl_soc; 419 #endif 420 #if defined(CONFIG_ARCH_TEGRA_210_SOC) 421 extern const struct tegra_xusb_padctl_soc tegra210_xusb_padctl_soc; 422 #endif 423 424 #endif /* __PHY_TEGRA_XUSB_H */ 425