1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2012-2015, NVIDIA Corporation. 4 */ 5 6 #ifndef HOST1X_DEV_H 7 #define HOST1X_DEV_H 8 9 #include <linux/device.h> 10 #include <linux/iommu.h> 11 #include <linux/iova.h> 12 #include <linux/platform_device.h> 13 #include <linux/reset.h> 14 15 #include "cdma.h" 16 #include "channel.h" 17 #include "context.h" 18 #include "intr.h" 19 #include "job.h" 20 #include "syncpt.h" 21 22 struct host1x_syncpt; 23 struct host1x_syncpt_base; 24 struct host1x_channel; 25 struct host1x_cdma; 26 struct host1x_job; 27 struct push_buffer; 28 struct output; 29 struct dentry; 30 31 struct host1x_channel_ops { 32 int (*init)(struct host1x_channel *channel, struct host1x *host, 33 unsigned int id); 34 int (*submit)(struct host1x_job *job); 35 }; 36 37 struct host1x_cdma_ops { 38 void (*start)(struct host1x_cdma *cdma); 39 void (*stop)(struct host1x_cdma *cdma); 40 void (*flush)(struct host1x_cdma *cdma); 41 int (*timeout_init)(struct host1x_cdma *cdma); 42 void (*timeout_destroy)(struct host1x_cdma *cdma); 43 void (*freeze)(struct host1x_cdma *cdma); 44 void (*resume)(struct host1x_cdma *cdma, u32 getptr); 45 void (*timeout_cpu_incr)(struct host1x_cdma *cdma, u32 getptr, 46 u32 syncpt_incrs, u32 syncval, u32 nr_slots); 47 }; 48 49 struct host1x_pushbuffer_ops { 50 void (*init)(struct push_buffer *pb); 51 }; 52 53 struct host1x_debug_ops { 54 void (*debug_init)(struct dentry *de); 55 void (*show_channel_cdma)(struct host1x *host, 56 struct host1x_channel *ch, 57 struct output *o); 58 void (*show_channel_fifo)(struct host1x *host, 59 struct host1x_channel *ch, 60 struct output *o); 61 void (*show_mlocks)(struct host1x *host, struct output *output); 62 63 }; 64 65 struct host1x_syncpt_ops { 66 void (*restore)(struct host1x_syncpt *syncpt); 67 void (*restore_wait_base)(struct host1x_syncpt *syncpt); 68 void (*load_wait_base)(struct host1x_syncpt *syncpt); 69 u32 (*load)(struct host1x_syncpt *syncpt); 70 int (*cpu_incr)(struct host1x_syncpt *syncpt); 71 void (*assign_to_channel)(struct host1x_syncpt *syncpt, 72 struct host1x_channel *channel); 73 void (*enable_protection)(struct host1x *host); 74 }; 75 76 struct host1x_intr_ops { 77 int (*init_host_sync)(struct host1x *host, u32 cpm, 78 void (*syncpt_thresh_work)(struct work_struct *work)); 79 void (*set_syncpt_threshold)( 80 struct host1x *host, unsigned int id, u32 thresh); 81 void (*enable_syncpt_intr)(struct host1x *host, unsigned int id); 82 void (*disable_syncpt_intr)(struct host1x *host, unsigned int id); 83 void (*disable_all_syncpt_intrs)(struct host1x *host); 84 int (*free_syncpt_irq)(struct host1x *host); 85 }; 86 87 struct host1x_sid_entry { 88 unsigned int base; 89 unsigned int offset; 90 unsigned int limit; 91 }; 92 93 struct host1x_info { 94 unsigned int nb_channels; /* host1x: number of channels supported */ 95 unsigned int nb_pts; /* host1x: number of syncpoints supported */ 96 unsigned int nb_bases; /* host1x: number of syncpoint bases supported */ 97 unsigned int nb_mlocks; /* host1x: number of mlocks supported */ 98 int (*init)(struct host1x *host1x); /* initialize per SoC ops */ 99 unsigned int sync_offset; /* offset of syncpoint registers */ 100 u64 dma_mask; /* mask of addressable memory */ 101 bool has_wide_gather; /* supports GATHER_W opcode */ 102 bool has_hypervisor; /* has hypervisor registers */ 103 unsigned int num_sid_entries; 104 const struct host1x_sid_entry *sid_table; 105 /* 106 * On T20-T148, the boot chain may setup DC to increment syncpoints 107 * 26/27 on VBLANK. As such we cannot use these syncpoints until 108 * the display driver disables VBLANK increments. 109 */ 110 bool reserve_vblank_syncpts; 111 }; 112 113 struct host1x { 114 const struct host1x_info *info; 115 116 void __iomem *regs; 117 void __iomem *hv_regs; /* hypervisor region */ 118 struct host1x_syncpt *syncpt; 119 struct host1x_syncpt_base *bases; 120 struct device *dev; 121 struct clk *clk; 122 struct reset_control_bulk_data resets[2]; 123 unsigned int nresets; 124 125 struct iommu_group *group; 126 struct iommu_domain *domain; 127 struct iova_domain iova; 128 dma_addr_t iova_end; 129 130 struct mutex intr_mutex; 131 int intr_syncpt_irq; 132 133 const struct host1x_syncpt_ops *syncpt_op; 134 const struct host1x_intr_ops *intr_op; 135 const struct host1x_channel_ops *channel_op; 136 const struct host1x_cdma_ops *cdma_op; 137 const struct host1x_pushbuffer_ops *cdma_pb_op; 138 const struct host1x_debug_ops *debug_op; 139 140 struct host1x_syncpt *nop_sp; 141 142 struct mutex syncpt_mutex; 143 144 struct host1x_channel_list channel_list; 145 struct host1x_memory_context_list context_list; 146 147 struct dentry *debugfs; 148 149 struct mutex devices_lock; 150 struct list_head devices; 151 152 struct list_head list; 153 154 struct device_dma_parameters dma_parms; 155 156 struct host1x_bo_cache cache; 157 }; 158 159 void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v); 160 u32 host1x_hypervisor_readl(struct host1x *host1x, u32 r); 161 void host1x_sync_writel(struct host1x *host1x, u32 r, u32 v); 162 u32 host1x_sync_readl(struct host1x *host1x, u32 r); 163 void host1x_ch_writel(struct host1x_channel *ch, u32 r, u32 v); 164 u32 host1x_ch_readl(struct host1x_channel *ch, u32 r); 165 166 static inline void host1x_hw_syncpt_restore(struct host1x *host, 167 struct host1x_syncpt *sp) 168 { 169 host->syncpt_op->restore(sp); 170 } 171 172 static inline void host1x_hw_syncpt_restore_wait_base(struct host1x *host, 173 struct host1x_syncpt *sp) 174 { 175 host->syncpt_op->restore_wait_base(sp); 176 } 177 178 static inline void host1x_hw_syncpt_load_wait_base(struct host1x *host, 179 struct host1x_syncpt *sp) 180 { 181 host->syncpt_op->load_wait_base(sp); 182 } 183 184 static inline u32 host1x_hw_syncpt_load(struct host1x *host, 185 struct host1x_syncpt *sp) 186 { 187 return host->syncpt_op->load(sp); 188 } 189 190 static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host, 191 struct host1x_syncpt *sp) 192 { 193 return host->syncpt_op->cpu_incr(sp); 194 } 195 196 static inline void host1x_hw_syncpt_assign_to_channel( 197 struct host1x *host, struct host1x_syncpt *sp, 198 struct host1x_channel *ch) 199 { 200 return host->syncpt_op->assign_to_channel(sp, ch); 201 } 202 203 static inline void host1x_hw_syncpt_enable_protection(struct host1x *host) 204 { 205 return host->syncpt_op->enable_protection(host); 206 } 207 208 static inline int host1x_hw_intr_init_host_sync(struct host1x *host, u32 cpm, 209 void (*syncpt_thresh_work)(struct work_struct *)) 210 { 211 return host->intr_op->init_host_sync(host, cpm, syncpt_thresh_work); 212 } 213 214 static inline void host1x_hw_intr_set_syncpt_threshold(struct host1x *host, 215 unsigned int id, 216 u32 thresh) 217 { 218 host->intr_op->set_syncpt_threshold(host, id, thresh); 219 } 220 221 static inline void host1x_hw_intr_enable_syncpt_intr(struct host1x *host, 222 unsigned int id) 223 { 224 host->intr_op->enable_syncpt_intr(host, id); 225 } 226 227 static inline void host1x_hw_intr_disable_syncpt_intr(struct host1x *host, 228 unsigned int id) 229 { 230 host->intr_op->disable_syncpt_intr(host, id); 231 } 232 233 static inline void host1x_hw_intr_disable_all_syncpt_intrs(struct host1x *host) 234 { 235 host->intr_op->disable_all_syncpt_intrs(host); 236 } 237 238 static inline int host1x_hw_intr_free_syncpt_irq(struct host1x *host) 239 { 240 return host->intr_op->free_syncpt_irq(host); 241 } 242 243 static inline int host1x_hw_channel_init(struct host1x *host, 244 struct host1x_channel *channel, 245 unsigned int id) 246 { 247 return host->channel_op->init(channel, host, id); 248 } 249 250 static inline int host1x_hw_channel_submit(struct host1x *host, 251 struct host1x_job *job) 252 { 253 return host->channel_op->submit(job); 254 } 255 256 static inline void host1x_hw_cdma_start(struct host1x *host, 257 struct host1x_cdma *cdma) 258 { 259 host->cdma_op->start(cdma); 260 } 261 262 static inline void host1x_hw_cdma_stop(struct host1x *host, 263 struct host1x_cdma *cdma) 264 { 265 host->cdma_op->stop(cdma); 266 } 267 268 static inline void host1x_hw_cdma_flush(struct host1x *host, 269 struct host1x_cdma *cdma) 270 { 271 host->cdma_op->flush(cdma); 272 } 273 274 static inline int host1x_hw_cdma_timeout_init(struct host1x *host, 275 struct host1x_cdma *cdma) 276 { 277 return host->cdma_op->timeout_init(cdma); 278 } 279 280 static inline void host1x_hw_cdma_timeout_destroy(struct host1x *host, 281 struct host1x_cdma *cdma) 282 { 283 host->cdma_op->timeout_destroy(cdma); 284 } 285 286 static inline void host1x_hw_cdma_freeze(struct host1x *host, 287 struct host1x_cdma *cdma) 288 { 289 host->cdma_op->freeze(cdma); 290 } 291 292 static inline void host1x_hw_cdma_resume(struct host1x *host, 293 struct host1x_cdma *cdma, u32 getptr) 294 { 295 host->cdma_op->resume(cdma, getptr); 296 } 297 298 static inline void host1x_hw_cdma_timeout_cpu_incr(struct host1x *host, 299 struct host1x_cdma *cdma, 300 u32 getptr, 301 u32 syncpt_incrs, 302 u32 syncval, u32 nr_slots) 303 { 304 host->cdma_op->timeout_cpu_incr(cdma, getptr, syncpt_incrs, syncval, 305 nr_slots); 306 } 307 308 static inline void host1x_hw_pushbuffer_init(struct host1x *host, 309 struct push_buffer *pb) 310 { 311 host->cdma_pb_op->init(pb); 312 } 313 314 static inline void host1x_hw_debug_init(struct host1x *host, struct dentry *de) 315 { 316 if (host->debug_op && host->debug_op->debug_init) 317 host->debug_op->debug_init(de); 318 } 319 320 static inline void host1x_hw_show_channel_cdma(struct host1x *host, 321 struct host1x_channel *channel, 322 struct output *o) 323 { 324 host->debug_op->show_channel_cdma(host, channel, o); 325 } 326 327 static inline void host1x_hw_show_channel_fifo(struct host1x *host, 328 struct host1x_channel *channel, 329 struct output *o) 330 { 331 host->debug_op->show_channel_fifo(host, channel, o); 332 } 333 334 static inline void host1x_hw_show_mlocks(struct host1x *host, struct output *o) 335 { 336 host->debug_op->show_mlocks(host, o); 337 } 338 339 extern struct platform_driver tegra_mipi_driver; 340 341 #endif 342