1 /* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26 #include <linux/dma-mapping.h> 27 #include <linux/moduleparam.h> 28 29 #include "virtgpu_drv.h" 30 31 static int virtio_gpu_virglrenderer_workaround = 1; 32 module_param_named(virglhack, virtio_gpu_virglrenderer_workaround, int, 0400); 33 34 static int virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev, 35 uint32_t *resid) 36 { 37 if (virtio_gpu_virglrenderer_workaround) { 38 /* 39 * Hack to avoid re-using resource IDs. 40 * 41 * virglrenderer versions up to (and including) 0.7.0 42 * can't deal with that. virglrenderer commit 43 * "f91a9dd35715 Fix unlinking resources from hash 44 * table." (Feb 2019) fixes the bug. 45 */ 46 static atomic_t seqno = ATOMIC_INIT(0); 47 int handle = atomic_inc_return(&seqno); 48 *resid = handle + 1; 49 } else { 50 int handle = ida_alloc(&vgdev->resource_ida, GFP_KERNEL); 51 if (handle < 0) 52 return handle; 53 *resid = handle + 1; 54 } 55 return 0; 56 } 57 58 static void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id) 59 { 60 if (!virtio_gpu_virglrenderer_workaround) { 61 ida_free(&vgdev->resource_ida, id - 1); 62 } 63 } 64 65 void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo) 66 { 67 struct virtio_gpu_device *vgdev = bo->base.base.dev->dev_private; 68 69 virtio_gpu_resource_id_put(vgdev, bo->hw_res_handle); 70 if (virtio_gpu_is_shmem(bo)) { 71 struct virtio_gpu_object_shmem *shmem = to_virtio_gpu_shmem(bo); 72 73 if (shmem->pages) { 74 if (shmem->mapped) { 75 dma_unmap_sgtable(vgdev->vdev->dev.parent, 76 shmem->pages, DMA_TO_DEVICE, 0); 77 shmem->mapped = 0; 78 } 79 80 sg_free_table(shmem->pages); 81 shmem->pages = NULL; 82 drm_gem_shmem_unpin(&bo->base.base); 83 } 84 85 drm_gem_shmem_free_object(&bo->base.base); 86 } 87 } 88 89 static void virtio_gpu_free_object(struct drm_gem_object *obj) 90 { 91 struct virtio_gpu_object *bo = gem_to_virtio_gpu_obj(obj); 92 struct virtio_gpu_device *vgdev = bo->base.base.dev->dev_private; 93 94 if (bo->created) { 95 virtio_gpu_cmd_unref_resource(vgdev, bo); 96 virtio_gpu_notify(vgdev); 97 /* completion handler calls virtio_gpu_cleanup_object() */ 98 return; 99 } 100 virtio_gpu_cleanup_object(bo); 101 } 102 103 static const struct drm_gem_object_funcs virtio_gpu_shmem_funcs = { 104 .free = virtio_gpu_free_object, 105 .open = virtio_gpu_gem_object_open, 106 .close = virtio_gpu_gem_object_close, 107 108 .print_info = drm_gem_shmem_print_info, 109 .pin = drm_gem_shmem_pin, 110 .unpin = drm_gem_shmem_unpin, 111 .get_sg_table = drm_gem_shmem_get_sg_table, 112 .vmap = drm_gem_shmem_vmap, 113 .vunmap = drm_gem_shmem_vunmap, 114 .mmap = drm_gem_shmem_mmap, 115 }; 116 117 bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo) 118 { 119 return bo->base.base.funcs == &virtio_gpu_shmem_funcs; 120 } 121 122 struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 123 size_t size) 124 { 125 struct virtio_gpu_object_shmem *shmem; 126 struct drm_gem_shmem_object *dshmem; 127 128 shmem = kzalloc(sizeof(*shmem), GFP_KERNEL); 129 if (!shmem) 130 return NULL; 131 132 dshmem = &shmem->base.base; 133 dshmem->base.funcs = &virtio_gpu_shmem_funcs; 134 dshmem->map_cached = true; 135 return &dshmem->base; 136 } 137 138 static int virtio_gpu_object_shmem_init(struct virtio_gpu_device *vgdev, 139 struct virtio_gpu_object *bo, 140 struct virtio_gpu_mem_entry **ents, 141 unsigned int *nents) 142 { 143 bool use_dma_api = !virtio_has_dma_quirk(vgdev->vdev); 144 struct virtio_gpu_object_shmem *shmem = to_virtio_gpu_shmem(bo); 145 struct scatterlist *sg; 146 int si, ret; 147 148 ret = drm_gem_shmem_pin(&bo->base.base); 149 if (ret < 0) 150 return -EINVAL; 151 152 shmem->pages = drm_gem_shmem_get_pages_sgt(&bo->base.base); 153 if (!shmem->pages) { 154 drm_gem_shmem_unpin(&bo->base.base); 155 return -EINVAL; 156 } 157 158 if (use_dma_api) { 159 ret = dma_map_sgtable(vgdev->vdev->dev.parent, 160 shmem->pages, DMA_TO_DEVICE, 0); 161 if (ret) 162 return ret; 163 *nents = shmem->mapped = shmem->pages->nents; 164 } else { 165 *nents = shmem->pages->orig_nents; 166 } 167 168 *ents = kmalloc_array(*nents, sizeof(struct virtio_gpu_mem_entry), 169 GFP_KERNEL); 170 if (!(*ents)) { 171 DRM_ERROR("failed to allocate ent list\n"); 172 return -ENOMEM; 173 } 174 175 if (use_dma_api) { 176 for_each_sgtable_dma_sg(shmem->pages, sg, si) { 177 (*ents)[si].addr = cpu_to_le64(sg_dma_address(sg)); 178 (*ents)[si].length = cpu_to_le32(sg_dma_len(sg)); 179 (*ents)[si].padding = 0; 180 } 181 } else { 182 for_each_sgtable_sg(shmem->pages, sg, si) { 183 (*ents)[si].addr = cpu_to_le64(sg_phys(sg)); 184 (*ents)[si].length = cpu_to_le32(sg->length); 185 (*ents)[si].padding = 0; 186 } 187 } 188 189 return 0; 190 } 191 192 int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 193 struct virtio_gpu_object_params *params, 194 struct virtio_gpu_object **bo_ptr, 195 struct virtio_gpu_fence *fence) 196 { 197 struct virtio_gpu_object_array *objs = NULL; 198 struct drm_gem_shmem_object *shmem_obj; 199 struct virtio_gpu_object *bo; 200 struct virtio_gpu_mem_entry *ents; 201 unsigned int nents; 202 int ret; 203 204 *bo_ptr = NULL; 205 206 params->size = roundup(params->size, PAGE_SIZE); 207 shmem_obj = drm_gem_shmem_create(vgdev->ddev, params->size); 208 if (IS_ERR(shmem_obj)) 209 return PTR_ERR(shmem_obj); 210 bo = gem_to_virtio_gpu_obj(&shmem_obj->base); 211 212 ret = virtio_gpu_resource_id_get(vgdev, &bo->hw_res_handle); 213 if (ret < 0) 214 goto err_free_gem; 215 216 bo->dumb = params->dumb; 217 218 if (fence) { 219 ret = -ENOMEM; 220 objs = virtio_gpu_array_alloc(1); 221 if (!objs) 222 goto err_put_id; 223 virtio_gpu_array_add_obj(objs, &bo->base.base); 224 225 ret = virtio_gpu_array_lock_resv(objs); 226 if (ret != 0) 227 goto err_put_objs; 228 } 229 230 if (params->virgl) { 231 virtio_gpu_cmd_resource_create_3d(vgdev, bo, params, 232 objs, fence); 233 } else { 234 virtio_gpu_cmd_create_resource(vgdev, bo, params, 235 objs, fence); 236 } 237 238 ret = virtio_gpu_object_shmem_init(vgdev, bo, &ents, &nents); 239 if (ret != 0) { 240 virtio_gpu_free_object(&shmem_obj->base); 241 return ret; 242 } 243 244 virtio_gpu_object_attach(vgdev, bo, ents, nents); 245 246 *bo_ptr = bo; 247 return 0; 248 249 err_put_objs: 250 virtio_gpu_array_put_free(objs); 251 err_put_id: 252 virtio_gpu_resource_id_put(vgdev, bo->hw_res_handle); 253 err_free_gem: 254 drm_gem_shmem_free_object(&shmem_obj->base); 255 return ret; 256 } 257