1 /* 2 * Copyright (c) 2012-2013, NVIDIA Corporation. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/iommu.h> 11 12 #include "drm.h" 13 #include "gem.h" 14 #include "gr2d.h" 15 16 struct gr2d { 17 struct iommu_group *group; 18 struct tegra_drm_client client; 19 struct host1x_channel *channel; 20 struct clk *clk; 21 22 DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS); 23 }; 24 25 static inline struct gr2d *to_gr2d(struct tegra_drm_client *client) 26 { 27 return container_of(client, struct gr2d, client); 28 } 29 30 static int gr2d_init(struct host1x_client *client) 31 { 32 struct tegra_drm_client *drm = host1x_to_drm_client(client); 33 struct drm_device *dev = dev_get_drvdata(client->parent); 34 unsigned long flags = HOST1X_SYNCPT_HAS_BASE; 35 struct tegra_drm *tegra = dev->dev_private; 36 struct gr2d *gr2d = to_gr2d(drm); 37 int err; 38 39 gr2d->channel = host1x_channel_request(client->dev); 40 if (!gr2d->channel) 41 return -ENOMEM; 42 43 client->syncpts[0] = host1x_syncpt_request(client, flags); 44 if (!client->syncpts[0]) { 45 err = -ENOMEM; 46 dev_err(client->dev, "failed to request syncpoint: %d\n", err); 47 goto put; 48 } 49 50 if (tegra->domain) { 51 gr2d->group = iommu_group_get(client->dev); 52 53 if (gr2d->group) { 54 err = iommu_attach_group(tegra->domain, gr2d->group); 55 if (err < 0) { 56 dev_err(client->dev, 57 "failed to attach to domain: %d\n", 58 err); 59 iommu_group_put(gr2d->group); 60 goto free; 61 } 62 } 63 } 64 65 err = tegra_drm_register_client(tegra, drm); 66 if (err < 0) { 67 dev_err(client->dev, "failed to register client: %d\n", err); 68 goto detach; 69 } 70 71 return 0; 72 73 detach: 74 if (gr2d->group) { 75 iommu_detach_group(tegra->domain, gr2d->group); 76 iommu_group_put(gr2d->group); 77 } 78 free: 79 host1x_syncpt_free(client->syncpts[0]); 80 put: 81 host1x_channel_put(gr2d->channel); 82 return err; 83 } 84 85 static int gr2d_exit(struct host1x_client *client) 86 { 87 struct tegra_drm_client *drm = host1x_to_drm_client(client); 88 struct drm_device *dev = dev_get_drvdata(client->parent); 89 struct tegra_drm *tegra = dev->dev_private; 90 struct gr2d *gr2d = to_gr2d(drm); 91 int err; 92 93 err = tegra_drm_unregister_client(tegra, drm); 94 if (err < 0) 95 return err; 96 97 host1x_syncpt_free(client->syncpts[0]); 98 host1x_channel_put(gr2d->channel); 99 100 if (gr2d->group) { 101 iommu_detach_group(tegra->domain, gr2d->group); 102 iommu_group_put(gr2d->group); 103 } 104 105 return 0; 106 } 107 108 static const struct host1x_client_ops gr2d_client_ops = { 109 .init = gr2d_init, 110 .exit = gr2d_exit, 111 }; 112 113 static int gr2d_open_channel(struct tegra_drm_client *client, 114 struct tegra_drm_context *context) 115 { 116 struct gr2d *gr2d = to_gr2d(client); 117 118 context->channel = host1x_channel_get(gr2d->channel); 119 if (!context->channel) 120 return -ENOMEM; 121 122 return 0; 123 } 124 125 static void gr2d_close_channel(struct tegra_drm_context *context) 126 { 127 host1x_channel_put(context->channel); 128 } 129 130 static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset) 131 { 132 struct gr2d *gr2d = dev_get_drvdata(dev); 133 134 switch (class) { 135 case HOST1X_CLASS_HOST1X: 136 if (offset == 0x2b) 137 return 1; 138 139 break; 140 141 case HOST1X_CLASS_GR2D: 142 case HOST1X_CLASS_GR2D_SB: 143 if (offset >= GR2D_NUM_REGS) 144 break; 145 146 if (test_bit(offset, gr2d->addr_regs)) 147 return 1; 148 149 break; 150 } 151 152 return 0; 153 } 154 155 static int gr2d_is_valid_class(u32 class) 156 { 157 return (class == HOST1X_CLASS_GR2D || 158 class == HOST1X_CLASS_GR2D_SB); 159 } 160 161 static const struct tegra_drm_client_ops gr2d_ops = { 162 .open_channel = gr2d_open_channel, 163 .close_channel = gr2d_close_channel, 164 .is_addr_reg = gr2d_is_addr_reg, 165 .is_valid_class = gr2d_is_valid_class, 166 .submit = tegra_drm_submit, 167 }; 168 169 static const struct of_device_id gr2d_match[] = { 170 { .compatible = "nvidia,tegra30-gr2d" }, 171 { .compatible = "nvidia,tegra20-gr2d" }, 172 { }, 173 }; 174 MODULE_DEVICE_TABLE(of, gr2d_match); 175 176 static const u32 gr2d_addr_regs[] = { 177 GR2D_UA_BASE_ADDR, 178 GR2D_VA_BASE_ADDR, 179 GR2D_PAT_BASE_ADDR, 180 GR2D_DSTA_BASE_ADDR, 181 GR2D_DSTB_BASE_ADDR, 182 GR2D_DSTC_BASE_ADDR, 183 GR2D_SRCA_BASE_ADDR, 184 GR2D_SRCB_BASE_ADDR, 185 GR2D_SRC_BASE_ADDR_SB, 186 GR2D_DSTA_BASE_ADDR_SB, 187 GR2D_DSTB_BASE_ADDR_SB, 188 GR2D_UA_BASE_ADDR_SB, 189 GR2D_VA_BASE_ADDR_SB, 190 }; 191 192 static int gr2d_probe(struct platform_device *pdev) 193 { 194 struct device *dev = &pdev->dev; 195 struct host1x_syncpt **syncpts; 196 struct gr2d *gr2d; 197 unsigned int i; 198 int err; 199 200 gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL); 201 if (!gr2d) 202 return -ENOMEM; 203 204 syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL); 205 if (!syncpts) 206 return -ENOMEM; 207 208 gr2d->clk = devm_clk_get(dev, NULL); 209 if (IS_ERR(gr2d->clk)) { 210 dev_err(dev, "cannot get clock\n"); 211 return PTR_ERR(gr2d->clk); 212 } 213 214 err = clk_prepare_enable(gr2d->clk); 215 if (err) { 216 dev_err(dev, "cannot turn on clock\n"); 217 return err; 218 } 219 220 INIT_LIST_HEAD(&gr2d->client.base.list); 221 gr2d->client.base.ops = &gr2d_client_ops; 222 gr2d->client.base.dev = dev; 223 gr2d->client.base.class = HOST1X_CLASS_GR2D; 224 gr2d->client.base.syncpts = syncpts; 225 gr2d->client.base.num_syncpts = 1; 226 227 INIT_LIST_HEAD(&gr2d->client.list); 228 gr2d->client.ops = &gr2d_ops; 229 230 err = host1x_client_register(&gr2d->client.base); 231 if (err < 0) { 232 dev_err(dev, "failed to register host1x client: %d\n", err); 233 clk_disable_unprepare(gr2d->clk); 234 return err; 235 } 236 237 /* initialize address register map */ 238 for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++) 239 set_bit(gr2d_addr_regs[i], gr2d->addr_regs); 240 241 platform_set_drvdata(pdev, gr2d); 242 243 return 0; 244 } 245 246 static int gr2d_remove(struct platform_device *pdev) 247 { 248 struct gr2d *gr2d = platform_get_drvdata(pdev); 249 int err; 250 251 err = host1x_client_unregister(&gr2d->client.base); 252 if (err < 0) { 253 dev_err(&pdev->dev, "failed to unregister host1x client: %d\n", 254 err); 255 return err; 256 } 257 258 clk_disable_unprepare(gr2d->clk); 259 260 return 0; 261 } 262 263 struct platform_driver tegra_gr2d_driver = { 264 .driver = { 265 .name = "tegra-gr2d", 266 .of_match_table = gr2d_match, 267 }, 268 .probe = gr2d_probe, 269 .remove = gr2d_remove, 270 }; 271