1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* Copyright 2017-2019 Qiang Yu <[email protected]> */ 3 4 #include <linux/regulator/consumer.h> 5 #include <linux/reset.h> 6 #include <linux/clk.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/platform_device.h> 9 10 #include "lima_device.h" 11 #include "lima_gp.h" 12 #include "lima_pp.h" 13 #include "lima_mmu.h" 14 #include "lima_pmu.h" 15 #include "lima_l2_cache.h" 16 #include "lima_dlbu.h" 17 #include "lima_bcast.h" 18 #include "lima_vm.h" 19 20 struct lima_ip_desc { 21 char *name; 22 char *irq_name; 23 bool must_have[lima_gpu_num]; 24 int offset[lima_gpu_num]; 25 26 int (*init)(struct lima_ip *ip); 27 void (*fini)(struct lima_ip *ip); 28 }; 29 30 #define LIMA_IP_DESC(ipname, mst0, mst1, off0, off1, func, irq) \ 31 [lima_ip_##ipname] = { \ 32 .name = #ipname, \ 33 .irq_name = irq, \ 34 .must_have = { \ 35 [lima_gpu_mali400] = mst0, \ 36 [lima_gpu_mali450] = mst1, \ 37 }, \ 38 .offset = { \ 39 [lima_gpu_mali400] = off0, \ 40 [lima_gpu_mali450] = off1, \ 41 }, \ 42 .init = lima_##func##_init, \ 43 .fini = lima_##func##_fini, \ 44 } 45 46 static struct lima_ip_desc lima_ip_desc[lima_ip_num] = { 47 LIMA_IP_DESC(pmu, false, false, 0x02000, 0x02000, pmu, "pmu"), 48 LIMA_IP_DESC(l2_cache0, true, true, 0x01000, 0x10000, l2_cache, NULL), 49 LIMA_IP_DESC(l2_cache1, false, true, -1, 0x01000, l2_cache, NULL), 50 LIMA_IP_DESC(l2_cache2, false, false, -1, 0x11000, l2_cache, NULL), 51 LIMA_IP_DESC(gp, true, true, 0x00000, 0x00000, gp, "gp"), 52 LIMA_IP_DESC(pp0, true, true, 0x08000, 0x08000, pp, "pp0"), 53 LIMA_IP_DESC(pp1, false, false, 0x0A000, 0x0A000, pp, "pp1"), 54 LIMA_IP_DESC(pp2, false, false, 0x0C000, 0x0C000, pp, "pp2"), 55 LIMA_IP_DESC(pp3, false, false, 0x0E000, 0x0E000, pp, "pp3"), 56 LIMA_IP_DESC(pp4, false, false, -1, 0x28000, pp, "pp4"), 57 LIMA_IP_DESC(pp5, false, false, -1, 0x2A000, pp, "pp5"), 58 LIMA_IP_DESC(pp6, false, false, -1, 0x2C000, pp, "pp6"), 59 LIMA_IP_DESC(pp7, false, false, -1, 0x2E000, pp, "pp7"), 60 LIMA_IP_DESC(gpmmu, true, true, 0x03000, 0x03000, mmu, "gpmmu"), 61 LIMA_IP_DESC(ppmmu0, true, true, 0x04000, 0x04000, mmu, "ppmmu0"), 62 LIMA_IP_DESC(ppmmu1, false, false, 0x05000, 0x05000, mmu, "ppmmu1"), 63 LIMA_IP_DESC(ppmmu2, false, false, 0x06000, 0x06000, mmu, "ppmmu2"), 64 LIMA_IP_DESC(ppmmu3, false, false, 0x07000, 0x07000, mmu, "ppmmu3"), 65 LIMA_IP_DESC(ppmmu4, false, false, -1, 0x1C000, mmu, "ppmmu4"), 66 LIMA_IP_DESC(ppmmu5, false, false, -1, 0x1D000, mmu, "ppmmu5"), 67 LIMA_IP_DESC(ppmmu6, false, false, -1, 0x1E000, mmu, "ppmmu6"), 68 LIMA_IP_DESC(ppmmu7, false, false, -1, 0x1F000, mmu, "ppmmu7"), 69 LIMA_IP_DESC(dlbu, false, true, -1, 0x14000, dlbu, NULL), 70 LIMA_IP_DESC(bcast, false, true, -1, 0x13000, bcast, NULL), 71 LIMA_IP_DESC(pp_bcast, false, true, -1, 0x16000, pp_bcast, "pp"), 72 LIMA_IP_DESC(ppmmu_bcast, false, true, -1, 0x15000, mmu, NULL), 73 }; 74 75 const char *lima_ip_name(struct lima_ip *ip) 76 { 77 return lima_ip_desc[ip->id].name; 78 } 79 80 static int lima_clk_init(struct lima_device *dev) 81 { 82 int err; 83 84 dev->clk_bus = devm_clk_get(dev->dev, "bus"); 85 if (IS_ERR(dev->clk_bus)) { 86 err = PTR_ERR(dev->clk_bus); 87 if (err != -EPROBE_DEFER) 88 dev_err(dev->dev, "get bus clk failed %d\n", err); 89 return err; 90 } 91 92 dev->clk_gpu = devm_clk_get(dev->dev, "core"); 93 if (IS_ERR(dev->clk_gpu)) { 94 err = PTR_ERR(dev->clk_gpu); 95 if (err != -EPROBE_DEFER) 96 dev_err(dev->dev, "get core clk failed %d\n", err); 97 return err; 98 } 99 100 err = clk_prepare_enable(dev->clk_bus); 101 if (err) 102 return err; 103 104 err = clk_prepare_enable(dev->clk_gpu); 105 if (err) 106 goto error_out0; 107 108 dev->reset = devm_reset_control_array_get_optional_shared(dev->dev); 109 110 if (IS_ERR(dev->reset)) { 111 err = PTR_ERR(dev->reset); 112 if (err != -EPROBE_DEFER) 113 dev_err(dev->dev, "get reset controller failed %d\n", 114 err); 115 goto error_out1; 116 } else if (dev->reset != NULL) { 117 err = reset_control_deassert(dev->reset); 118 if (err) { 119 dev_err(dev->dev, 120 "reset controller deassert failed %d\n", err); 121 goto error_out1; 122 } 123 } 124 125 return 0; 126 127 error_out1: 128 clk_disable_unprepare(dev->clk_gpu); 129 error_out0: 130 clk_disable_unprepare(dev->clk_bus); 131 return err; 132 } 133 134 static void lima_clk_fini(struct lima_device *dev) 135 { 136 if (dev->reset != NULL) 137 reset_control_assert(dev->reset); 138 clk_disable_unprepare(dev->clk_gpu); 139 clk_disable_unprepare(dev->clk_bus); 140 } 141 142 static int lima_regulator_init(struct lima_device *dev) 143 { 144 int ret; 145 146 dev->regulator = devm_regulator_get_optional(dev->dev, "mali"); 147 if (IS_ERR(dev->regulator)) { 148 ret = PTR_ERR(dev->regulator); 149 dev->regulator = NULL; 150 if (ret == -ENODEV) 151 return 0; 152 if (ret != -EPROBE_DEFER) 153 dev_err(dev->dev, "failed to get regulator: %d\n", ret); 154 return ret; 155 } 156 157 ret = regulator_enable(dev->regulator); 158 if (ret < 0) { 159 dev_err(dev->dev, "failed to enable regulator: %d\n", ret); 160 return ret; 161 } 162 163 return 0; 164 } 165 166 static void lima_regulator_fini(struct lima_device *dev) 167 { 168 if (dev->regulator) 169 regulator_disable(dev->regulator); 170 } 171 172 static int lima_init_ip(struct lima_device *dev, int index) 173 { 174 struct platform_device *pdev = to_platform_device(dev->dev); 175 struct lima_ip_desc *desc = lima_ip_desc + index; 176 struct lima_ip *ip = dev->ip + index; 177 const char *irq_name = desc->irq_name; 178 int offset = desc->offset[dev->id]; 179 bool must = desc->must_have[dev->id]; 180 int err; 181 182 if (offset < 0) 183 return 0; 184 185 ip->dev = dev; 186 ip->id = index; 187 ip->iomem = dev->iomem + offset; 188 if (irq_name) { 189 err = must ? platform_get_irq_byname(pdev, irq_name) : 190 platform_get_irq_byname_optional(pdev, irq_name); 191 if (err < 0) 192 goto out; 193 ip->irq = err; 194 } 195 196 err = desc->init(ip); 197 if (!err) { 198 ip->present = true; 199 return 0; 200 } 201 202 out: 203 return must ? err : 0; 204 } 205 206 static void lima_fini_ip(struct lima_device *ldev, int index) 207 { 208 struct lima_ip_desc *desc = lima_ip_desc + index; 209 struct lima_ip *ip = ldev->ip + index; 210 211 if (ip->present) 212 desc->fini(ip); 213 } 214 215 static int lima_init_gp_pipe(struct lima_device *dev) 216 { 217 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; 218 int err; 219 220 pipe->ldev = dev; 221 222 err = lima_sched_pipe_init(pipe, "gp"); 223 if (err) 224 return err; 225 226 pipe->l2_cache[pipe->num_l2_cache++] = dev->ip + lima_ip_l2_cache0; 227 pipe->mmu[pipe->num_mmu++] = dev->ip + lima_ip_gpmmu; 228 pipe->processor[pipe->num_processor++] = dev->ip + lima_ip_gp; 229 230 err = lima_gp_pipe_init(dev); 231 if (err) { 232 lima_sched_pipe_fini(pipe); 233 return err; 234 } 235 236 return 0; 237 } 238 239 static void lima_fini_gp_pipe(struct lima_device *dev) 240 { 241 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_gp; 242 243 lima_gp_pipe_fini(dev); 244 lima_sched_pipe_fini(pipe); 245 } 246 247 static int lima_init_pp_pipe(struct lima_device *dev) 248 { 249 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp; 250 int err, i; 251 252 pipe->ldev = dev; 253 254 err = lima_sched_pipe_init(pipe, "pp"); 255 if (err) 256 return err; 257 258 for (i = 0; i < LIMA_SCHED_PIPE_MAX_PROCESSOR; i++) { 259 struct lima_ip *pp = dev->ip + lima_ip_pp0 + i; 260 struct lima_ip *ppmmu = dev->ip + lima_ip_ppmmu0 + i; 261 struct lima_ip *l2_cache; 262 263 if (dev->id == lima_gpu_mali400) 264 l2_cache = dev->ip + lima_ip_l2_cache0; 265 else 266 l2_cache = dev->ip + lima_ip_l2_cache1 + (i >> 2); 267 268 if (pp->present && ppmmu->present && l2_cache->present) { 269 pipe->mmu[pipe->num_mmu++] = ppmmu; 270 pipe->processor[pipe->num_processor++] = pp; 271 if (!pipe->l2_cache[i >> 2]) 272 pipe->l2_cache[pipe->num_l2_cache++] = l2_cache; 273 } 274 } 275 276 if (dev->ip[lima_ip_bcast].present) { 277 pipe->bcast_processor = dev->ip + lima_ip_pp_bcast; 278 pipe->bcast_mmu = dev->ip + lima_ip_ppmmu_bcast; 279 } 280 281 err = lima_pp_pipe_init(dev); 282 if (err) { 283 lima_sched_pipe_fini(pipe); 284 return err; 285 } 286 287 return 0; 288 } 289 290 static void lima_fini_pp_pipe(struct lima_device *dev) 291 { 292 struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp; 293 294 lima_pp_pipe_fini(dev); 295 lima_sched_pipe_fini(pipe); 296 } 297 298 int lima_device_init(struct lima_device *ldev) 299 { 300 int err, i; 301 struct resource *res; 302 303 dma_set_coherent_mask(ldev->dev, DMA_BIT_MASK(32)); 304 305 err = lima_clk_init(ldev); 306 if (err) 307 return err; 308 309 err = lima_regulator_init(ldev); 310 if (err) 311 goto err_out0; 312 313 ldev->empty_vm = lima_vm_create(ldev); 314 if (!ldev->empty_vm) { 315 err = -ENOMEM; 316 goto err_out1; 317 } 318 319 ldev->va_start = 0; 320 if (ldev->id == lima_gpu_mali450) { 321 ldev->va_end = LIMA_VA_RESERVE_START; 322 ldev->dlbu_cpu = dma_alloc_wc( 323 ldev->dev, LIMA_PAGE_SIZE, 324 &ldev->dlbu_dma, GFP_KERNEL | __GFP_NOWARN); 325 if (!ldev->dlbu_cpu) { 326 err = -ENOMEM; 327 goto err_out2; 328 } 329 } else 330 ldev->va_end = LIMA_VA_RESERVE_END; 331 332 res = platform_get_resource(ldev->pdev, IORESOURCE_MEM, 0); 333 ldev->iomem = devm_ioremap_resource(ldev->dev, res); 334 if (IS_ERR(ldev->iomem)) { 335 dev_err(ldev->dev, "fail to ioremap iomem\n"); 336 err = PTR_ERR(ldev->iomem); 337 goto err_out3; 338 } 339 340 for (i = 0; i < lima_ip_num; i++) { 341 err = lima_init_ip(ldev, i); 342 if (err) 343 goto err_out4; 344 } 345 346 err = lima_init_gp_pipe(ldev); 347 if (err) 348 goto err_out4; 349 350 err = lima_init_pp_pipe(ldev); 351 if (err) 352 goto err_out5; 353 354 ldev->dump.magic = LIMA_DUMP_MAGIC; 355 ldev->dump.version_major = LIMA_DUMP_MAJOR; 356 ldev->dump.version_minor = LIMA_DUMP_MINOR; 357 INIT_LIST_HEAD(&ldev->error_task_list); 358 mutex_init(&ldev->error_task_list_lock); 359 360 dev_info(ldev->dev, "bus rate = %lu\n", clk_get_rate(ldev->clk_bus)); 361 dev_info(ldev->dev, "mod rate = %lu", clk_get_rate(ldev->clk_gpu)); 362 363 return 0; 364 365 err_out5: 366 lima_fini_gp_pipe(ldev); 367 err_out4: 368 while (--i >= 0) 369 lima_fini_ip(ldev, i); 370 err_out3: 371 if (ldev->dlbu_cpu) 372 dma_free_wc(ldev->dev, LIMA_PAGE_SIZE, 373 ldev->dlbu_cpu, ldev->dlbu_dma); 374 err_out2: 375 lima_vm_put(ldev->empty_vm); 376 err_out1: 377 lima_regulator_fini(ldev); 378 err_out0: 379 lima_clk_fini(ldev); 380 return err; 381 } 382 383 void lima_device_fini(struct lima_device *ldev) 384 { 385 int i; 386 struct lima_sched_error_task *et, *tmp; 387 388 list_for_each_entry_safe(et, tmp, &ldev->error_task_list, list) { 389 list_del(&et->list); 390 kvfree(et); 391 } 392 mutex_destroy(&ldev->error_task_list_lock); 393 394 lima_fini_pp_pipe(ldev); 395 lima_fini_gp_pipe(ldev); 396 397 for (i = lima_ip_num - 1; i >= 0; i--) 398 lima_fini_ip(ldev, i); 399 400 if (ldev->dlbu_cpu) 401 dma_free_wc(ldev->dev, LIMA_PAGE_SIZE, 402 ldev->dlbu_cpu, ldev->dlbu_dma); 403 404 lima_vm_put(ldev->empty_vm); 405 406 lima_regulator_fini(ldev); 407 408 lima_clk_fini(ldev); 409 } 410